On Jan 8, 2009, at 1:10 PM, Anton Vorontsov wrote:
On Thu, Jan 08, 2009 at 12:50:22AM -0600, Kumar Gala wrote:
+struct mpc83xx_pcie_priv {
+ void __iomem *cfg_map;
+ u32 dev_base;
+};
So was thinking about this and was wondering about doing the
following:
hose->cfg_addr /* u
On Thu, Jan 08, 2009 at 12:50:22AM -0600, Kumar Gala wrote:
>>
>> +struct mpc83xx_pcie_priv {
>> +void __iomem *cfg_map;
>> +u32 dev_base;
>> +};
>
> So was thinking about this and was wondering about doing the following:
>
> hose->cfg_addr /* use instead of dev_base to cache pci bus/dev/fn
+struct mpc83xx_pcie_priv {
+ void __iomem *cfg_map;
+ u32 dev_base;
+};
So was thinking about this and was wondering about doing the following:
hose->cfg_addr /* use instead of dev_base to cache pci bus/dev/fn */
hose->cfg_data /* should be the outbound window used for pci cfg
c
This patch adds support for PCI-Express controllers as found on the
newer MPC83xx chips.
The work is loosely based on the Tony Li's patch[1], but unlike the
original patch, this patch implements sliding window for the Type 1
transactions using outbound window translations, so we don't have to
iore
This patch adds support for PCI-Express controllers as found on the
newer MPC83xx chips.
The work is loosely based on the Tony Li's patch[1], but unlike the
original patch, this patch implements sliding window for the Type 1
transactions using outbound window translations, so we don't have to
iore
