On Dec 17, 2008, at 1:43 PM, Trent Piepho wrote:
The code that sets up the outbound ATMU windows, which is used to
map CPU
physical addresses into PCI bus addresses where BARs will be mapped,
didn't
work so well.
For one, it leaked the ioremap() of the ATMU registers. Another
small bug
On Wed, 2008-12-17 at 11:43 -0800, Trent Piepho wrote:
The default ATMU window can support a pci_mem_offset less than zero too,
but pci_mem_offset is unsigned. One could say the abilities allowed a
powerpc pci_controller is neither subset nor a superset of the abilities of
a Freescale PCIe control
The code that sets up the outbound ATMU windows, which is used to map CPU
physical addresses into PCI bus addresses where BARs will be mapped, didn't
work so well.
For one, it leaked the ioremap() of the ATMU registers. Another small bug
was the high 20 bits of the PCI bus address were left as ze
