Willy Tarreau wrote on 2011/06/14 21:31:06:
>
> Hi Joakim,
>
> On Tue, Jun 14, 2011 at 03:54:45PM +0200, Joakim Tjernlund wrote:
> > This is a backport from 2.6 which I did to overcome 8xx CPU
> > bugs. 8xx does not update the DAR register when taking a TLB
> > error caused by dcbX and icbi insns
Hi Joakim,
On Tue, Jun 14, 2011 at 03:54:45PM +0200, Joakim Tjernlund wrote:
> This is a backport from 2.6 which I did to overcome 8xx CPU
> bugs. 8xx does not update the DAR register when taking a TLB
> error caused by dcbX and icbi insns which makes it very
> tricky to use these insns. Also the
Dan Malek wrote on 2011/06/14 18:11:51:
>
>
> Hi Joakim.
>
> On Jun 14, 2011, at 6:54 AM, Joakim Tjernlund wrote:
>
> > I know 2.4 is in strict maintenance mode and 8xx is obsolete
> > but as it is still in use I wanted 8xx to age with grace.
>
> Thanks for your continued support. I have recently
Hi Joakim.
On Jun 14, 2011, at 6:54 AM, Joakim Tjernlund wrote:
I know 2.4 is in strict maintenance mode and 8xx is obsolete
but as it is still in use I wanted 8xx to age with grace.
Thanks for your continued support. I have recently become
involved in some 8xx development again, and have n
This is a backport from 2.6 which I did to overcome 8xx CPU
bugs. 8xx does not update the DAR register when taking a TLB
error caused by dcbX and icbi insns which makes it very
tricky to use these insns. Also the dcbst wrongly sets the
the store bit when faulting into DTLB error.
A few more bugs ve
