Scott Wood wrote on 2011/01/13 21:44:00:
> > BTW, it occurred to me that the following 8xx quirk is best
> > done in 8xx code:
> >
> > From c1985a3b8b16d96ddce5ef90d5a15e70fb8a2aec Mon Sep 17 00:00:00 2001
> > From: Joakim Tjernlund
> > Date: Tue, 11 Jan 2011 11:24:22 +0100
> > Subject: [PATCH] 8
On Tue, 11 Jan 2011 11:56:32 +0100
Joakim Tjernlund wrote:
> Joakim Tjernlund/Transmode wrote on 2011/01/11 09:12:44:
> >
> > Willy Tarreau wrote on 2011/01/11 07:09:26:
> > >
> > > Hi Joakim,
> > >
> > > On Mon, Jan 10, 2011 at 10:37:46PM +0100, Joakim Tjernlund wrote:
> > > > This is a backpor
Willy Tarreau wrote on 2011/01/11 21:08:53:
>
> On Tue, Jan 11, 2011 at 09:12:44AM +0100, Joakim Tjernlund wrote:
> > Willy Tarreau wrote on 2011/01/11 07:09:26:
> > >
> > > Hi Joakim,
> > >
> > > On Mon, Jan 10, 2011 at 10:37:46PM +0100, Joakim Tjernlund wrote:
> > > > This is a backport from 2.
On Tue, Jan 11, 2011 at 09:12:44AM +0100, Joakim Tjernlund wrote:
> Willy Tarreau wrote on 2011/01/11 07:09:26:
> >
> > Hi Joakim,
> >
> > On Mon, Jan 10, 2011 at 10:37:46PM +0100, Joakim Tjernlund wrote:
> > > This is a backport from 2.6 which I did to overcome 8xx CPU
> > > bugs. 8xx does not up
Joakim Tjernlund/Transmode wrote on 2011/01/11 09:12:44:
>
> Willy Tarreau wrote on 2011/01/11 07:09:26:
> >
> > Hi Joakim,
> >
> > On Mon, Jan 10, 2011 at 10:37:46PM +0100, Joakim Tjernlund wrote:
> > > This is a backport from 2.6 which I did to overcome 8xx CPU
> > > bugs. 8xx does not update th
Willy Tarreau wrote on 2011/01/11 07:09:26:
>
> Hi Joakim,
>
> On Mon, Jan 10, 2011 at 10:37:46PM +0100, Joakim Tjernlund wrote:
> > This is a backport from 2.6 which I did to overcome 8xx CPU
> > bugs. 8xx does not update the DAR register when taking a TLB
> > error caused by dcbX and icbi insns
Hi Joakim,
On Mon, Jan 10, 2011 at 10:37:46PM +0100, Joakim Tjernlund wrote:
> This is a backport from 2.6 which I did to overcome 8xx CPU
> bugs. 8xx does not update the DAR register when taking a TLB
> error caused by dcbX and icbi insns which makes it very
> tricky to use these insns. Also the
This is a backport from 2.6 which I did to overcome 8xx CPU
bugs. 8xx does not update the DAR register when taking a TLB
error caused by dcbX and icbi insns which makes it very
tricky to use these insns. Also the dcbst wrongly sets the
the store bit when faulting into DTLB error.
A few more bugs ve
