Re: [PATCH 0/2] [PPC 4xx] L2-cache synchronization for ppc44x

2008-01-11 Thread Benjamin Herrenschmidt
On Fri, 2008-01-11 at 14:38 -0800, Eugene Surovegin wrote: > On Sat, Jan 12, 2008 at 09:05:35AM +1100, Benjamin Herrenschmidt wrote: > > > > > > The s/w synchronization algorithms proposed in my patches has no LL > > > > PLB > > > > limitations as opposed to h/w snooping, but, probably, this i

Re: [PATCH 0/2] [PPC 4xx] L2-cache synchronization for ppc44x

2008-01-11 Thread Eugene Surovegin
On Sat, Jan 12, 2008 at 09:05:35AM +1100, Benjamin Herrenschmidt wrote: > > > > The s/w synchronization algorithms proposed in my patches has no LL PLB > > > limitations as opposed to h/w snooping, but, probably, this is not the > > > best > > > way of how it might be implemented. Even though

Re: [PATCH 0/2] [PPC 4xx] L2-cache synchronization for ppc44x

2008-01-11 Thread Benjamin Herrenschmidt
> > The s/w synchronization algorithms proposed in my patches has no LL PLB > > limitations as opposed to h/w snooping, but, probably, this is not the best > > way of how it might be implemented. Even though with these patches the h/w > > accelerated RAID starts to operate correctly (with L2-c

Re: [PATCH 0/2] [PPC 4xx] L2-cache synchronization for ppc44x

2008-01-11 Thread Eugene Surovegin
On Fri, Jan 11, 2008 at 06:24:46PM +0300, Yuri Tikhonov wrote: > > Hello, Eugene, > > The h/w snooping mechanism you are talking about is limited to the Low > Latency (LL) segment of the PLB bus in ppc440sp and ppc440spe chips (see > section "7.2.7 L2 Cache Coherency" of the ppc440spe spec),

Re: [PATCH 0/2] [PPC 4xx] L2-cache synchronization for ppc44x

2008-01-11 Thread Yuri Tikhonov
Hello, Eugene, The h/w snooping mechanism you are talking about is limited to the Low Latency (LL) segment of the PLB bus in ppc440sp and ppc440spe chips (see section "7.2.7 L2 Cache Coherency" of the ppc440spe spec), whereas DMA and XOR engines use the High Bandwidth (HB) segment of PLB bus

Re: [PATCH 0/2] [PPC 4xx] L2-cache synchronization for ppc44x

2007-11-28 Thread Eugene Surovegin
On Wed, Nov 07, 2007 at 01:40:10AM +0300, Yuri Tikhonov wrote: > > Hello all, > > Here is a patch-set for support L2-cache synchronization routines for > the ppc44x processors family. I know that the "ppc" branch is for bug-fixing > only, thus > the patch-set is just FYI [though enabled but no

[PATCH 0/2] [PPC 4xx] L2-cache synchronization for ppc44x

2007-11-06 Thread Yuri Tikhonov
Hello all, Here is a patch-set for support L2-cache synchronization routines for the ppc44x processors family. I know that the "ppc" branch is for bug-fixing only, thus the patch-set is just FYI [though enabled but non-coherent L2-cache may appear as a bug for someone who uses one of the boar