Andreas Schwab writes:
> Larry Finger writes:
>
>> On 05/31/2011 10:54 AM, Andreas Schwab wrote:
>>> Larry Finger writes:
>>>
From the traceback, it must be the serdes_pll_device read that failed.
>>>
>>> Why not ssb_pcicore_polarity_workaround (note r4 == 0x134)?
>>
>> Mainly because the
Larry Finger writes:
> On 05/31/2011 10:54 AM, Andreas Schwab wrote:
>> Larry Finger writes:
>>
>>> From the traceback, it must be the serdes_pll_device read that failed.
>>
>> Why not ssb_pcicore_polarity_workaround (note r4 == 0x134)?
>
> Mainly because the last two steps in the traceback are
On 05/31/2011 10:54 AM, Andreas Schwab wrote:
Larry Finger writes:
From the traceback, it must be the serdes_pll_device read that failed.
Why not ssb_pcicore_polarity_workaround (note r4 == 0x134)?
Mainly because the last two steps in the traceback are
[c2ca5c40] [f2146244] ssb_pcie_read
Larry Finger writes:
> From the traceback, it must be the serdes_pll_device read that failed.
Why not ssb_pcicore_polarity_workaround (note r4 == 0x134)?
Andreas.
--
Andreas Schwab, sch...@linux-m68k.org
GPG Key fingerprint = 58CA 54C7 6D53 942B 1756 01D3 44D5 214B 8276 4ED5
"And now for som
On 05/31/2011 04:37 AM, Andreas Schwab wrote:
Rafał Miłecki writes:
+/**
+ * Workarounds.
+ **/
+
+static u8 ssb_pcicore_polarity_workaround(struct ssb_pcicore *pc)
+{
+ return (ssb_pcie_rea
Rafał Miłecki writes:
> +/**
> + * Workarounds.
> + **/
> +
> +static u8 ssb_pcicore_polarity_workaround(struct ssb_pcicore *pc)
> +{
> + return (ssb_pcie_read(pc, 0x204) & 0x10) ? 0xC0 : 0x80;
> +
