On Fri, 2017-11-03 at 10:28 -0200, Gustavo Romero wrote:
> Hi Cyril!
>
> On 01-11-2017 20:10, Cyril Bur wrote:
> > Thanks Gustavo,
> >
> > I do have one more thought on an improvement for this test which is
> > that:
> > + /* Counter for busy wait *
> > + uint64_t counter = 0x1ff00;
> > i
Hi Cyril!
On 01-11-2017 20:10, Cyril Bur wrote:
> Thanks Gustavo,
>
> I do have one more thought on an improvement for this test which is
> that:
> + /* Counter for busy wait *
> + uint64_t counter = 0x1ff00;
> is a bit fragile, what we should do is have the test work out long it
> sh
On Wed, 2017-11-01 at 15:23 -0400, Gustavo Romero wrote:
> Add a self test to check if FP/VEC/VSX registers are sane (restored
> correctly) after a FP/VEC/VSX unavailable exception is caught during a
> transaction.
>
> This test checks all possibilities in a thread regarding the combination
> of M
Add a self test to check if FP/VEC/VSX registers are sane (restored
correctly) after a FP/VEC/VSX unavailable exception is caught during a
transaction.
This test checks all possibilities in a thread regarding the combination
of MSR.[FP|VEC] states in a thread and for each scenario raises a
FP/VEC/
