Hi Daniel,
Just to respond to your comments,
The inline asm line cannot be formatted over multiple lines due to the
unrolling process, but we can take out the volatile.
The pagefault_disable() also seems to be an old method of disabling
preemption, but no longer actually works to disable preempt
Daniel Axtens writes:
>> In that function, the flow is:
>> pagefault_disable();
>> enable_kernel_altivec();
>>
>> pagefault_enable();
>>
>> There are a few things that it would be nice (but by no means essential)
>> to find out:
>> - what is the difference between pagefault and prempt enabl
> In that function, the flow is:
> pagefault_disable();
> enable_kernel_altivec();
>
> pagefault_enable();
>
> There are a few things that it would be nice (but by no means essential)
> to find out:
> - what is the difference between pagefault and prempt enable/disable
> - is it required to
Hi Matt,
> The raid6 Q syndrome check has been optimised using the vpermxor
> instruction. This instruction was made available with POWER8, ISA version
> 2.07. It allows for both vperm and vxor instructions to be done in a single
> instruction. This has been tested for correctness on a ppc64le vm
The raid6 Q syndrome check has been optimised using the vpermxor
instruction. This instruction was made available with POWER8, ISA version
2.07. It allows for both vperm and vxor instructions to be done in a single
instruction. This has been tested for correctness on a ppc64le vm with a
basic RAID
