On 22/08/2016 03:01, Cyril Bur wrote:
> On Tue, 2016-08-02 at 13:43 +0800, Simon Guo wrote:
>> Hi Laurent,
>> On Fri, Jul 29, 2016 at 11:51:22AM +0200, Laurent Dufour wrote:
>>>
>>> static int set_user_msr(struct task_struct *task, unsigned long
>>> msr)
>>> {
>>> +#ifdef CONFIG_PPC_TRANSACTIONAL
On Tue, 2016-08-02 at 13:43 +0800, Simon Guo wrote:
> Hi Laurent,
> On Fri, Jul 29, 2016 at 11:51:22AM +0200, Laurent Dufour wrote:
> >
> > static int set_user_msr(struct task_struct *task, unsigned long
> > msr)
> > {
> > +#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
> > + if (!(task->thread.regs->msr
On 02/08/2016 07:43, Simon Guo wrote:
> Hi Laurent,
> On Fri, Jul 29, 2016 at 11:51:22AM +0200, Laurent Dufour wrote:
>> static int set_user_msr(struct task_struct *task, unsigned long msr)
>> {
>> +#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
>> +if (!(task->thread.regs->msr & MSR_TM)) {
>> +
Hi Laurent,
On Fri, Jul 29, 2016 at 11:51:22AM +0200, Laurent Dufour wrote:
> static int set_user_msr(struct task_struct *task, unsigned long msr)
> {
> +#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
> + if (!(task->thread.regs->msr & MSR_TM)) {
> + /* If TM is not available, discard TM bit
This patch allows the MSR bits relative to the Transactional memory
state to be manipulated through the ptrace API.
However, in the case the TM available bit is not set in the
manipulated MSR, the changes are ignored.
When dealing with the checkpointed MSR, we must be sure that the TM
state bits
