The architecture defines that if MSR PR is set we are in problem state
irrespective of the HV bit. This fixes perf events to reflect this.
Also, on bare metal systems, samples taken in Linux will now be reported
as kernel rather than hypervisor.
Signed-off-by: Michael Neuling
CC: pau...@samba
The architecture defines that if MSR PR is set we are in problem state
irrespective of the HV bit. This fixes perf events to reflect this.
Signed-off-by: Michael Neuling
CC: pau...@samba.org
---
Tested on PHYP and BML.
This could go back into 31 too with s/event/counters/g. It only
effects bar
