Re: [PATCH] powerpc: Add 1TB workaround for PA6T

2007-10-15 Thread Olof Johansson
On Mon, Oct 15, 2007 at 03:06:21PM +1000, Paul Mackerras wrote: > Olof Johansson writes: > > > @@ -367,7 +368,7 @@ extern void do_feature_fixups(unsigned long value, void > > *fixup_start, > > #define CPU_FTRS_PA6T (CPU_FTR_USE_TB | \ > > CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | \ >

Re: [PATCH] powerpc: Add 1TB workaround for PA6T

2007-10-14 Thread Michael Neuling
In message <[EMAIL PROTECTED]> you wrote: > Olof Johansson writes: > > > @@ -367,7 +368,7 @@ extern void do_feature_fixups(unsigned long value, void *fixup_start, > > #define CPU_FTRS_PA6T (CPU_FTR_USE_TB | \ > > CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | \ > > CPU_FTR_ALTIVEC_

Re: [PATCH] powerpc: Add 1TB workaround for PA6T

2007-10-14 Thread Paul Mackerras
Olof Johansson writes: > @@ -367,7 +368,7 @@ extern void do_feature_fixups(unsigned long value, void > *fixup_start, > #define CPU_FTRS_PA6T (CPU_FTR_USE_TB | \ > CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | \ > CPU_FTR_ALTIVEC_COMP | CPU_FTR_CI_LARGE_PAGE | \ > - CPU

[PATCH] powerpc: Add 1TB workaround for PA6T

2007-10-11 Thread Olof Johansson
PA6T has a bug where the slbie instruction does not honor the large segment bit. As a result, we have to always use slbia when switching context. We don't have to worry about changing the slbie's during fault processing, since they should never be replacing one VSID with another using the same ESI