On 14/09/16 15:02, Alistair Popple wrote:
> On Mon, 15 Aug 2016 04:51:59 PM Alistair Popple wrote:
>> POWER9 contains an off core mmu called the nest mmu (NMMU). This is
>> used by other hardware units on the chip to translate virtual
>> addresses into real addresses. The unit attempting an addre
On Mon, 15 Aug 2016 04:51:59 PM Alistair Popple wrote:
> POWER9 contains an off core mmu called the nest mmu (NMMU). This is
> used by other hardware units on the chip to translate virtual
> addresses into real addresses. The unit attempting an address
> translation provides the majority of the con
On 16/08/16 10:37, Alistair Popple wrote:
> Balbir,
>
>
>
>>> + /* Update partition table control register on all Nest MMUs */
>>> + opal_nmmu_set_ptcr(-1UL, __pa(partition_tb) | (PATB_SIZE_SHIFT - 12));
>>> +
>>
>> Just wondering if
>>
>> 1. Instead of using -1 for all cpus, we should do
Balbir,
> > + /* Update partition table control register on all Nest MMUs */
> > + opal_nmmu_set_ptcr(-1UL, __pa(partition_tb) | (PATB_SIZE_SHIFT - 12));
> > +
>
> Just wondering if
>
> 1. Instead of using -1 for all cpus, we should do
> for_each_online_cpu() {
> opal_
On Mon, Aug 15, 2016 at 04:51:59PM +1000, Alistair Popple wrote:
> POWER9 contains an off core mmu called the nest mmu (NMMU). This is
> used by other hardware units on the chip to translate virtual
> addresses into real addresses. The unit attempting an address
> translation provides the majority
POWER9 contains an off core mmu called the nest mmu (NMMU). This is
used by other hardware units on the chip to translate virtual
addresses into real addresses. The unit attempting an address
translation provides the majority of the context required for the
translation request except for the base a
