On Oct 12, 2010, at 12:19 PM, Hollis Blanchard wrote:
> On Tue, Oct 12, 2010 at 10:02 AM, Rai Harninder-B01044
> wrote:
>> Currently the design is that we divide the sram portion into 2 equal
>> parts for AMP
>> That was the part of initial requirement
>> Do we want to remove that?
>
> Why woul
On Tue, Oct 12, 2010 at 10:02 AM, Rai Harninder-B01044
wrote:
> Currently the design is that we divide the sram portion into 2 equal
> parts for AMP
> That was the part of initial requirement
> Do we want to remove that?
Why wouldn't you just pass different cache-sram-size/offset values to
each k
12, 2010 7:40 PM
> To: Rai Harninder-B01044
> Cc: linuxppc-dev@lists.ozlabs.org
> Subject: Re: [PATCH] powerpc/fsl: 85xx: add cache-sram support
>
>
> On Oct 12, 2010, at 5:25 AM,
> wrote:
>
> >
> > +static int __devinit mpc85xx_
On Oct 12, 2010, at 5:25 AM,
wrote:
>
> +static int __devinit mpc85xx_l2ctlr_of_probe(struct platform_device *dev,
> + const struct of_device_id *match)
> +{
> + long rval;
> + unsigned int rem;
> + unsigned char ways;
> + const unsigned i
From: Harninder Rai
It adds cache-sram support in P1/P2 QorIQ platforms as under:
* A small abstraction over powerpc's remote heap allocator
* Exports mpc85xx_cache_sram_alloc()/free() APIs
* Supports only one contiguous SRAM window
* Drivers can do the following in Kconf
