On Jul 23, 2012, at 3:43 PM, Timur Tabi wrote:
> In order for indirect mode on the PIXIS to work properly, both chip selects
> need to be set to GPCM mode, otherwise writes to the chip select base
> addresses will not actually post to the local bus -- they'll go to the
> NAND controller instead.
In order for indirect mode on the PIXIS to work properly, both chip selects
need to be set to GPCM mode, otherwise writes to the chip select base
addresses will not actually post to the local bus -- they'll go to the
NAND controller instead. Therefore, we need to set BR0 and BR1 to GPCM
mode befor
