Re: [PATCH] powerpc/64s: Make unrecoverable SLB miss less confusing

Michael Ellerman wrote: Nicholas Piggin writes: On Thu, 26 Jul 2018 23:01:51 +1000 Michael Ellerman wrote: If we take an SLB miss while MSR[RI]=0 we can't recover and have to oops. Currently this is reported by faking up a 0x4100 exception, eg: Unrecoverable exception 4100 at 0 Oops: Un

Re: [PATCH] powerpc/64s: Make unrecoverable SLB miss less confusing

Nicholas Piggin writes: > On Thu, 26 Jul 2018 23:01:51 +1000 > Michael Ellerman wrote: > >> If we take an SLB miss while MSR[RI]=0 we can't recover and have to >> oops. Currently this is reported by faking up a 0x4100 exception, eg: >> >> Unrecoverable exception 4100 at 0 >> Oops: Unrecovera

Re: [PATCH] powerpc/64s: Make unrecoverable SLB miss less confusing

On Thu, 26 Jul 2018 23:01:51 +1000 Michael Ellerman wrote: > If we take an SLB miss while MSR[RI]=0 we can't recover and have to > oops. Currently this is reported by faking up a 0x4100 exception, eg: > > Unrecoverable exception 4100 at 0 > Oops: Unrecoverable exception, sig: 6 [#1] > ...

[PATCH] powerpc/64s: Make unrecoverable SLB miss less confusing

If we take an SLB miss while MSR[RI]=0 we can't recover and have to oops. Currently this is reported by faking up a 0x4100 exception, eg: Unrecoverable exception 4100 at 0 Oops: Unrecoverable exception, sig: 6 [#1] ... CPU: 0 PID: 1262 Comm: sh Not tainted 4.18.0-rc3-gcc-7.3.1-00098-g7fc2