Benjamin Herrenschmidt wrote:
> On Fri, 2008-12-05 at 06:08 -0500, Josh Boyer wrote:
> > Shouldn't there also be a next-level-cache property added to the cpu
> > node that references this?
> >
> It would be nice indeed, it would allow the kernel to expose the cache
> info in sysfs
Currently the k
On Friday 05 December 2008, Benjamin Herrenschmidt wrote:
> On Fri, 2008-12-05 at 06:08 -0500, Josh Boyer wrote:
> > Shouldn't there also be a next-level-cache property added to the cpu
> > node that references this?
>
> It would be nice indeed, it would allow the kernel to expose the cache
> info
On Fri, 2008-12-05 at 06:08 -0500, Josh Boyer wrote:
> Shouldn't there also be a next-level-cache property added to the cpu
> node that references this?
>
It would be nice indeed, it would allow the kernel to expose the cache
info in sysfs
Cheers,
Ben.
__
On Fri, 5 Dec 2008 07:08:52 +0100
Stefan Roese <[EMAIL PROTECTED]> wrote:
> With this patch the L2 cache is enabled on Canyonlands to increase the
> overall performance. There is a known cache coherency issue with the L2
> cache, but this is related to the high bandwidth (HB) PLB segment where
>
With this patch the L2 cache is enabled on Canyonlands to increase the
overall performance. There is a known cache coherency issue with the L2
cache, but this is related to the high bandwidth (HB) PLB segment where
the memory address is 0x8.. (low bandwidth PLB segment is mapped
to 0x0.