On Sep 13, 2012, at 3:54 AM, Prabhakar Kushwaha wrote:
> IFC-1.1.0 uses 28nm techenology for SRAM. This tech has known limitaion for
> SRAM i.e. "byte select" is not supported. Hence Read Modify Write is
> implemented in IFC for any "system side write" into sram buffer. Reading an
> uninitialized
On Thu, 2012-09-13 at 07:53 -0500, Kumar Gala wrote:
> > drivers/mtd/nand/fsl_ifc_nand.c | 56
> > ++-
> > 1 file changed, 55 insertions(+), 1 deletion(-)
>
> If MTD maintainers ack, I'm happy to pull this in via PPC tree.
Acked-by: Artem Bityutskiy
--
Bes
On 09/13/2012 06:23 PM, Kumar Gala wrote:
On Sep 13, 2012, at 3:54 AM, Prabhakar Kushwaha wrote:
IFC-1.1.0 uses 28nm techenology for SRAM. This tech has known limitaion for
SRAM i.e. "byte select" is not supported. Hence Read Modify Write is
implemented in IFC for any "system side write" into s
On Sep 13, 2012, at 3:54 AM, Prabhakar Kushwaha wrote:
> IFC-1.1.0 uses 28nm techenology for SRAM. This tech has known limitaion for
> SRAM i.e. "byte select" is not supported. Hence Read Modify Write is
> implemented in IFC for any "system side write" into sram buffer. Reading an
> uninitialized
IFC-1.1.0 uses 28nm techenology for SRAM. This tech has known limitaion for
SRAM i.e. "byte select" is not supported. Hence Read Modify Write is
implemented in IFC for any "system side write" into sram buffer. Reading an
uninitialized memory results in ECC Error from sram wrapper.
Hence we must in
