On Thu, Sep 10, 2009 at 02:27:11PM +0530, Poonam Aggrwal wrote:
> This patch creates the dts files for each core and splits the devices between
> the two cores for P2020RDB.
>
> core0 has memory, L2, i2c, spi, dma1, usb, eth0, eth1, crypto, global-util,
> pci0
> core1 has L2, dma2, eth0, pci1, ms
This patch creates the dts files for each core and splits the devices between
the two cores for P2020RDB.
core0 has memory, L2, i2c, spi, dma1, usb, eth0, eth1, crypto, global-util, pci0
core1 has L2, dma2, eth0, pci1, msi.
MPIC is shared between two cores but each core will protect its
interrupt
