The current 64 bit csum_partial_copy_generic function is based on the 32
bit version and never was optimized for 64 bit. This patch takes the 64 bit
memcpy and adapts it to also do the sum. It has been tested on a variety
of input sizes and alignments on Power5 and Power6 processors. It gives
Add the bits to the architecture-vec so that ibm,client-architecture
lets the firmware know we support the 2.06 architecture.
Signed-off-by: Joel Schopp <[EMAIL PROTECTED]>
Index: 2.6.26-rc6/arch/powerpc/kernel/prom_init.c
===
--- 2.
Add an entry for Power7 architected mode and add "(raw)" to Power7 raw mode to
distinguish it more clearly.
Signed-off-by: Joel Schopp <[EMAIL PROTECTED]>
---
arch/powerpc/kernel/cputable.c | 48 +
arch/powerpc/platforms/pseries/cpu_setup.S |6 +++
i
The patches following add some additional cputable, architecture-vec, etc bits
for Power7. Specifically the bits for running in 2.06 architected mode.
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From: Sonny Rao <[EMAIL PROTECTED]>
Adds a character driver for BSR support on IBM POWER systems including
Power5 and Power6. The BSR is an optional processor facility not currently
implemented by any other processors. It's primary purpose is large SMP
synchronization. More details on the BS
> -for_each_possible_cpu(i)
> -plpar_hcall_norets(H_PROD,i);
...
> +for_each_online_cpu(i)
> +plpar_hcall_norets(H_PROD, get_hard_smp_processor_id(i));
I assume this bit would be non-contriversial and could be sent up for
immediate upstream in
> + len = strlen(dn->full_name + 1);
> + bus_len = min(len, BUS_ID_SIZE - 1);
> + memcpy(dev->ofdev.dev.bus_id, dn->full_name + 1
> ++ (len - bus_len), bus_len);
> + for (i = 0; i < bus_len; i++)
> + if (dev->ofdev.dev.bus_id[i] == '/')
> +
