Hi Dan & vinod,
Do you have any comments about this patch?
Thanks,
Forrest
-Original Message-
From: Shi Xuelin-B29237
Sent: 2012年11月21日 17:01
To: dan.j.willi...@gmail.com; vinod.k...@intel.com;
linuxppc-dev@lists.ozlabs.org; linux-ker...@vger.kernel.org
Cc: i...@ovro.caltech.edu;
From: Xuelin Shi
The RaidEngine is a new FSL hardware that used as hardware acceration
for RAID5/6.
This patch enables the RaidEngine functionality and provides hardware
offloading capability for memcpy, xor and raid6 pq computation. It works
under dmaengine control with async_layer interface.
From: Xuelin Shi
The RaidEngine is a new Freescale hardware that used for parity
computation offloading in RAID5/6.
This patch adds the device node in device tree and related binding
documentation.
Signed-off-by: Harninder Rai
Signed-off-by: Naveen Burmi
Signed-off-by: Xuelin Shi
---
.../de
Hi Dan,
Do you have any comments about this RaidEngine patch?
Thanks,
Forrest
-Original Message-
From: Linuxppc-dev
[mailto:linuxppc-dev-bounces+qiang.liu=freescale@lists.ozlabs.org] On
Behalf Of Shi Xuelin-B29237
Sent: 2012年8月22日 14:24
To: dan.j.willi...@gmail.com; vinod.k
From: Xuelin Shi
Add XOR offloading functionality by CAAM and interface with async_tx layer
so that it can be used for RAID parity computation.
Signed-off-by: Naveen Burmi
Signed-off-by: Yuan Kang
Signed-off-by: Xuelin Shi
---
drivers/crypto/caam/Kconfig | 15 +
drivers/crypto/caam/M
From: Xuelin Shi
The RaidEngine is a new FSL hardware that used as hardware acceration
for RAID5/6.
This patch enables the RaidEngine functionality and provides hardware
offloading capability for memcpy, xor and raid6 pq computation. It works
under dmaengine control with async_layer interface.
Hi Dan Williams,
Do you have any comment about this patch?
Thanks,
Forrest
-Original Message-
From: Ira W. Snyder [mailto:i...@ovro.caltech.edu]
Sent: 2012年1月12日 0:14
To: Shi Xuelin-B29237
Cc: vinod.k...@intel.com; dan.j.willi...@intel.com;
linuxppc-dev@lists.ozlabs.org; linux-ker
Xuelin-B29237
Sent: 2011年12月26日 14:01
To: i...@ovro.caltech.edu; vinod.k...@intel.com; dan.j.willi...@intel.com;
linuxppc-dev@lists.ozlabs.org; linux-ker...@vger.kernel.org
Cc: Shi Xuelin-B29237
Subject: [PATCH] fsldma: fix performance degradation by optimizing spinlock use.
From: Forrest shi
Hello Dan Williams,
Do you have any comment about this patch?
Thanks,
Forrest
-Original Message-
From: Shi Xuelin-B29237
Sent: 2011年12月27日 14:31
To: vinod.k...@intel.com; dan.j.willi...@intel.com;
linuxppc-dev@lists.ozlabs.org; linux-ker...@vger.kernel.org; Li Yang-R58472
Cc: Shi
From: Forrest shi
we may do_sync_xor high mem pages, in this case, page_address will
return zero address which cause a failure.
this patch uses kmap_atomic before xor the pages and kunmap_atomic
after it.
Signed-off-by: b29...@freescale.com
---
crypto/a
From: Forrest shi
dma status check function fsl_tx_status is heavily called in
a tight loop and the desc lock in fsl_tx_status contended by
the dma status update function. this caused the dma performance
degrades much.
this patch releases the lock in the fsl_tx_status functio
this function returns, I believe the memory access are completed.
spin_unlock_irqsave is an implicit memory barrier and guaranteed this.
Thanks,
Forrest
-Original Message-
From: Ira W. Snyder [mailto:i...@ovro.caltech.edu]
Sent: 2011年12月3日 1:14
To: Shi Xuelin-B29237
Cc: vinod.
ech.edu]
Sent: 2011年12月1日 1:08
To: Shi Xuelin-B29237
Cc: vinod.k...@intel.com; dan.j.willi...@intel.com;
linuxppc-dev@lists.ozlabs.org; linux-ker...@vger.kernel.org; Li Yang-R58472
Subject: Re: [PATCH][RFC] fsldma: fix performance degradation by optimizing
spinlock use.
On Wed, Nov 30, 2011 at 09:5
Shi Xuelin-B29237; vinod.k...@intel.com; dan.j.willi...@intel.com;
linuxppc-dev@lists.ozlabs.org; linux-ker...@vger.kernel.org
Subject: Re: [PATCH][RFC] fsldma: fix performance degradation by optimizing
spinlock use.
On Tue, Nov 29, 2011 at 03:19:05AM +, Li Yang-R58472 wrote:
> > Subject:
Hi Ira,
see my comments below.
Thanks,
Forrest
-Original Message-
From: Ira W. Snyder [mailto:i...@ovro.caltech.edu]
Sent: 2011年11月29日 0:38
To: Shi Xuelin-B29237
Cc: vinod.k...@intel.com; dan.j.willi...@intel.com;
linuxppc-dev@lists.ozlabs.org; Li Yang-R58472; linux-ker
->common.cookie is definitely wrote as
20 and cpu2 could not read as 19.
How do you think?
Happy Thanks Giving day,
Forrest
-Original Message-
From: Ira W. Snyder [mailto:i...@ovro.caltech.edu]
Sent: 2011年11月23日 2:59
To: Shi Xuelin-B29237
Cc: dan.j.willi...@intel.com; Li Yang-R58472; z...
From: Forrest Shi
dma status check function fsl_tx_status is heavily called in
a tight loop and the desc lock in fsl_tx_status contended by
the dma status update function. this caused the dma performance
degrades much.
this patch releases the lock in the fsl_tx_status functio
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