On Thu, 2024-04-04 at 06:14 +, Christophe Leroy wrote:
>
>
> Le 04/04/2024 à 06:45, Rohan McLure a écrit :
> > Arbitrary instrumented locations, including syscall handlers, can
> > call
> > arch_local_irq_restore() transitively when KCSAN is enable
-off-by: Rohan McLure
---
arch/powerpc/kernel/irq_64.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/kernel/irq_64.c b/arch/powerpc/kernel/irq_64.c
index d5c48d1b0a31..18b2048389a2 100644
--- a/arch/powerpc/kernel/irq_64.c
+++ b/arch/powerpc/kernel/irq_64.c
observed to compile without inlining these routines,
which would lead to grief on NMI handlers.
Signed-off-by: Rohan McLure
---
arch/powerpc/include/asm/interrupt.h | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/powerpc/include/asm/interrupt.h
b/arch/powerpc
to correct
behaviour.
Signed-off-by: Rohan McLure
Reported-by: Michael Ellerman
Reported-by: Gautam Menghani
Tested-by: Gautam Menghani
Acked-by: Arnd Bergmann
---
Previously discussed here:
https://lore.kernel.org/linuxppc-dev/20230510033117.1395895-4-rmcl...@linux.ibm.com/
But pushed back
support in commit 3fee229a8eb9 ("riscv/mm: enable
ARCH_SUPPORTS_PAGE_TABLE_CHECK")
arm64 in commit 42b2547137f5 ("arm64/mm: enable
ARCH_SUPPORTS_PAGE_TABLE_CHECK")
x86_64 in commit d283d422c6c4 ("x86: mm: add x86_64 support for page table
check")
Reviewed-by: Christophe Lero
ead in the address of the access.
Signed-off-by: Rohan McLure
---
arch/x86/include/asm/pgtable.h | 2 +-
include/linux/page_table_check.h | 11 +++
include/linux/pgtable.h | 2 +-
mm/page_table_check.c| 5 +++--
4 files changed, 12 insertions(+), 8 deletions(-)
di
early-boot usages which should not be
instrumented.
Signed-off-by: Rohan McLure
---
v9: New patch
v10: don't reuse __set_pte_at(), as that will not apply filters. Instead
use new set_pte_at_unchecked().
v11: Include the assertion that hwvalid => !protnone. It is possible that
some of these c
r required to be present on all platforms as it
may be equivalent to or implied by pte_read(). Hence implementations of
pte_user_accessible_page() are specialised.
Signed-off-by: Rohan McLure
---
v9: New implementation
v10: Let book3s/64 use pte_user(), but otherwise default other platforms
to
BUILD_BUG().
Signed-off-by: Rohan McLure
---
v11: pud_pfn() stub has been removed upstream as it has valid users now
in transparent hugepages. Create a BUG_ON() for other, non Book3S64
platforms.
v12: Add missing return line to stub.
---
arch/powerpc/include/asm/pgtable.h | 9 +
1 file
table check on powerpc.
Signed-off-by: Rohan McLure
---
arch/arm64/include/asm/pgtable.h | 6 +++---
arch/riscv/include/asm/pgtable.h | 6 +++---
arch/x86/include/asm/pgtable.h | 6 +++---
mm/page_table_check.c| 12 ++--
4 files changed, 15 insertions(+), 15 deletions
ead in the address of the access.
Signed-off-by: Rohan McLure
---
arch/arm64/include/asm/pgtable.h | 2 +-
arch/riscv/include/asm/pgtable.h | 2 +-
arch/x86/include/asm/pgtable.h | 4 ++--
include/linux/page_table_check.h | 11 +++
include/linux/pgtable.h | 2 +-
mm/page_tab
.
Signed-off-by: Rohan McLure
---
arch/arm64/include/asm/pgtable.h | 2 +-
arch/riscv/include/asm/pgtable.h | 2 +-
include/linux/page_table_check.h | 12 +++-
include/linux/pgtable.h | 2 +-
mm/page_table_check.c| 4 ++--
5 files changed, 12 insertions(+), 10
ead in the address of the access.
Signed-off-by: Rohan McLure
---
arch/arm64/include/asm/pgtable.h | 2 +-
arch/riscv/include/asm/pgtable.h | 2 +-
arch/x86/include/asm/pgtable.h | 2 +-
include/linux/page_table_check.h | 11 +++
include/linux/pgtable.h | 2 +-
mm/page_tab
ned-off-by: Rohan McLure
---
arch/arm64/include/asm/pgtable.h | 2 +-
arch/riscv/include/asm/pgtable.h | 2 +-
arch/x86/include/asm/pgtable.h | 2 +-
include/linux/page_table_check.h | 11 +++
mm/page_table_check.c| 3 ++-
5 files changed, 12 insertions(+), 8 deletion
/linuxppc-dev/20230214015939.1853438-1-rmcl...@linux.ibm.com/
v5:
Link:
https://lore.kernel.org/linuxppc-dev/20221118002146.25979-1-rmcl...@linux.ibm.com/
Rohan McLure (11):
mm/page_table_check: Reinstate address parameter in
[__]page_table_check_pud_set()
mm/page_table_check: Reinstate
ned-off-by: Rohan McLure
---
arch/arm64/include/asm/pgtable.h | 4 ++--
arch/riscv/include/asm/pgtable.h | 4 ++--
arch/x86/include/asm/pgtable.h | 4 ++--
include/linux/page_table_check.h | 11 +++
mm/page_table_check.c| 3 ++-
5 files changed, 15 insertions(+), 11
On Thu, 2024-03-28 at 10:28 +0100, Ingo Molnar wrote:
>
> * Rohan McLure wrote:
>
> > Rohan McLure (11):
> > Revert "mm/page_table_check: remove unused parameter in
> > [__]page_table_check_pud_set"
> > Revert "mm/page_table_check: remove unus
On Thu, 2024-03-28 at 05:40 +, Christophe Leroy wrote:
>
>
> Le 28/03/2024 à 05:55, Rohan McLure a écrit :
> > Page table checking depends on architectures providing an
> > implementation of p{te,md,ud}_user_accessible_page. With
> > refactorisati
, addr parameters from __set_pte_at()
This commit also changed calls to __set_pte_at() to use fewer parameters
on riscv. Keep that change rather than reverting it, as the signature of
__set_pte_at() is changed in a different commit.
Signed-off-by: Rohan McLure
---
arch/arm64/include/asm/pgtable.h
BUILD_BUG().
Signed-off-by: Rohan McLure
---
v11: pud_pfn() stub has been removed upstream as it has valid users now
in transparent hugepages. Create a BUG_ON() for other, non Book3S64
platforms.
---
arch/powerpc/include/asm/pgtable.h | 8
1 file changed, 8 insertions(+)
diff --git a
.
Signed-off-by: Rohan McLure
---
arch/arm64/include/asm/pgtable.h | 2 +-
arch/riscv/include/asm/pgtable.h | 2 +-
include/linux/page_table_check.h | 12 +++-
include/linux/pgtable.h | 2 +-
mm/page_table_check.c| 4 ++--
5 files changed, 12 insertions(+), 10
support in commit 3fee229a8eb9 ("riscv/mm: enable
ARCH_SUPPORTS_PAGE_TABLE_CHECK")
arm64 in commit 42b2547137f5 ("arm64/mm: enable
ARCH_SUPPORTS_PAGE_TABLE_CHECK")
x86_64 in commit d283d422c6c4 ("x86: mm: add x86_64 support for page table
check")
Reviewed-by: Christophe Lero
r required to be present on all platforms as it
may be equivalent to or implied by pte_read(). Hence implementations of
pte_user_accessible_page() are specialised.
Signed-off-by: Rohan McLure
---
v9: New implementation
v10: Let book3s/64 use pte_user(), but otherwise default other platforms
to
early-boot usages which should not be
instrumented.
Signed-off-by: Rohan McLure
---
v9: New patch
v10: don't reuse __set_pte_at(), as that will not apply filters. Instead
use new set_pte_at_unchecked().
v11: Include the assertion that hwvalid => !protnone. It is possible that
some of these c
table check on powerpc.
Signed-off-by: Rohan McLure
---
arch/arm64/include/asm/pgtable.h | 6 +++---
arch/riscv/include/asm/pgtable.h | 6 +++---
arch/x86/include/asm/pgtable.h | 6 +++---
mm/page_table_check.c| 12 ++--
4 files changed, 15 insertions(+), 15 deletions
This reverts commit aa232204c4689427cefa55fe975692b57291523a.
Reinstate previously unused parameters for the purpose of supporting
powerpc platforms, as many do not encode user/kernel ownership of the
page in the pte, but instead in the address of the access.
Signed-off-by: Rohan McLure
This reverts commit 1831414cd729a34af937d56ad684a66599de6344.
Reinstate previously unused parameters for the purpose of supporting
powerpc platforms, as many do not encode user/kernel ownership of the
page in the pte, but instead in the address of the access.
Signed-off-by: Rohan McLure
This reverts commit 931c38e16499a057e30a3033f4d6a9c242f0f156.
Reinstate previously unused parameters for the purpose of supporting
powerpc platforms, as many do not encode user/kernel ownership of the
page in the pte, but instead in the address of the access.
Signed-off-by: Rohan McLure
/20230214015939.1853438-1-rmcl...@linux.ibm.com/
v5:
Link:
https://lore.kernel.org/linuxppc-dev/20221118002146.25979-1-rmcl...@linux.ibm.com/
Rohan McLure (11):
Revert "mm/page_table_check: remove unused parameter in
[__]page_table_check_pud_set"
Revert "mm/page_table_check
, addr parameters from __set_pte_at()
This commit also changed calls to __set_pte_at() to use fewer parameters
on riscv. Keep that change rather than reverting it, as the signature of
__set_pte_at() is changed in a different commit.
Signed-off-by: Rohan McLure
---
arch/arm64/include/asm/pgtable.h
table check on powerpc.
Signed-off-by: Rohan McLure
---
arch/arm64/include/asm/pgtable.h | 6 +++---
arch/riscv/include/asm/pgtable.h | 6 +++---
arch/x86/include/asm/pgtable.h | 6 +++---
mm/page_table_check.c| 12 ++--
4 files changed, 15 insertions(+), 15 deletions
parameter.
Signed-off-by: Rohan McLure
---
arch/arm64/include/asm/pgtable.h | 2 +-
arch/riscv/include/asm/pgtable.h | 2 +-
include/linux/page_table_check.h | 12 +++-
include/linux/pgtable.h | 2 +-
mm/page_table_check.c| 4 ++--
5 files changed, 12 insertions(+), 10
This reverts commit 1831414cd729a34af937d56ad684a66599de6344.
Reinstate previously unused parameters for the purpose of supporting
powerpc platforms, as many do not encode user/kernel ownership of the
page in the pte, but instead in the address of the access.
Signed-off-by: Rohan McLure
/linuxppc-dev/20221118002146.25979-1-rmcl...@linux.ibm.com/
Rohan McLure (12):
Revert "mm/page_table_check: remove unused parameter in
[__]page_table_check_pud_set"
Revert "mm/page_table_check: remove unused parameter in
[__]page_table_check_pmd_set"
mm: Provi
Replace occurrences of p{u,m,4}d_is_leaf with p{u,m,4}_leaf, as the
latter is the name given to checking that a higher-level entry in
multi-level paging contains a page translation entry (pte) throughout
all other archs.
Reviewed-by: Christophe Leroy
Signed-off-by: Rohan McLure
---
v9: No
support in commit 3fee229a8eb9 ("riscv/mm: enable
ARCH_SUPPORTS_PAGE_TABLE_CHECK")
arm64 in commit 42b2547137f5 ("arm64/mm: enable
ARCH_SUPPORTS_PAGE_TABLE_CHECK")
x86_64 in commit d283d422c6c4 ("x86: mm: add x86_64 support for page table
check")
Reviewed-by: Christophe Lero
, addr parameters from __set_pte_at()
This commit also changed calls to __set_pte_at() to use fewer parameters
on riscv. Keep that change rather than reverting it, as the signature of
__set_pte_at() is changed in a different commit.
Signed-off-by: Rohan McLure
---
arch/arm64/include/asm/pgtable.h
r required to be present on all platforms as it
may be equivalent to or implied by pte_read(). Hence implementations are
specialised.
Signed-off-by: Rohan McLure
---
v9: New implementation
v10: Let book3s/64 use pte_user(), but otherwise default other platforms
to using the address provided with t
early-boot usages which should not be
instrumented.
Signed-off-by: Rohan McLure
---
v9: New patch
v10: don't reuse __set_pte_at(), as that will not apply filters. Instead
use new set_pte_at_unchecked().
---
arch/powerpc/include/asm/pgtable.h | 2 ++
arch/powerpc/mm/book3s64/hash_pgtable.c
This reverts commit aa232204c4689427cefa55fe975692b57291523a.
Reinstate previously unused parameters for the purpose of supporting
powerpc platforms, as many do not encode user/kernel ownership of the
page in the pte, but instead in the address of the access.
Signed-off-by: Rohan McLure
This reverts commit 931c38e16499a057e30a3033f4d6a9c242f0f156.
Reinstate previously unused parameters for the purpose of supporting
powerpc platforms, as many do not encode user/kernel ownership of the
page in the pte, but instead in the address of the access.
Signed-off-by: Rohan McLure
, addr parameters from __set_pte_at()
This commit also changed calls to __set_pte_at() to use fewer parameters
on riscv. Keep that change rather than reverting it, as the signature of
__set_pte_at() is changed in a different commit.
Signed-off-by: Rohan McLure
---
arch/arm64/include/asm/pgtable.h
.
Signed-off-by: Rohan McLure
---
arch/powerpc/include/asm/pgtable.h | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/powerpc/include/asm/pgtable.h
b/arch/powerpc/include/asm/pgtable.h
index 0c0ffbe7a3b5..13f661831333 100644
--- a/arch/powerpc/include/asm/pgtable.h
+++ b
On 11/30/23 18:35, Christophe Leroy wrote:
>
> Le 30/11/2023 à 03:53, Rohan McLure a écrit :
>> For 32-bit systems which have no usecases for p{m,u}d_pte() prior to
>> page table checking, implement default stubs.
> Is that the best solution ?
>
> If I understand corre
uninstrumented by page table check.
set_ptes() is itself implemented by calls to __set_pte_at(), so this
eliminates redundant code.
Also prefer __set_pte_at() in early-boot usages which should not be
instrumented.
Signed-off-by: Rohan McLure
---
v9: New patch
---
arch/powerpc/mm/book3s64/hash_pgtable.c
.
Reviewed-by: Christophe Leroy
Signed-off-by: Rohan McLure
---
v9: No longer required in order implement page table check, just
refactoring.
---
arch/powerpc/include/asm/book3s/32/pgtable.h | 5 +
arch/powerpc/include/asm/book3s/64/pgtable.h | 10 -
arch/powerpc/include/asm/nohash/64
.
Signed-off-by: Rohan McLure
---
arch/powerpc/include/asm/pgtable.h | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/powerpc/include/asm/pgtable.h
b/arch/powerpc/include/asm/pgtable.h
index db0231afca9d..9c0f2151f08f 100644
--- a/arch/powerpc/include/asm/pgtable.h
+++ b
they may be referenced in generic code.
Reviewed-by: Christophe Leroy
Signed-off-by: Rohan McLure
---
v9: No longer required in order to implement page table check, just a
refactor.
---
arch/powerpc/kvm/book3s_64_mmu_radix.c | 12 ++--
arch/powerpc/mm/book3s64/radix_pgtable.c | 14
support in commit 3fee229a8eb9 ("riscv/mm: enable
ARCH_SUPPORTS_PAGE_TABLE_CHECK")
arm64 in commit 42b2547137f5 ("arm64/mm: enable
ARCH_SUPPORTS_PAGE_TABLE_CHECK")
x86_64 in commit d283d422c6c4 ("x86: mm: add x86_64 support for page table
check")
Reviewed-by: Christophe Lero
r required to be present on all platforms as it
may be equivalent to or implied by pte_read(). Hence implementations are
specialised.
Signed-off-by: Rohan McLure
---
v9: New implementation
---
arch/powerpc/include/asm/book3s/32/pgtable.h | 5 +
arch/powerpc/include/asm/book3s/64/pgta
For 32-bit systems which have no usecases for p{m,u}d_pte() prior to
page table checking, implement default stubs.
Signed-off-by: Rohan McLure
---
v9: New patch
---
arch/powerpc/include/asm/book3s/64/pgtable.h | 3 +++
arch/powerpc/include/asm/nohash/64/pgtable.h | 2 ++
arch/powerpc/include
-dev/20221118002146.25979-1-rmcl...@linux.ibm.com/
Rohan McLure (7):
powerpc: mm: Replace p{u,m,4}d_is_leaf with p{u,m,4}_leaf
powerpc: mm: Implement p{m,u,4}d_leaf on all platforms
powerpc: mm: Add common pud_pfn stub for all platforms
powerpc: mm: Default p{m,u}d_pte implementations
-off-by: Rohan McLure
---
arch/powerpc/kernel/irq_64.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/kernel/irq_64.c b/arch/powerpc/kernel/irq_64.c
index 938e66829eae..1b7e8ebb052a 100644
--- a/arch/powerpc/kernel/irq_64.c
+++ b/arch/powerpc/kernel/irq_64.c
observed to compile without inlining these routines,
which would lead to grief on NMI handlers.
Signed-off-by: Rohan McLure
---
arch/powerpc/include/asm/interrupt.h | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/powerpc/include/asm/interrupt.h
b/arch/powerpc
to correct
behaviour.
Signed-off-by: Rohan McLure
Reported-by: Michael Ellerman
Reported-by: Gautam Menghani
Tested-by: Gautam Menghani
Acked-by: Arnd Bergmann
---
Previously discussed here:
https://lore.kernel.org/linuxppc-dev/20230510033117.1395895-4-rmcl...@linux.ibm.com/
But pushed back
On Wed May 10, 2023 at 1:31 PM AEST, Rohan McLure wrote:
> Prior to this patch, data races are detectable by KCSAN of the following
> forms:
>
> [1] Asynchronous calls to mmiowb_set_pending() from an interrupt context
>or otherwise outside of a critical section
> [2] In
On 23 May 2023, at 10:28 am, Rohan McLure wrote:
>
> On Wed May 10, 2023 at 1:31 PM AEST, Rohan McLure wrote:
>> Prior to this patch, data races are detectable by KCSAN of the following
>> forms:
>>
>> [1] Asynchronous calls to mmiowb_set_pending() from an interr
> On 15 May 2023, at 3:50 pm, Nicholas Piggin wrote:
>
> On Wed May 10, 2023 at 1:31 PM AEST, Rohan McLure wrote:
>> The power_save callback can be overwritten by another core at boot time.
>> Specifically, null values will be replaced exactly once with the callbac
> On 15 May 2023, at 3:53 pm, Nicholas Piggin wrote:
>
> On Wed May 10, 2023 at 1:31 PM AEST, Rohan McLure wrote:
>> Mark writes to hypervisor ipi state so that KCSAN recognises these
>> asynchronous issue of kvmppc_{set,clear}_host_ipi to be intended, with
>> atomi
is aware of when it is scheduled. Also removes extraneous
KCSAN warnings.
Signed-off-by: Rohan McLure
Reviewed-by: Nicholas Piggin
---
arch/powerpc/platforms/powernv/opal-irqchip.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/platforms/powernv/opal
ngs.
Signed-off-by: Rohan McLure
---
arch/powerpc/kernel/irq.c | 2 +-
arch/powerpc/platforms/powernv/pci-ioda.c | 12 ++--
include/linux/irq.h | 2 +-
kernel/irq/irqdomain.c| 4 ++--
4 files changed, 10 insertions(+), 10 deleti
writes, but annotate with
data_race.
Signed-off-by: Rohan McLure
Reported-by: Michael Ellerman
Reviewed-by: Nicholas Piggin
---
arch/powerpc/include/asm/ptrace.h | 4 ++--
arch/powerpc/kernel/interrupt.c | 14 ++
2 files changed, 8 insertions(+), 10 deletions(-)
diff --git a/arch
Mark writes to hypervisor ipi state so that KCSAN recognises these
asynchronous issue of kvmppc_{set,clear}_host_ipi to be intended, with
atomic writes. Mark asynchronous polls to this variable in
kvm_ppc_read_one_intr().
Signed-off-by: Rohan McLure
---
v2: Add read-side annotations to both
memory accesses with READ_ONCE or
WRITE_ONCE, including increments and decrements to nesting_count. This
has the effect of removing KCSAN warnings at consumer's callsites.
Signed-off-by: Rohan McLure
Reported-by: Michael Ellerman
Reported-by: Gautam Menghani
Tested-by: Gautam Menghani
Acked-by:
is expected. Mark write for message source in
smp_muxed_ipi_set_message().
Signed-off-by: Rohan McLure
---
v2: Add missing WRITE_ONCE() in smp_muxed_ipi_set_message().
---
arch/powerpc/kernel/smp.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/kernel/smp.c b
: Rohan McLure
---
v2: Remove extraneous WRITE_ONCE on paca thread_idle_state, which are
only read diagnostically.
---
arch/powerpc/include/asm/paca.h | 1 +
arch/powerpc/platforms/powernv/idle.c | 16 +---
2 files changed, 10 insertions(+), 7 deletions(-)
diff --git a/arch
sees unmarked reads to the callback
variable, and notices that unfortunate compiler reorderings could lead
to distinct function pointers being read. In reality this is impossible,
so don't instrument at this read.
Signed-off-by: Rohan McLure
---
v2: Mark instances at init where the callba
The powerpc implemenation of qspinlocks will both poll and spin on the
bitlock guarding a qnode. Mark these accesses with READ_ONCE to convey
to KCSAN that polling is intentional here.
Signed-off-by: Rohan McLure
Reviewed-by: Nicholas Piggin
---
arch/powerpc/lib/qspinlock.c | 4 ++--
1 file
The opal-async.c unit contains code for polling event sources, which
implies intentional data races. Ensure that the compiler will atomically
access such variables by means of {READ,WRITE}_ONCE calls, which in turn
inform KCSAN that polling behaviour is intended.
Signed-off-by: Rohan McLure
ocked' attribute is guaranteed to
terminate prior to the node being visible, KCSAN still complains that
the write is reorderable by the compiler. Issue a kcsan_release() to
inform KCSAN of the release barrier contained in publish_tail_cpu().
Signed-off-by: Rohan McLure
---
v2: Remove extraneou
for power_save callback to remove instrumentation, as
there is no real data race
Rohan McLure (11):
powerpc: qspinlock: Mark accesses to qnode lock checks
powerpc: qspinlock: Enforce qnode writes prior to publishing to queue
asm-generic/mmiowb: Mark accesses to fix KCSAN warnings
powerpc: Mar
> On 9 May 2023, at 12:26 pm, Nicholas Piggin wrote:
>
> On Mon May 8, 2023 at 12:01 PM AEST, Rohan McLure wrote:
>> The idle_state entry in the PACA on PowerNV features a bit which is
>> atomically tested and set through ldarx/stdcx. to be used as a spinlock.
>> This
> On 9 May 2023, at 12:04 pm, Nicholas Piggin wrote:
>
> On Mon May 8, 2023 at 12:01 PM AEST, Rohan McLure wrote:
>> Use a compiler barrier to enforce that all fields of a new struct qnode
>> be written to (especially the lock value) before publishing the qnod
> On 9 May 2023, at 12:01 pm, Nicholas Piggin wrote:
>
> On Mon May 8, 2023 at 12:01 PM AEST, Rohan McLure wrote:
>> A comment accompanying the locked attribute of a qnode assigns a value
>> of 1 to mean that the lock has been acquired. The usages of this
>> varia
is aware of when it is scheduled. Also removes extraneous
KCSAN warnings.
Signed-off-by: Rohan McLure
---
arch/powerpc/platforms/powernv/opal-irqchip.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/platforms/powernv/opal-irqchip.c
b/arch/powerpc/platforms
The powerpc implemenation of qspinlocks will both poll and spin on the
bitlock guarding a qnode. Mark these accesses with READ_ONCE to convey
to KCSAN that polling is intentional here.
Signed-off-by: Rohan McLure
---
arch/powerpc/lib/qspinlock.c | 4 ++--
1 file changed, 2 insertions(+), 2
acceptable, as well as to rule-out the possibility for compiler reorderings
leading to calling a null pointer.
Signed-off-by: Rohan McLure
---
arch/powerpc/kernel/idle.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/kernel/idle.c b/arch/powerpc/kernel/idle.c
The opal-async.c unit contains code for polling event sources, which
implies intentional data races. Ensure that the compiler will atomically
access such variables by means of {READ,WRITE}_ONCE calls, which in turn
inform KCSAN that polling behaviour is intended.
Signed-off-by: Rohan McLure
writes, but annotate with
data_race.
Signed-off-by: Rohan McLure
Reported-by: Michael Ellerman
---
arch/powerpc/include/asm/ptrace.h | 4 ++--
arch/powerpc/kernel/interrupt.c | 14 ++
2 files changed, 8 insertions(+), 10 deletions(-)
diff --git a/arch/powerpc/include/asm/ptrace.h
b
ngs.
Signed-off-by: Rohan McLure
---
arch/powerpc/kernel/irq.c | 2 +-
arch/powerpc/platforms/powernv/pci-ioda.c | 12 ++--
include/linux/irq.h | 2 +-
kernel/irq/irqdomain.c| 4 ++--
4 files changed, 10 insertions(+), 10 deleti
is expected.
Signed-off-by: Rohan McLure
---
arch/powerpc/kernel/smp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c
index 6b90f10a6c81..00b74d66b771 100644
--- a/arch/powerpc/kernel/smp.c
+++ b/arch/powerpc/kernel/smp.c
27;s qspinlock interpretation
to reflect the comment beside this field
Rohan McLure (12):
powerpc: qspinlock: Fix qnode->locked value interpretation
powerpc: qspinlock: Mark accesses to qnode lock checks
powerpc: qspinlock: Enforce qnode writes prior to publishing to queue
asm-gen
Mark writes to hypervisor ipi state so that KCSAN recognises these
asynchronous issue of kvmppc_{set,clear}_host_ipi to be intended, with
atomic writes.
Signed-off-by: Rohan McLure
---
arch/powerpc/include/asm/kvm_ppc.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a
: Rohan McLure
---
arch/powerpc/include/asm/paca.h | 1 +
arch/powerpc/platforms/powernv/idle.c | 20 +++-
2 files changed, 12 insertions(+), 9 deletions(-)
diff --git a/arch/powerpc/include/asm/paca.h b/arch/powerpc/include/asm/paca.h
index da0377f46597..cb325938766a
Use a compiler barrier to enforce that all fields of a new struct qnode
be written to (especially the lock value) before publishing the qnode to
the waitqueue.
Signed-off-by: Rohan McLure
---
arch/powerpc/lib/qspinlock.c | 4
1 file changed, 4 insertions(+)
diff --git a/arch/powerpc/lib
memory accesses with READ_ONCE or
WRITE_ONCE, including increments and decrements to nesting_count. This
has the effect of removing KCSAN warnings at consumer's callsites.
Signed-off-by: Rohan McLure
Reported-by: Michael Ellerman
Reported-by: Gautam Menghani
---
include/asm-generic/mmiowb.h
A comment accompanying the locked attribute of a qnode assigns a value
of 1 to mean that the lock has been acquired. The usages of this
variable however assume opposite semantics. Update usages so that the
assertions of this comment are reflected in this file.
Signed-off-by: Rohan McLure
Anyone got time to review this one?
> On 16 Feb 2023, at 10:11 am, Rohan McLure wrote:
>
> Support the page table check sanitiser on all PowerPC platforms. This
> sanitiser works by serialising assignments, reassignments and clears of
> page table entries at each level in order
> On 16 Feb 2023, at 7:09 pm, Marco Elver wrote:
>
> On Thu, Feb 16, 2023 at 07:12AM +, Christophe Leroy wrote:
>>
>>
>> Le 16/02/2023 à 06:09, Rohan McLure a écrit :
>>> KCSAN instruments calls to atomic builtins, and will in turn call these
>>
> On 16 Feb 2023, at 6:14 pm, Christophe Leroy
> wrote:
>
>
>
> Le 16/02/2023 à 06:09, Rohan McLure a écrit :
>> Enable HAVE_ARCH_KCSAN on all powerpc platforms, permitting use of the
>> kernel concurrency sanitiser through the CONFIG_KCSAN_* kconfig options.
>
use BUG() to assert
unreachability.
In commit 725aea873261 ("xtensa: enable KCSAN"), xtensa implements these
locally. Move these definitions to be accessible to all 32-bit
architectures that do not provide the necessary builtins, with opt in
for PowerPC and xtensa.
Signed-off-by: Ro
: Rohan McLure
---
New patch
---
arch/powerpc/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 2c9cdf1d8761..45771448d47a 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -197,7 +197,7 @@ config PPC
rm64/mm: enable
ARCH_SUPPORTS_PAGE_TABLE_CHECK")
x86_64 in commit d283d422c6c4 ("x86: mm: add x86_64 support for page table
check")
Reviewed-by: Christophe Leroy
Signed-off-by: Rohan McLure
---
V2: Update spacing and types assigned to pte_update calls.
V3: Update one last pte_update call
Book3S/nohash 32-bit systems.
Reviewed-by: Christophe Leroy
Signed-off-by: Rohan McLure
---
V2: Provide missing pud_user implementations, use p{u,m}d_is_leaf.
V3: Provide missing pmd_user implementations as stubs in 32-bit.
V4: Use pmd_leaf, pud_leaf, and define pmd_user for 32 Book3E with
static
.
Signed-off-by: Rohan McLure
---
V2: Remove conditional BUILD_BUG and BUG. Instead warn on usage.
V3: Replace WARN with WARN_ONCE, which should suffice to demonstrate
misuse of puds.
---
arch/powerpc/include/asm/book3s/64/pgtable.h | 10 --
arch/powerpc/include/asm/pgtable.h | 14
.
Reviewed-by: Christophe Leroy
Signed-off-by: Rohan McLure
---
v5: Split patch that replaces p{m,u,4}d_is_leaf into two patches, first
replacing callsites and afterward providing generic definition.
Remove ifndef-defines implementing p{m,u}d_leaf in favour of
implementing stubs in headers
they may be referenced in generic code.
Reviewed-by: Christophe Leroy
Signed-off-by: Rohan McLure
---
V4: New patch
V5: Previously replaced stub definition for *_is_leaf with *_leaf. Do
that in a later patch
---
arch/powerpc/kvm/book3s_64_mmu_radix.c | 12 ++--
arch/powerpc/mm/book3s64
vma and calls __pmdp_collapse_flush. The mm_struct * parameter
is needed in a future patch providing Page Table Check support,
which is defined in terms of mm context objects.
Signed-off-by: Rohan McLure
---
v6: New patch
v7: Remove explicit `return' in macro. Prefix macro args with __
---
e not to be, permitting for uninstrumented
internal mappings. This distinction in names is also present in x86.
Reviewed-by: Christophe Leroy
Signed-off-by: Rohan McLure
---
v6: new patch
v7: Remove extern, move set_pte args to be in a single line.
---
arch/powerpc/include/asm/book3s/pgtable.
...@linux.ibm.com/
v5:
Link:
https://lore.kernel.org/linuxppc-dev/20221118002146.25979-1-rmcl...@linux.ibm.com/
Rohan McLure (7):
powerpc: mm: Separate set_pte, set_pte_at for internal, external use
powerpc/64s: mm: Introduce __pmdp_collapse_flush with mm_struct
argument
powerpc: mm
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