Re: [PATCH 00/10 v6] Fix 8xx MMU/TLB

2009-11-20 Thread Rex Feany
Thus spake Joakim Tjernlund (joakim.tjernl...@transmode.se): > Yet again an iteration of the series. > Rex & Scott, please test and signoff. > Changes since last version: > - Fix rlwimi insn(from Scott) Hi Joakim, Things look much better with this patch set, I see none of the random crashes tha

Re: [PATCH 0/8] Fix 8xx MMU/TLB

2009-10-16 Thread Rex Feany
Thus spake Joakim Tjernlund (joakim.tjernl...@transmode.se): > Right, it is the pte table walk that is blowing up. > I just noted that 2.6 lacks a tophys() call in its table walk > so I removed that one(there is one more tophys call but I don't think > it should be removed). > Try this addon patch

Re: [PATCH 0/8] Fix 8xx MMU/TLB

2009-10-15 Thread Rex Feany
arch/powerpc/kernel/head_8xx.o: In function `FixupDAR': /home/rfeany/src/lnxnm/linux-dev/arch/powerpc/kernel/head_8xx.S:576: undefined reference to `DARfix' With all of your patches applied I have this problem: open("/proc/mounts", O_RDONLY) = 3 fstat64(0x3, 0x7fc6ad58)=

Re: I think I have 8xx working...

2009-10-14 Thread Rex Feany
Thus spake Benjamin Herrenschmidt (b...@kernel.crashing.org): > On Wed, 2009-10-14 at 17:41 -0700, Rex Feany wrote: > > The biggest problem for me turned out to be the MMU context IDs being > > clamped to 32 when the 8xx only has 16. With this, things are a bit more > > s

I think I have 8xx working...

2009-10-14 Thread Rex Feany
The biggest problem for me turned out to be the MMU context IDs being clamped to 32 when the 8xx only has 16. With this, things are a bit more stable :) diff --git a/arch/powerpc/mm/mmu_context_nohash.c b/arch/powerpc/mm/mmu_context_nohash.c index c2f93dc..15e00c5 100644 --- a/arch/powerpc/mm/mmu

Re: [PATCH 0/6] 8xx MMU fixes

2009-10-08 Thread Rex Feany
Thus spake Joakim Tjernlund (joakim.tjernl...@transmode.se): > Rex Feany wrote on 09/10/2009 02:15:27: > > open("/proc/mounts", O_RDONLY) = 3 > > fstat64(0x3, 0x7fe7e2a8)= 0 > > mmap(NULL, 4096, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_ANON

Re: [PATCH 0/6] 8xx MMU fixes

2009-10-08 Thread Rex Feany
Thus spake Joakim Tjernlund (joakim.tjernl...@transmode.se): > So here we go again. This time I am > fairly confindent I got most things correct :) > Also manged to use even less instructions in the > TLB Miss handlers. > > Scott and Rex, forget previous versions and > try this one out. This pat

Re: [PATCH 0/6] PowerPc 8xx TLB/MMU fixes

2009-10-05 Thread Rex Feany
Thus spake Joakim Tjernlund (joakim.tjernl...@transmode.se): > > I got this oops: > > > > Unable to handle kernel paging request for data at address 0x > > Faulting instruction address: 0xc000e110 > > Oops: Kernel access of bad area, sig: 11 [#1] > > MRV NM2 > > NIP: c000e110 LR: c000d520

Re: [PATCH 0/6] PowerPc 8xx TLB/MMU fixes

2009-10-05 Thread Rex Feany
Thus spake Joakim Tjernlund (joakim.tjernl...@transmode.se): > Scott and Rex, please disregard other patches from me and > try these out instead. I have results similar to Scott's. I tried both with and without patch 5 & 6, and I also need the tlbia_va in ptep_set_access_flags(). I got this oop

Re: [PATCH] powerpc/8xx: fix regression introduced by cache coherency rewrite

2009-09-30 Thread Rex Feany
Thus spake Joakim Tjernlund (joakim.tjernl...@transmode.se): > > Ok, I have made some minor tweaks and added debug code in > > do_page_fault(). Would be great if you could try on both > > .31 and top of tree. > > > > Jocke > > OOPS, found a bug. Use this one instead: .31 - no change, it worked

Re: [PATCH] powerpc/8xx: fix regression introduced by cache coherency rewrite

2009-09-29 Thread Rex Feany
Thus spake Benjamin Herrenschmidt (b...@kernel.crashing.org): > On Mon, 2009-09-28 at 18:21 -0700, Rex Feany wrote: > > > It's going to be hard for me to get that "right" since I don't really > > > know what's going on with the core here, but I supp

Re: [PATCH] powerpc/8xx: fix regression introduced by cache coherency rewrite

2009-09-29 Thread Rex Feany
Thus spake Joakim Tjernlund (joakim.tjernl...@transmode.se): > Benjamin Herrenschmidt wrote on 29/09/2009 > 10:16:38: > > > > > > > hmm, yes. You do get this and mysterious SEGV if you hit the but so does > > > other bugs too so this is probably due to missing invalidation. > > > > > > I suspect

Re: [PATCH] powerpc/8xx: fix regression introduced by cache coherency rewrite

2009-09-28 Thread Rex Feany
Thus spake Benjamin Herrenschmidt (b...@kernel.crashing.org): > On Thu, 2009-09-24 at 18:35 -0700, Rex Feany wrote: > > > > Then I can boot and get to a shell, but userspace is slow. 8 seconds > > to mount > > /proc (vs. less then a second using my old kernel)! May

Re: [PATCH] powerpc/8xx: fix regression introduced by cache coherency rewrite

2009-09-25 Thread Rex Feany
Thus spake Benjamin Herrenschmidt (b...@kernel.crashing.org): > > > I think there's more finishyness to 8xx than we thought. IE. That > > tlbil_va might have more reasons to be there than what the comment > > seems to advertize. Can you try to move it even higher up ? IE. > > Unconditionally at t

Re: [PATCH] powerpc/8xx: fix regression introduced by cache coherency rewrite

2009-09-24 Thread Rex Feany
Thus spake Benjamin Herrenschmidt (b...@kernel.crashing.org): > > Your tree hangs on boot, similar to what I saw without the 8xx > > work-around patch -- it is hard to tell if it is the same though. :( > > There's no backtrace ? Where does it hang ? Also which workaround > patch ? The missing tlb

Re: [PATCH] powerpc/8xx: fix regression introduced by cache coherency rewrite

2009-09-24 Thread Rex Feany
Thus spake Benjamin Herrenschmidt (b...@kernel.crashing.org): > You can get my tree at: > > git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc.git > > (To get the "merge" branch, just add "merge" after the clone if you > are cloning it, or just create a local branch and manually pull > i

Re: [PATCH] powerpc/mm: Fix 40x and 8xx vs. _PAGE_SPECIAL

2009-09-23 Thread Rex Feany
Thus spake Benjamin Herrenschmidt (b...@kernel.crashing.org): > Hrm. This is really strange... Is this a problem? in pte-8xx.h you added: +#define _PAGE_SPECIAL 0x0008 /* SW entry, forced to 0 by the TLB miss */ but there is already this: #define _PAGE_EXEC 0x0008 /* software: i-cache

[PATCH] powerpc/8xx: fix regression introduced by cache coherency rewrite

2009-09-23 Thread Rex Feany
: Rex Feany diff --git a/arch/powerpc/mm/pgtable.c b/arch/powerpc/mm/pgtable.c index 627767d..d8e6725 100644 --- a/arch/powerpc/mm/pgtable.c +++ b/arch/powerpc/mm/pgtable.c @@ -30,6 +30,8 @@ #include #include +#include "mmu_decl.h" + static DEFINE_PER_CPU(struct pte_free

Re: [PATCH] powerpc/mm: Fix 40x and 8xx vs. _PAGE_SPECIAL

2009-09-23 Thread Rex Feany
Thus spake Benjamin Herrenschmidt (b...@kernel.crashing.org): > Bernhard, Rex, please let me know if that works for you. it doesn't work for me, it crashes differently then before though! This patch worked for me: > > Signed-off-by: Bernhard Weirich > --- linux/arch/powerpc/include/asm/pte-com