We have a problem to communicate with a register, CS4, at at 0x1002. In
U-boot that reg has the value 0x45fab3c1, but when we try to access it we get:
0x10101010 and we are not able to write too.
With CS3 everything seems ok, we can read and write. CS3 is at: 0x1000.
The main/only diff
We have a custom board with mpc5200b and a xilinx virtex-4. Where could we find
some information how to integrate it in your linux 2.6.33?
At the moment we have CS4 mapped on it at the address 0x1002 and we are not
able to read/write. Via u-boot we can access CS4...
Thank you
Lorenzo
___
Gustschin wrote:
> Hi Lorenzo,
>
> On Tue, 19 Nov 2013 11:20:24 +0100
> neorf3k wrote:
>
>> Hello Anatolij, this is our code, used at University, but again it doesn’t
>> work…
>>
>> How i told, the only information we have about that reg are:
>>
>>
Hello Anatolij, this is our code, used at University, but again it doesn’t work…
How i told, the only information we have about that reg are:
Chip select 4 specification:
Lp_cs4
bus size: 8 bit
bus control: 2 wait state R/W ACK disabled
size allocated: 4 KByte
Our Register 8 bit LP_cs4 (we want
allocated: 4 KByte
Our Register 8 bit LP_cs4 (we want to write)
cs4 offset: 0x001
Thank you again..
Lorenzo
On 16/nov/2013, at 03:29 PM, Anatolij Gustschin wrote:
> Hi Lorenzo,
>
> see my comments below.
>
> On Fri, 15 Nov 2013 17:27:30 +0100
> neorf3k wrote:
>
>&
d happen as follows:
>
> u8 regval;
>
> /* map 4kbyte reg. space */
> virt_base = ioremap(0x1002, 0x1000);
> if (!virt_base) {
> printk("fpga ioremap failed\n");
> return;
> }
>
> regval = in_8(virt_base);
>
> printk("
Sorry, the address is 0x1002.
I've executed this code:
/* code */
unsigned char *virt_base;
u8 regval;
/* map 4kbyte reg. space */
virt_base = ioremap(0x1002, 0x1000);
if (!virt_base) {
printk("fpga ioremap failed\n");
return;
}
regval =
:24 +0100
> neorf3k wrote:
>
>> Yes, that is a device on the lpb via an fpga. We have tried to configure
>> the chip select 4 configuration register at address MBAR + 0x0310, and it
>> seems to be ok. what do you mean with “chip select parameters”?
>
> I meant the se
strange thing, is that when we read in linux, at that address, we see other
content value…
Suggestions?
Thanks
Lorenzo
On 13/nov/2013, at 08:32 AM, Anatolij Gustschin wrote:
> On Tue, 12 Nov 2013 20:23:20 +0100
> neorf3k wrote:
>
>> we have tried to read and program an 8bit regi
we have tried to read and program an 8bit register with 32bit address. we have
mapped it with: ioremap, kmalloc etc… and then using: outb, iowrite8 etc.. but
when we write to it, the value doesn’t change… with other memory location is ok.
That is an 8 bit register, located at 0x1002 in a mpc5
Is possibile to force cpu:bus frequency ration in 2.6.33. kernel?
we have a custom board based on mpc5200b. this is our boot:
CPU: MPC5200B v2.2, Core v1.4 at 132 MHz
Bus 132 MHz, IPB 132 MHz, PCI 66 MHz
Board: Ran Controller Board
I2C: 85 kHz, ready
DRAM: 128 MB
FLASH: 64 MB
Thank you
Hello, this is our custom board's u-boot:
U-Boot 2009.08 (Apr 19 2010 - 05:35:19)
CPU: MPC5200B v2.2, Core v1.4 at 132 MHz
Bus 132 MHz, IPB 132 MHz, PCI 66 MHz
Board: Ran Controller Board
I2C: 85 kHz, ready
DRAM: 128 MB
FLASH: 64 MB
We have 1:1 CPU:bus
Hello, i'm developing an embedded linux system on a custom mpc5200b board, at
University.
We have a problem with a custom version of kernel: 2.6.23 and 2.6.33. We can't
use newer version at the moment.
We are able to compile and load the kernel on Freescale Lite5200b and on Custom
Board.
So,
Hello, i'm developing an embedded linux system on a custom mpc5200b board, at
University.
We have a problem with a custom version of kernel: 2.6.23 and 2.6.33. We can't
use newer version at the moment.
We are able to compile and load the kernel on Freescale Lite5200b and on Custom
Board.
So,
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