Clear TX registers on stop to prevent the SPDIF interface from sending
last written word over and over again.
Fixes: a2388a498ad2 ("ASoC: fsl: Add S/PDIF CPU DAI driver")
Signed-off-by: Matus Gajdos
---
sound/soc/fsl/fsl_spdif.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a
Add support for 22.05 kHz sample rate for TX.
Signed-off-by: Matus Gajdos
---
sound/soc/fsl/fsl_spdif.c | 8 ++--
sound/soc/fsl/fsl_spdif.h | 6 --
2 files changed, 10 insertions(+), 4 deletions(-)
diff --git a/sound/soc/fsl/fsl_spdif.c b/sound/soc/fsl/fsl_spdif.c
index 015c3708aa04
Otherwise bit clock remains running writing invalid data to the DAC.
Signed-off-by: Matus Gajdos
---
sound/soc/fsl/fsl_sai.c | 2 +-
sound/soc/fsl/fsl_sai.h | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c
index 5e09f634c61b