_sync_single_for_cpu(fep->dev,
>> - CBDR_BUFADDR(bdp),
>> - L1_CACHE_ALIGN(pkt_len),
>> - DMA_FROM_DEVICE);
>> }
>> } else {
>> skbn = netdev_alloc_skb(dev,
>> ENET_RX_FRSIZE);
>> --
>> 2.35.1
>>
--
Måns Rullgård
Måns Rullgård writes:
> Christoph Hellwig writes:
>
>> On Thu, Mar 18, 2021 at 05:54:55AM +, Al Viro wrote:
>>> On Thu, Mar 18, 2021 at 05:56:57AM +0100, Christoph Hellwig wrote:
>>> > Switch the alpha defconfig from the legacy ide driver to libata.
>
river works fine on my UP1500 machine, unless something
broke recently. I'll build the latest kernel and report back.
--
Måns Rullgård
alink,rt2880-uart", "ns16550a";
> reg = <0x10700 0x30>;
> interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
> clock-frequency = <7372800>;
> --
> 2.25.1
>
--
Måns Rullgård
drivers/watchdog/tangox_wdt.c | 6 +---
For tangox_wdt:
Acked-by: Mans Rullgard
--
Måns Rullgård
ps, build failure. Reverted for now.
>
> I suppose you have to pull material from Vinod.
The failure the build bot reported is due to the DMA patches not being
in the tree.
--
Måns Rullgård
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These sizes should be
selected properly to ensure error-free bus transfers. It is required
that the DMA write burst transfer does not cross the 8192-byte Data
FIS boundary, because the Transport Layer maintains the DMA state for
the duration of the Data FIS transmission.
--
Mån
Andy Shevchenko writes:
> On Sun, 2015-11-22 at 13:03 +0000, Måns Rullgård wrote:
>> Andy Shevchenko writes:
>>
>> > The SATA implementation based on two actually different devices,
>> > i.e. SATA and
>> > DMA controllers.
>> >
>>
on
the DW DMA controller? Presumably support for old device trees would
need to be retained for compatibility. Maybe checking for a "dmas"
property and falling back on the current behaviour if it's missing. My
goal is to get this driver working
