be called).
Signed-off-by: Kevin Brodsky
---
arch/arm64/mm/mmu.c | 43 +++
1 file changed, 23 insertions(+), 20 deletions(-)
diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c
index eca324b3a6fc..51cfc891f6a1 100644
--- a/arch/arm64/mm/mmu.c
+++ b/
The generic implementation of pte_{alloc_one,free}_kernel now calls
the [cd]tor. Align the m68k/ColdFire implementation of those
functions by calling the [cd]tor explicitly.
Signed-off-by: Kevin Brodsky
---
arch/m68k/include/asm/mcf_pgalloc.h | 6 +-
1 file changed, 5 insertions(+), 1
On 08/04/2025 19:40, Matthew Wilcox wrote:
> On Tue, Apr 08, 2025 at 09:54:42AM -0700, Dave Hansen wrote:
>> On 4/8/25 09:37, Matthew Wilcox wrote:
>>> On Tue, Apr 08, 2025 at 08:22:47AM -0700, Dave Hansen wrote:
Are there any tests for folio_test_pgtable() at free_page() time? If we
had
y not be associated to any mm. For now let's pass NULL as mm; this
will be refined where possible in future patches.
No functional change in this patch.
Signed-off-by: Kevin Brodsky
---
arch/arm/mm/mmu.c| 2 +-
arch/arm64/mm/mmu.c | 4
missing dtor calls in those helpers, free the PTE
pages using pte_free_kernel() instead of free_page().
While at it also use pmd_free() instead of calling pagetable_dtor()
explicitly at the PMD level.
Signed-off-by: Kevin Brodsky
---
arch/x86/mm/pgtable.c | 7 +++
1 file changed, 3 insertions
.
Signed-off-by: Kevin Brodsky
---
arch/riscv/mm/init.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c
index e5ef693fc778..59a982f88908 100644
--- a/arch/riscv/mm/init.c
+++ b/arch/riscv/mm/init.c
@@ -442,6 +442,11 @@ static phys_addr_t
: Kevin Brodsky
---
arch/riscv/mm/init.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c
index 59a982f88908..8d0374d7ce8e 100644
--- a/arch/riscv/mm/init.c
+++ b/arch/riscv/mm/init.c
@@ -590,11 +590,11 @@ static
Constructors for PUD/P4D-level pgtables were recently introduced.
They should be called for all pgtables; make sure they are called
for special kernel mappings created by __create_pgd_mapping() too.
Signed-off-by: Kevin Brodsky
---
arch/arm64/mm/mmu.c | 6 +-
1 file changed, 5 insertions
associated to init_mm. No special-casing is needed on the
dtor path, as ptlock_free() is already called unconditionally for
all levels. (ptlock_free() is a no-op unless a ptlock was allocated
for the given PTP.)
Signed-off-by: Kevin Brodsky
---
include/linux/mm.h | 2 +-
1 file changed, 1 insertion
this way folding becomes irrelevant. This is inspired
by one of the m68k pgtable allocators
(arch/m68k/include/asm/motorola_pgalloc.h).
Signed-off-by: Kevin Brodsky
---
arch/arm64/mm/mmu.c | 54 +++--
1 file changed, 33 insertions(+), 21 deletions(-)
d
differentiate user
from kernel pgtables. This patch aligns the powerpc implementation
with the generic one by calling pagetable_pte_[cd]tor()
unconditionally in those helpers.
Signed-off-by: Kevin Brodsky
---
arch/powerpc/mm/pgtable-frag.c | 30 +-
1 file changed, 13 insertions
kernel and user alloc/free functions have the same
implementation, and since pgtable_t is defined as pte_t *, we can
have both call a common helper.
Signed-off-by: Kevin Brodsky
---
arch/sparc/mm/init_64.c | 27 +--
1 file changed, 13 insertions(+), 14 deletions(-)
diff
/
Signed-off-by: Kevin Brodsky
---
arch/csky/include/asm/pgalloc.h | 2 +-
arch/microblaze/mm/pgtable.c| 2 +-
arch/openrisc/mm/ioremap.c | 2 +-
include/asm-generic/pgalloc.h | 7 ++-
include/linux/mm.h | 2 +-
5 files changed, 10 insertions(+), 5 deletions(-)
diff
ernel.org
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-c...@vger.kernel.org
Cc: linux-ker...@vger.kernel.org
Cc: linux-m...@lists.linux-m68k.org
Cc: linux-openr...@vger.kernel.org
Cc: linux-ri...@lists.infradead.org
Cc: linux-s...@vger.kernel.org
Cc: linuxppc-dev@lists.ozlabs.org
Cc: sparcli...@vg
On 17/03/2025 16:30, Ryan Roberts wrote:
> On 17/03/2025 14:16, Kevin Brodsky wrote:
>> The complications in those special pgtable allocators beg the question:
>> does it really make sense to treat efi_mm and init_mm differently in
>> e.g. apply_to_pte_range()? Maybe what we
On 17/03/2025 15:16, Kevin Brodsky wrote:
> diff --git a/include/asm-generic/pgalloc.h b/include/asm-generic/pgalloc.h
> index e164ca66f0f6..3c8ec3bfea44 100644
> --- a/include/asm-generic/pgalloc.h
> +++ b/include/asm-generic/pgalloc.h
> @@ -23,6 +23,11 @@ stat
differentiate user
from kernel pgtables. This patch aligns the powerpc implementation
with the generic one by calling pagetable_pte_[cd]tor()
unconditionally in those helpers.
Signed-off-by: Kevin Brodsky
---
arch/powerpc/mm/pgtable-frag.c | 30 +-
1 file changed, 13 insertions
Constructors for PUD/P4D-level pgtables were recently introduced.
They should be called for all pgtables; make sure they are called
for special kernel mappings created by __create_pgd_mapping() too.
Signed-off-by: Kevin Brodsky
---
arch/arm64/mm/mmu.c | 6 +-
1 file changed, 5 insertions
.
Signed-off-by: Kevin Brodsky
---
arch/riscv/mm/init.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c
index 703c3648cfa9..fb18940113f2 100644
--- a/arch/riscv/mm/init.c
+++ b/arch/riscv/mm/init.c
@@ -409,6 +409,11 @@ static phys_addr_t
The generic implementation of pte_{alloc_one,free}_kernel now calls
the [cd]tor. Align the m68k/ColdFire implementation of those
functions by calling the [cd]tor explicitly.
Signed-off-by: Kevin Brodsky
---
arch/m68k/include/asm/mcf_pgalloc.h | 6 +-
1 file changed, 5 insertions(+), 1
...@lists.infradead.org
Cc: linux-c...@vger.kernel.org
Cc: linux-ker...@vger.kernel.org
Cc: linux-m...@lists.linux-m68k.org
Cc: linux-openr...@vger.kernel.org
Cc: linux-ri...@lists.infradead.org
Cc: linux-s...@vger.kernel.org
Cc: linuxppc-dev@lists.ozlabs.org
Cc: sparcli...@vger.kernel.org
---
Kevin Bro
: Kevin Brodsky
---
arch/riscv/mm/init.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c
index fb18940113f2..dc2715f3fd00 100644
--- a/arch/riscv/mm/init.c
+++ b/arch/riscv/mm/init.c
@@ -557,11 +557,11 @@ static
be called).
Signed-off-by: Kevin Brodsky
---
arch/arm64/mm/mmu.c | 41 +
1 file changed, 21 insertions(+), 20 deletions(-)
diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c
index a7292ce9d7b8..accb0a33c59f 100644
--- a/arch/arm64/mm/mmu.c
+++ b/
kernel and user alloc/free functions have the same
implementation, and since pgtable_t is defined as pte_t *, we can
have both call a common helper.
Signed-off-by: Kevin Brodsky
---
arch/sparc/mm/init_64.c | 27 +--
1 file changed, 13 insertions(+), 14 deletions(-)
diff
associated to init_mm. No special-casing is needed on the
dtor path, as ptlock_free() is already called unconditionally for
all levels. (ptlock_free() is a no-op unless a ptlock was allocated
for the given PTP.)
Signed-off-by: Kevin Brodsky
---
include/linux/mm.h | 2 +-
1 file changed, 1 insertion
this way folding becomes irrelevant. This is inspired
by one of the m68k pgtable allocators
(arch/m68k/include/asm/motorola_pgalloc.h).
Signed-off-by: Kevin Brodsky
---
arch/arm64/mm/mmu.c | 54 +++--
1 file changed, 33 insertions(+), 21 deletions(-)
d
/
Signed-off-by: Kevin Brodsky
---
arch/csky/include/asm/pgalloc.h | 2 +-
arch/microblaze/mm/pgtable.c| 2 +-
arch/openrisc/mm/ioremap.c | 2 +-
include/asm-generic/pgalloc.h | 7 ++-
include/linux/mm.h | 2 +-
5 files changed, 10 insertions(+), 5 deletions(-)
diff
y not be associated to any mm. For now let's pass NULL as mm; this
will be refined where possible in future patches.
No functional change in this patch.
Signed-off-by: Kevin Brodsky
---
arch/arm/mm/mmu.c| 2 +-
arch/arm64/mm/mmu.c | 4
ree page table pages.
>
> Signed-off-by: Qi Zheng
Definitely a good idea to have split patch 11 from v4.
Reviewed-by: Kevin Brodsky
- Kevin
On 07/01/2025 13:31, Qi Zheng wrote:
> On 2025/1/7 19:58, Kevin Brodsky wrote:
>> On 07/01/2025 11:51, Qi Zheng wrote:
>>> [...]
>>>
>>> Author: Qi Zheng
>>> Date: Fri Dec 13 17:13:48 2024 +0800
>>>
>>> mm: pgtable: c
On 07/01/2025 11:51, Qi Zheng wrote:
> [...]
>
> Author: Qi Zheng
> Date: Fri Dec 13 17:13:48 2024 +0800
>
> mm: pgtable: completely move pagetable_dtor() to generic
> tlb_remove_table()
>
> For the generic tlb_remove_table(), it is implemented in the
> following two
> forms:
>
>
On 06/01/2025 04:49, Qi Zheng wrote:
> [...]
>
>> Once this is done, we should be able to replace all those confusing
>> calls to tlb_remove_page() on PTPs with tlb_remove_table() and remove
>> the explicit call to pagetable_dtor(). AIUI this is essentially what
>> Peter suggested on v3 [2].
>
> Si
On 06/01/2025 14:23, Qi Zheng wrote:
> On 2025/1/6 20:36, Alexander Gordeev wrote:
>> On Mon, Jan 06, 2025 at 06:55:58PM +0800, Qi Zheng wrote:
> +static inline void pagetable_dtor(struct ptdesc *ptdesc)
> +{
> + struct folio *folio = ptdesc_folio(ptdesc);
> +
> + ptlock_f
On 03/01/2025 10:35, Qi Zheng wrote:
> On 2025/1/3 17:13, Qi Zheng wrote:
>> On 2025/1/3 16:02, Kevin Brodsky wrote:
>>> On 03/01/2025 04:48, Qi Zheng wrote:
>>>> [...]
>>>>
>>>> In __tlb_batch_free_encoded_pages(), we can indeed detect PageT
On 03/01/2025 04:48, Qi Zheng wrote:
> Hi Kevin,
>
> On 2025/1/3 00:53, Kevin Brodsky wrote:
>> On 30/12/2024 10:07, Qi Zheng wrote:
>>> static inline void riscv_tlb_remove_ptdesc(struct mmu_gather *tlb,
>>> void *pt)
>>> {
>>&g
On 03/01/2025 04:53, Qi Zheng wrote:
> On 2025/1/3 00:53, Kevin Brodsky wrote:
>> On 30/12/2024 10:07, Qi Zheng wrote:
>>> diff --git a/arch/riscv/include/asm/pgalloc.h
>>> b/arch/riscv/include/asm/pgalloc.h
>>> index 551d614d3369c..3466fbe2e508d 100644
>&g
ic pagetable_dtor_free()
Aside from the nit on patch 4 and the request for clarification on patch
10, this is looking good to me, so for the whole series (aside from my
own patches of course):
Reviewed-by: Kevin Brodsky
And happy new year!
Cheers,
- Kevin
On 30/12/2024 10:07, Qi Zheng wrote:
> static inline void riscv_tlb_remove_ptdesc(struct mmu_gather *tlb, void *pt)
> {
> - if (riscv_use_sbi_for_rfence())
> + if (riscv_use_sbi_for_rfence()) {
> tlb_remove_ptdesc(tlb, pt);
> - else
> + } else {
> + paget
On 30/12/2024 10:07, Qi Zheng wrote:
> diff --git a/arch/riscv/include/asm/pgalloc.h
> b/arch/riscv/include/asm/pgalloc.h
> index 551d614d3369c..3466fbe2e508d 100644
> --- a/arch/riscv/include/asm/pgalloc.h
> +++ b/arch/riscv/include/asm/pgalloc.h
> @@ -108,8 +108,12 @@ static inline void __pud_fr
On 28/10/2024 10:07, Yury Khrustalev wrote:
> Replace literal 0 with macro PKEY_UNRESTRICTED where pkey_*() functions
> are used in mm selftests for memory protection keys for ppc target.
>
> Signed-off-by: Yury Khrustalev
> Suggested-by: Kevin Brodsky
Reviewed-by: Kevin Brodsky
- Kevin
On 15/10/2024 17:01, Catalin Marinas wrote:
>> We also still need to resolve Kevin's concern, which probably means
>> keeping the thread's original POR around someplace.
> If we fail to allocate context for POR_EL0 (or anything else), we'll
> deliver a SIGSEGV. I think it's quite likely that the SI
;>>> On Wed, Oct 09, 2024 at 03:43:01PM +0100, Will Deacon wrote:
>>>>> On Tue, Sep 24, 2024 at 01:27:58PM +0200, Kevin Brodsky wrote:
>>>>>> On 22/08/2024 17:11, Joey Gouly wrote:
>>>>>>> @@ -1178,6 +1237,9 @@ static
On 22/08/2024 17:11, Joey Gouly wrote:
> @@ -1178,6 +1237,9 @@ static void setup_return(struct pt_regs *regs, struct
> k_sigaction *ka,
> sme_smstop();
> }
>
> + if (system_supports_poe())
> + write_sysreg_s(POR_EL0_INIT, SYS_POR_EL0);
At the point where setu
On 22/08/2024 17:10, Joey Gouly wrote:
> @@ -371,6 +382,9 @@ int copy_thread(struct task_struct *p, const struct
> kernel_clone_args *args)
> if (system_supports_tpidr2())
> p->thread.tpidr2_el0 = read_sysreg_s(SYS_TPIDR2_EL0);
>
> + if (system_sup
On 03/05/2024 15:01, Joey Gouly wrote:
> @@ -371,6 +382,9 @@ int copy_thread(struct task_struct *p, const struct
> kernel_clone_args *args)
> if (system_supports_tpidr2())
> p->thread.tpidr2_el0 = read_sysreg_s(SYS_TPIDR2_EL0);
>
> + if (system_sup
On 05/07/2024 18:59, Catalin Marinas wrote:
> On Fri, May 03, 2024 at 02:01:35PM +0100, Joey Gouly wrote:
>> @@ -163,7 +182,8 @@ static inline pteval_t __phys_to_pte_val(phys_addr_t
>> phys)
>> #define pte_access_permitted_no_overlay(pte, write) \
>> (((pte_val(pte) & (PTE_VALID | PTE_USER))
On 03/05/2024 15:01, Joey Gouly wrote:
> +static uint64_t get_por_el0(void)
> +{
> + uint64_t val;
> +
> + asm volatile (
> + "mrs%0, " SYS_POR_EL0 "\n"
> + : "=r"(val)
> + :
> + : "cc");
Not sure why we would need "cc" for an MRS? __read
On 03/05/2024 15:01, Joey Gouly wrote:
> Now that support for POE and Protection Keys has been implemented, add a
> config to allow users to actually enable it.
>
> Signed-off-by: Joey Gouly
> Cc: Catalin Marinas
> Cc: Will Deacon
> ---
> arch/arm64/Kconfig | 22 ++
> 1 file
On 03/05/2024 15:01, Joey Gouly wrote:
> @@ -1020,6 +1060,15 @@ static int setup_sigframe(struct
> rt_sigframe_user_layout *user,
> __put_user_error(current->thread.fault_code, &esr_ctx->esr,
> err);
> }
>
> + if (system_supports_poe() && err == 0 && user->poe_offset) {
On 03/05/2024 15:01, Joey Gouly wrote:
> @@ -267,6 +294,28 @@ static inline unsigned long mm_untag_mask(struct
> mm_struct *mm)
> return -1UL >> 8;
> }
>
> +/*
> + * We only want to enforce protection keys on the current process
> + * because we effectively have no access to POR_EL0 for o
On 03/05/2024 15:01, Joey Gouly wrote:
> [...]
>
> +static bool fault_from_pkey(unsigned long esr, struct vm_area_struct *vma,
> + unsigned int mm_flags)
> +{
> + unsigned long iss2 = ESR_ELx_ISS2(esr);
> +
> + if (!arch_pkeys_enabled())
> + return false;
> +
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