On Tue, Oct 15, 2024 at 12:41:16PM +0100, Will Deacon wrote:
> On Tue, Oct 15, 2024 at 10:59:11AM +0100, Joey Gouly wrote:
> > On Mon, Oct 14, 2024 at 06:10:23PM +0100, Will Deacon wrote:
> > > Kevin, Joey,
> > >
> > > On Wed, Oct 09, 2024 at 03:43:01PM +010
On Mon, Oct 14, 2024 at 06:10:23PM +0100, Will Deacon wrote:
> Kevin, Joey,
>
> On Wed, Oct 09, 2024 at 03:43:01PM +0100, Will Deacon wrote:
> > On Tue, Sep 24, 2024 at 01:27:58PM +0200, Kevin Brodsky wrote:
> > > On 22/08/2024 17:11, Joey Gouly wrote:
> > > &g
On Thu, Sep 12, 2024 at 11:50:18AM +0100, Will Deacon wrote:
> Hi Dave,
>
> On Wed, Sep 11, 2024 at 08:33:54AM -0700, Dave Hansen wrote:
> > On 9/11/24 08:01, Kevin Brodsky wrote:
> > > On 22/08/2024 17:10, Joey Gouly wrote:
> > >> @@ -371,6 +382,9 @@ int copy
On Wed, Sep 04, 2024 at 05:17:58PM +0100, Will Deacon wrote:
> On Wed, Sep 04, 2024 at 01:55:03PM +0100, Joey Gouly wrote:
> > On Wed, Sep 04, 2024 at 12:43:02PM +0100, Will Deacon wrote:
> > > Right, there's quite a lot I need to do:
> > >
> > > - Uncorr
On Wed, Sep 04, 2024 at 12:43:02PM +0100, Will Deacon wrote:
> On Wed, Sep 04, 2024 at 12:32:21PM +0100, Joey Gouly wrote:
> > On Wed, Sep 04, 2024 at 11:22:54AM +0100, Will Deacon wrote:
> > > On Tue, Sep 03, 2024 at 03:54:13PM +0100, Joey Gouly wrote:
> > > > On M
On Wed, Sep 04, 2024 at 11:22:54AM +0100, Will Deacon wrote:
> On Tue, Sep 03, 2024 at 03:54:13PM +0100, Joey Gouly wrote:
> > On Mon, Sep 02, 2024 at 08:08:08PM +0100, Catalin Marinas wrote:
> > > On Tue, Aug 27, 2024 at 12:38:04PM +0100, Will Deacon wrote:
> > > >
On Tue, Sep 03, 2024 at 03:50:46PM +0100, Joey Gouly wrote:
> On Thu, Aug 29, 2024 at 06:55:07PM +0100, Mark Brown wrote:
> > On Thu, Aug 22, 2024 at 04:10:59PM +0100, Joey Gouly wrote:
> >
> > > +static bool fault_from_pkey(unsigned long esr, struct vm
gt; On Fri, Aug 23, 2024 at 05:41:06PM +0100, Catalin Marinas wrote:
> > > > > On Fri, Aug 23, 2024 at 03:45:32PM +0100, Will Deacon wrote:
> > > > > > On Thu, Aug 22, 2024 at 04:10:49PM +0100, Joey Gouly wrote:
> > > > > > > +static void per
On Thu, Aug 29, 2024 at 06:55:07PM +0100, Mark Brown wrote:
> On Thu, Aug 22, 2024 at 04:10:59PM +0100, Joey Gouly wrote:
>
> > +static bool fault_from_pkey(unsigned long esr, struct vm_area_struct *vma,
> > + unsigned int mm_flags)
> > +{
&g
On Fri, Aug 30, 2024 at 12:23:33PM +0100, Marc Zyngier wrote:
> On Fri, 30 Aug 2024 10:25:27 +0100,
> Will Deacon wrote:
> >
> > On Thu, Aug 22, 2024 at 04:10:51PM +0100, Joey Gouly wrote:
> > > To allow using newer instructions that current assemblers don't know
Add new system registers:
- POR_EL1
- POR_EL0
Signed-off-by: Joey Gouly
Cc: Catalin Marinas
Cc: Will Deacon
Cc: Marc Zyngier
Cc: Oliver Upton
Cc: Shuah Khan
Reviewed-by: Mark Brown
---
tools/testing/selftests/kvm/aarch64/get-reg-list.c | 14 ++
1 file changed, 14
Ensure that we get signal context for POR_EL0 if and only if POE is present
on the system.
Copied from the TPIDR2 test.
Signed-off-by: Joey Gouly
Cc: Catalin Marinas
Cc: Will Deacon
Cc: Mark Brown
Cc: Shuah Khan
Reviewed-by: Mark Brown
Acked-by: Shuah Khan
---
.../testing/selftests/arm64
Teach the signal frame parsing about the new POE frame, avoids warning when it
is generated.
Signed-off-by: Joey Gouly
Cc: Catalin Marinas
Cc: Will Deacon
Cc: Mark Brown
Cc: Shuah Khan
Reviewed-by: Mark Brown
---
tools/testing/selftests/arm64/signal/testcases/testcases.c | 4
1 file
Check that when POE is enabled, the POR_EL0 register is accessible.
Signed-off-by: Joey Gouly
Cc: Catalin Marinas
Cc: Will Deacon
Cc: Mark Brown
Cc: Shuah Khan
Reviewed-by: Mark Brown
---
tools/testing/selftests/arm64/abi/hwcap.c | 14 ++
1 file changed, 14 insertions(+)
diff
s to the uc_mcontext is abstracted, as arm64 has a different structure.
Signed-off-by: Joey Gouly
Cc: Catalin Marinas
Cc: Will Deacon
Cc: Andrew Morton
Cc: Shuah Khan
Cc: Dave Hansen
Cc: Aneesh Kumar K.V
Acked-by: Dave Hansen
---
.../arm64/signal/testcases/testcases.h| 3 +
tools
arm64's fpregs are not at a constant offset from sigcontext. Since this is
not an important part of the test, don't print the fpregs pointer on arm64.
Signed-off-by: Joey Gouly
Cc: Catalin Marinas
Cc: Will Deacon
Cc: Andrew Morton
Cc: Shuah Khan
Cc: Dave Hansen
Cc: Aneesh Kumar
Put this function in the header so that it can be used by other tests, without
needing to link to testcases.c.
This will be used by selftest/mm/protection_keys.c
Signed-off-by: Joey Gouly
Cc: Catalin Marinas
Cc: Will Deacon
Cc: Andrew Morton
Cc: Shuah Khan
Cc: Dave Hansen
Cc: Aneesh Kumar
Now that support for POE and Protection Keys has been implemented, add a
config to allow users to actually enable it.
Signed-off-by: Joey Gouly
Cc: Catalin Marinas
Cc: Will Deacon
Reviewed-by: Anshuman Khandual
Acked-by: Catalin Marinas
---
arch/arm64/Kconfig | 23 +++
1
Now that PKEYs support has been implemented, enable it for CPUs that
support S1POE.
Signed-off-by: Joey Gouly
Cc: Catalin Marinas
Cc: Will Deacon
Acked-by: Catalin Marinas
Reviewed-by: Anshuman Khandual
---
arch/arm64/include/asm/pkeys.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion
plied' encodings in PIRE0_EL1, so that PIE and
POE can coexist.
Signed-off-by: Joey Gouly
Cc: Catalin Marinas
Cc: Will Deacon
Reviewed-by: Catalin Marinas
---
arch/arm64/include/asm/pgtable-prot.h | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git arch/arm64/include/a
Add a regset for POE containing POR_EL0.
Signed-off-by: Joey Gouly
Cc: Catalin Marinas
Cc: Will Deacon
Reviewed-by: Mark Brown
Reviewed-by: Catalin Marinas
Reviewed-by: Anshuman Khandual
---
arch/arm64/kernel/ptrace.c | 46 ++
include/uapi/linux/elf.h
Add PKEY support to signals, by saving and restoring POR_EL0 from the
stackframe.
Signed-off-by: Joey Gouly
Cc: Catalin Marinas
Cc: Will Deacon
Reviewed-by: Mark Brown
Acked-by: Szabolcs Nagy
Reviewed-by: Catalin Marinas
Reviewed-by: Anshuman Khandual
---
arch/arm64/include/uapi/asm
We do not want take POE into account when clearing the MTE tags.
Signed-off-by: Joey Gouly
Cc: Catalin Marinas
Cc: Will Deacon
Reviewed-by: Catalin Marinas
Reviewed-by: Anshuman Khandual
---
arch/arm64/include/asm/pgtable.h | 11 +++
1 file changed, 7 insertions(+), 4 deletions
Implement the PKEYS interface, using the Permission Overlay Extension.
Signed-off-by: Joey Gouly
Cc: Catalin Marinas
Cc: Will Deacon
Reviewed-by: Catalin Marinas
---
arch/arm64/include/asm/mmu.h | 1 +
arch/arm64/include/asm/mmu_context.h | 46 +++-
arch/arm64/include/asm
If a memory fault occurs that is due to an overlay/pkey fault, report that to
userspace with a SEGV_PKUERR.
Signed-off-by: Joey Gouly
Cc: Catalin Marinas
Cc: Will Deacon
Reviewed-by: Catalin Marinas
---
arch/arm64/include/asm/traps.h | 1 +
arch/arm64/kernel/traps.c | 6
arch
Modify arch_calc_vm_prot_bits() and vm_get_page_prot() such that the pkey
value is set in the vm_flags and then into the pgprot value.
Signed-off-by: Joey Gouly
Cc: Catalin Marinas
Cc: Will Deacon
---
arch/arm64/include/asm/mman.h | 10 +-
arch/arm64/mm/mmap.c | 11
The 3-bit POIndex is stored in the PTE at bits 60..62.
Signed-off-by: Joey Gouly
Cc: Catalin Marinas
Cc: Will Deacon
Acked-by: Catalin Marinas
---
arch/arm64/include/asm/pgtable-hwdef.h | 10 ++
1 file changed, 10 insertions(+)
diff --git arch/arm64/include/asm/pgtable-hwdef.h
arch
VM_PKEY_BIT[012] will use VM_HIGH_ARCH_[012], move the MTE VM flags to
accommodate this.
Signed-off-by: Joey Gouly
Cc: Catalin Marinas
Cc: Will Deacon
Acked-by: Catalin Marinas
---
include/linux/mm.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git include/linux/mm.h
Expose a HWCAP and ID_AA64MMFR3_EL1_S1POE to userspace, so they can be used to
check if the CPU supports the feature.
Signed-off-by: Joey Gouly
Cc: Catalin Marinas
Cc: Will Deacon
Reviewed-by: Catalin Marinas
Reviewed-by: Anshuman Khandual
---
Documentation/arch/arm64/elf_hwcaps.rst | 2
Add the missing sanitisation of ID_AA64MMFR3_EL1, making sure we
solely expose S1POE and TCRX (we currently don't support anything
else).
[joey: Took Marc's patch for S1PIE, and changed it for S1POE]
Signed-off-by: Marc Zyngier
Signed-off-by: Joey Gouly
---
arch/arm64/kvm/sys_
the IPA regardless of S1
permissions.
Signed-off-by: Joey Gouly
Cc: Marc Zyngier
Cc: Oliver Upton
Cc: Catalin Marinas
Cc: Will Deacon
Reviewed-by: Marc Zyngier
---
arch/arm64/kvm/hyp/include/hyp/fault.h | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git arch/arm64/kvm/hyp
When a PTE is modified, the POIndex must be masked off so that it can be
modified.
Signed-off-by: Joey Gouly
Cc: Catalin Marinas
Cc: Will Deacon
Reviewed-by: Catalin Marinas
Reviewed-by: Anshuman Khandual
---
arch/arm64/include/asm/pgtable.h | 3 ++-
1 file changed, 2 insertions(+), 1
To allow using newer instructions that current assemblers don't know about,
replace the `at` instruction with the underlying SYS instruction.
Signed-off-by: Joey Gouly
Cc: Marc Zyngier
Cc: Oliver Upton
Cc: Catalin Marinas
Cc: Will Deacon
Reviewed-by: Marc Zyngier
---
arch/arm64/includ
Define the new system registers that POE introduces and context switch them.
Signed-off-by: Joey Gouly
Cc: Marc Zyngier
Cc: Oliver Upton
Cc: Catalin Marinas
Cc: Will Deacon
Reviewed-by: Marc Zyngier
---
arch/arm64/include/asm/kvm_host.h | 4
arch/arm64/include/asm
This indicates if the system supports POE. This is a CPUCAP_BOOT_CPU_FEATURE
as the boot CPU will enable POE if it has it, so secondary CPUs must also
have this feature.
Signed-off-by: Joey Gouly
Cc: Catalin Marinas
Cc: Will Deacon
Acked-by: Catalin Marinas
Reviewed-by: Anshuman Khandual
POR_EL0 is a register that can be modified by userspace directly,
so it must be context switched.
Signed-off-by: Joey Gouly
Cc: Catalin Marinas
Cc: Will Deacon
Reviewed-by: Catalin Marinas
---
arch/arm64/include/asm/cpufeature.h | 6 ++
arch/arm64/include/asm/processor.h | 1 +
arch
Allow EL0 or EL1 to access POR_EL0 without being trapped to EL2.
Signed-off-by: Joey Gouly
Cc: Catalin Marinas
Cc: Will Deacon
Acked-by: Catalin Marinas
Reviewed-by: Anshuman Khandual
---
arch/arm64/include/asm/el2_setup.h | 10 +-
1 file changed, 9 insertions(+), 1 deletion
Use the new CONFIG_ARCH_PKEY_BITS to simplify setting these bits
for different architectures.
Signed-off-by: Joey Gouly
Cc: Andrew Morton
Cc: linux-fsde...@vger.kernel.org
Cc: linux...@kvack.org
Acked-by: Dave Hansen
Reviewed-by: Anshuman Khandual
---
fs/proc/task_mmu.c | 2 ++
include
The new config option specifies how many bits are in each PKEY.
Signed-off-by: Joey Gouly
Cc: Thomas Gleixner
Cc: Ingo Molnar
Cc: Borislav Petkov
Cc: Dave Hansen
Cc: H. Peter Anvin
Cc: x...@kernel.org
Acked-by: Dave Hansen
---
arch/x86/Kconfig | 4
1 file changed, 4 insertions
The new config option specifies how many bits are in each PKEY.
Signed-off-by: Joey Gouly
Cc: Michael Ellerman
Cc: Nicholas Piggin
Cc: Christophe Leroy
Cc: "Aneesh Kumar K.V"
Cc: "Naveen N. Rao"
Cc: linuxppc-dev@lists.ozlabs.org
Acked-by: Michael Ellerman
---
arch
6-kvm-arm64-get-reg-list-v2-0-1d3fbc7b6...@kernel.org/
Joey Gouly (30):
powerpc/mm: add ARCH_PKEY_BITS to Kconfig
x86/mm: add ARCH_PKEY_BITS to Kconfig
mm: use ARCH_PKEY_BITS to define VM_PKEY_BITN
arm64: disable trapping of POR_EL0 to EL2
arm64: cpufeature: add Permission Overlay Exte
On Tue, Aug 20, 2024 at 02:54:50PM +0100, Dave Martin wrote:
> On Tue, Aug 20, 2024 at 10:54:41AM +0100, Joey Gouly wrote:
> > On Mon, Aug 19, 2024 at 06:09:06PM +0100, Catalin Marinas wrote:
> > > On Thu, Aug 15, 2024 at 04:09:26PM +0100, Dave P Martin wrote:
> > > >
On Mon, Aug 19, 2024 at 06:09:06PM +0100, Catalin Marinas wrote:
> On Thu, Aug 15, 2024 at 04:09:26PM +0100, Dave P Martin wrote:
> > On Thu, Aug 15, 2024 at 02:18:15PM +0100, Joey Gouly wrote:
> > > That's a lot of words to say, or ask, do you agree with the approach of
On Fri, Aug 16, 2024 at 03:55:11PM +0100, Marc Zyngier wrote:
> On Fri, 03 May 2024 14:01:25 +0100,
> Joey Gouly wrote:
> >
> > Define the new system registers that POE introduces and context switch them.
> >
> > Signed-off-by: Joey Gouly
> > Cc: Marc Z
Hi Catalin,
On Wed, Aug 14, 2024 at 04:03:47PM +0100, Catalin Marinas wrote:
> Hi Joey,
>
> On Tue, Aug 06, 2024 at 03:31:03PM +0100, Joey Gouly wrote:
> > diff --git arch/arm64/kernel/signal.c arch/arm64/kernel/signal.c
> > index 561986947530..ca7d4e0be275 100644
>
On Tue, Aug 06, 2024 at 11:35:32AM +0100, Joey Gouly wrote:
> On Thu, Aug 01, 2024 at 05:22:45PM +0100, Dave Martin wrote:
> > On Thu, Aug 01, 2024 at 04:54:41PM +0100, Joey Gouly wrote:
> > > On Thu, Jul 25, 2024 at 05:00:18PM +0100, Dave Martin wrote:
> > > > Hi,
&
On Tue, Aug 06, 2024 at 02:33:37PM +0100, Dave Martin wrote:
> Hi,
>
> On Thu, Aug 01, 2024 at 05:01:10PM +0100, Joey Gouly wrote:
> > On Thu, Jul 25, 2024 at 04:57:09PM +0100, Dave Martin wrote:
> > > On Fri, May 03, 2024 at 02:01:33PM +0100, Joey Gouly wrote:
> >
On Thu, Aug 01, 2024 at 05:22:45PM +0100, Dave Martin wrote:
> On Thu, Aug 01, 2024 at 04:54:41PM +0100, Joey Gouly wrote:
> > On Thu, Jul 25, 2024 at 05:00:18PM +0100, Dave Martin wrote:
> > > Hi,
> > >
> > > On Fri, May 03, 2024 at 02:01:36PM +0100, Joey Goul
On Thu, Jul 25, 2024 at 04:44:13PM +0100, Dave Martin wrote:
> Hi,
>
> On Fri, May 03, 2024 at 02:01:22PM +0100, Joey Gouly wrote:
> > Allow EL0 or EL1 to access POR_EL0 without being trapped to EL2.
> >
> > Signed-off-by: Joey Gouly
> > Cc: Catalin Marinas
On Thu, Jul 25, 2024 at 04:49:08PM +0100, Dave Martin wrote:
> On Fri, May 03, 2024 at 02:01:28PM +0100, Joey Gouly wrote:
> > Expose a HWCAP and ID_AA64MMFR3_EL1_S1POE to userspace, so they can be used
> > to
> > check if the CPU supports the feature.
> >
> >
On Thu, Jul 25, 2024 at 04:57:09PM +0100, Dave Martin wrote:
> On Fri, May 03, 2024 at 02:01:33PM +0100, Joey Gouly wrote:
> > If a memory fault occurs that is due to an overlay/pkey fault, report that
> > to
> > userspace with a SEGV_PKUERR.
> >
> > Signed-of
On Thu, Jul 25, 2024 at 05:00:18PM +0100, Dave Martin wrote:
> Hi,
>
> On Fri, May 03, 2024 at 02:01:36PM +0100, Joey Gouly wrote:
> > Add PKEY support to signals, by saving and restoring POR_EL0 from the
> > stackframe.
> >
> > Signed-off-by: Joey Gouly
>
On Thu, Jul 25, 2024 at 04:49:50PM +0100, Dave Martin wrote:
> On Fri, May 03, 2024 at 02:01:31PM +0100, Joey Gouly wrote:
> > Modify arch_calc_vm_prot_bits() and vm_get_page_prot() such that the pkey
> > value is set in the vm_flags and then into the pgprot value.
> >
&g
On Mon, Jul 15, 2024 at 01:57:10PM +0530, Anshuman Khandual wrote:
>
>
> On 5/3/24 18:31, Joey Gouly wrote:
> > POR_EL0 is a register that can be modified by userspace directly,
> > so it must be context switched.
> >
> > Signed-off-by: Joey Gouly
> > C
On Tue, Jul 16, 2024 at 04:11:54PM +0530, Anshuman Khandual wrote:
>
>
> On 5/3/24 18:31, Joey Gouly wrote:
> > Set the EL0/userspace indirection encodings to be the overlay enabled
> > variants of the permissions.
>
> Could you please explain the rationale for thi
On Tue, Jul 16, 2024 at 02:35:48PM +0530, Anshuman Khandual wrote:
>
>
> On 5/3/24 18:31, Joey Gouly wrote:
> > Modify arch_calc_vm_prot_bits() and vm_get_page_prot() such that the pkey
> > value is set in the vm_flags and then into the pgprot value.
> >
> >
new_iamr_bits |= IAMR_EX_BIT;
}
init_iamr(pkey, new_iamr_bits);
/* Set the bits we need in AMR: */
if (init_val & PKEY_DISABLE_ACCESS)
new_amr_bits |= AMR_RD_BIT | AMR_WR_BIT;
else if (init_val & PKEY_DISABLE_WRITE)
Hi,
On Wed, Jun 19, 2024 at 05:45:29PM +0100, Catalin Marinas wrote:
> On Tue, May 28, 2024 at 12:24:57PM +0530, Amit Daniel Kachhap wrote:
> > On 5/3/24 18:31, Joey Gouly wrote:
> > > diff --git a/arch/arm64/include/asm/mman.h b/arch/arm64/include/asm/mman.h
> &
Hi Szabolcs,
On Fri, May 31, 2024 at 03:57:07PM +0100, Szabolcs Nagy wrote:
> The 05/03/2024 14:01, Joey Gouly wrote:
> > Implement the PKEYS interface, using the Permission Overlay Extension.
> ...
> > +#ifdef CONFIG_ARCH_HAS_PKEYS
> > +int arch_set_user_pkey_access(stru
On Fri, May 03, 2024 at 02:01:18PM +0100, Joey Gouly wrote:
> Hi all,
>
> This series implements the Permission Overlay Extension introduced in 2022
> VMSA enhancements [1]. It is based on v6.9-rc5.
>
> One possible issue with this version, I took the last bit of HWCAP2.
>
Hi Amit,
Thanks for taking a look!
On Tue, May 28, 2024 at 12:25:58PM +0530, Amit Daniel Kachhap wrote:
>
>
> On 5/3/24 18:31, Joey Gouly wrote:
> > Implement the PKEYS interface, using the Permission Overlay Extension.
> >
> > Signed-off-by: Joey Gouly
> >
Add new system registers:
- POR_EL1
- POR_EL0
Signed-off-by: Joey Gouly
Cc: Catalin Marinas
Cc: Will Deacon
Cc: Marc Zyngier
Cc: Oliver Upton
Cc: Shuah Khan
Reviewed-by: Mark Brown
---
tools/testing/selftests/kvm/aarch64/get-reg-list.c | 14 ++
1 file changed, 14
Ensure that we get signal context for POR_EL0 if and only if POE is present
on the system.
Copied from the TPIDR2 test.
Signed-off-by: Joey Gouly
Cc: Catalin Marinas
Cc: Will Deacon
Cc: Mark Brown
Cc: Shuah Khan
---
.../testing/selftests/arm64/signal/.gitignore | 1 +
.../arm64/signal
Teach the signal frame parsing about the new POE frame, avoids warning when it
is generated.
Signed-off-by: Joey Gouly
Cc: Catalin Marinas
Cc: Will Deacon
Cc: Mark Brown
Cc: Shuah Khan
Reviewed-by: Mark Brown
---
tools/testing/selftests/arm64/signal/testcases/testcases.c | 4
1 file
Check that when POE is enabled, the POR_EL0 register is accessible.
Signed-off-by: Joey Gouly
Cc: Catalin Marinas
Cc: Will Deacon
Cc: Mark Brown
Cc: Shuah Khan
Reviewed-by: Mark Brown
---
tools/testing/selftests/arm64/abi/hwcap.c | 14 ++
1 file changed, 14 insertions(+)
diff
s to the uc_mcontext is abstracted, as arm64 has a different structure.
Signed-off-by: Joey Gouly
Cc: Catalin Marinas
Cc: Will Deacon
Cc: Andrew Morton
Cc: Shuah Khan
Cc: Dave Hansen
Cc: Aneesh Kumar K.V
Acked-by: Dave Hansen
---
.../arm64/signal/testcases/testcases.h| 3 +
tools
arm64's fpregs are not at a constant offset from sigcontext. Since this is
not an important part of the test, don't print the fpregs pointer on arm64.
Signed-off-by: Joey Gouly
Cc: Catalin Marinas
Cc: Will Deacon
Cc: Andrew Morton
Cc: Shuah Khan
Cc: Dave Hansen
Cc: Aneesh Kumar
Put this function in the header so that it can be used by other tests, without
needing to link to testcases.c.
This will be used by selftest/mm/protection_keys.c
Signed-off-by: Joey Gouly
Cc: Catalin Marinas
Cc: Will Deacon
Cc: Andrew Morton
Cc: Shuah Khan
Cc: Dave Hansen
Cc: Aneesh Kumar
If a memory fault occurs that is due to an overlay/pkey fault, report that to
userspace with a SEGV_PKUERR.
Signed-off-by: Joey Gouly
Cc: Catalin Marinas
Cc: Will Deacon
---
arch/arm64/include/asm/traps.h | 1 +
arch/arm64/kernel/traps.c | 12 ++--
arch/arm64/mm/fault.c
We do not want take POE into account when clearing the MTE tags.
Signed-off-by: Joey Gouly
Cc: Catalin Marinas
Cc: Will Deacon
---
arch/arm64/include/asm/pgtable.h | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64
When a PTE is modified, the POIndex must be masked off so that it can be
modified.
Signed-off-by: Joey Gouly
Cc: Catalin Marinas
Cc: Will Deacon
Reviewed-by: Catalin Marinas
---
arch/arm64/include/asm/pgtable.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm64
Modify arch_calc_vm_prot_bits() and vm_get_page_prot() such that the pkey
value is set in the vm_flags and then into the pgprot value.
Signed-off-by: Joey Gouly
Cc: Catalin Marinas
Cc: Will Deacon
---
arch/arm64/include/asm/mman.h | 8 +++-
arch/arm64/mm/mmap.c | 9 +
2
Now that support for POE and Protection Keys has been implemented, add a
config to allow users to actually enable it.
Signed-off-by: Joey Gouly
Cc: Catalin Marinas
Cc: Will Deacon
---
arch/arm64/Kconfig | 22 ++
1 file changed, 22 insertions(+)
diff --git a/arch/arm64
To make it easier to share the generic PKEYs flags, move the MTE flag.
Signed-off-by: Joey Gouly
Cc: Catalin Marinas
Cc: Will Deacon
---
include/linux/mm.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/linux/mm.h b/include/linux/mm.h
index 5605b938acce
The 3-bit POIndex is stored in the PTE at bits 60..62.
Signed-off-by: Joey Gouly
Cc: Catalin Marinas
Cc: Will Deacon
---
arch/arm64/include/asm/pgtable-hwdef.h | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/include/asm/pgtable-hwdef.h
b/arch/arm64/include/asm
Add a regset for POE containing POR_EL0.
Signed-off-by: Joey Gouly
Cc: Catalin Marinas
Cc: Will Deacon
Reviewed-by: Mark Brown
Reviewed-by: Catalin Marinas
---
arch/arm64/kernel/ptrace.c | 46 ++
include/uapi/linux/elf.h | 1 +
2 files changed, 47
Expose a HWCAP and ID_AA64MMFR3_EL1_S1POE to userspace, so they can be used to
check if the CPU supports the feature.
Signed-off-by: Joey Gouly
Cc: Catalin Marinas
Cc: Will Deacon
---
This takes the last bit of HWCAP2, is this fine? What can we do about more
features in the future
the IPA regardless of S1
permissions.
Signed-off-by: Joey Gouly
Cc: Marc Zyngier
Cc: Oliver Upton
Cc: Catalin Marinas
Cc: Will Deacon
---
arch/arm64/kvm/hyp/include/hyp/fault.h | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/kvm/hyp/include/hyp/fault.h
b
Now that PKEYs support has been implemented, enable it for CPUs that
support S1POE.
Signed-off-by: Joey Gouly
Cc: Catalin Marinas
Cc: Will Deacon
Acked-by: Catalin Marinas
---
arch/arm64/include/asm/pkeys.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64
Set the EL0/userspace indirection encodings to be the overlay enabled
variants of the permissions.
Signed-off-by: Joey Gouly
Cc: Catalin Marinas
Cc: Will Deacon
---
arch/arm64/include/asm/pgtable-prot.h | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64
Add PKEY support to signals, by saving and restoring POR_EL0 from the
stackframe.
Signed-off-by: Joey Gouly
Cc: Catalin Marinas
Cc: Will Deacon
Reviewed-by: Mark Brown
Acked-by: Szabolcs Nagy
---
arch/arm64/include/uapi/asm/sigcontext.h | 7
arch/arm64/kernel/signal.c
Implement the PKEYS interface, using the Permission Overlay Extension.
Signed-off-by: Joey Gouly
Cc: Catalin Marinas
Cc: Will Deacon
---
arch/arm64/include/asm/mmu.h | 1 +
arch/arm64/include/asm/mmu_context.h | 51 -
arch/arm64/include/asm/pgtable.h | 22
Define the new system registers that POE introduces and context switch them.
Signed-off-by: Joey Gouly
Cc: Marc Zyngier
Cc: Oliver Upton
Cc: Catalin Marinas
Cc: Will Deacon
---
arch/arm64/include/asm/kvm_host.h | 4 +++
arch/arm64/include/asm/vncr_mapping.h | 1 +
arch/arm64
This indicates if the system supports POE. This is a CPUCAP_BOOT_CPU_FEATURE
as the boot CPU will enable POE if it has it, so secondary CPUs must also
have this feature.
Signed-off-by: Joey Gouly
Cc: Catalin Marinas
Cc: Will Deacon
---
arch/arm64/kernel/cpufeature.c | 9 +
arch/arm64
POR_EL0 is a register that can be modified by userspace directly,
so it must be context switched.
Signed-off-by: Joey Gouly
Cc: Catalin Marinas
Cc: Will Deacon
---
arch/arm64/include/asm/cpufeature.h | 6 ++
arch/arm64/include/asm/processor.h | 1 +
arch/arm64/include/asm/sysreg.h
To allow using newer instructions that current assemblers don't know about,
replace the `at` instruction with the underlying SYS instruction.
Signed-off-by: Joey Gouly
Cc: Marc Zyngier
Cc: Oliver Upton
Cc: Catalin Marinas
Cc: Will Deacon
---
arch/arm64/include/asm/kvm_asm.h
Allow EL0 or EL1 to access POR_EL0 without being trapped to EL2.
Signed-off-by: Joey Gouly
Cc: Catalin Marinas
Cc: Will Deacon
Acked-by: Catalin Marinas
---
arch/arm64/include/asm/el2_setup.h | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/include/asm
Use the new CONFIG_ARCH_PKEY_BITS to simplify setting these bits
for different architectures.
Signed-off-by: Joey Gouly
Cc: Andrew Morton
Cc: linux-fsde...@vger.kernel.org
Cc: linux...@kvack.org
---
fs/proc/task_mmu.c | 2 ++
include/linux/mm.h | 16 ++--
2 files changed, 12
The new config option specifies how many bits are in each PKEY.
Signed-off-by: Joey Gouly
Cc: Thomas Gleixner
Cc: Ingo Molnar
Cc: Borislav Petkov
Cc: Dave Hansen
Cc: H. Peter Anvin
Cc: x...@kernel.org
---
arch/x86/Kconfig | 4
1 file changed, 4 insertions(+)
diff --git a/arch/x86
then the PKEYS interface is
implemented, and then the selftests are made to work on arm64.
I have tested the modified protection_keys test on x86_64, but not PPC.
I haven't build tested the x86/ppc arch changes.
Thanks,
Joey
Joey Gouly (29):
powerpc/mm: add ARCH_PKEY_BITS to Kconfig
x
The new config option specifies how many bits are in each PKEY.
Signed-off-by: Joey Gouly
Cc: Michael Ellerman
Cc: Nicholas Piggin
Cc: Christophe Leroy
Cc: "Aneesh Kumar K.V"
Cc: "Naveen N. Rao"
Cc: linuxppc-dev@lists.ozlabs.org
---
arch/powerpc/Kconfig | 4 +++
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