On 05/21/2014 11:45 AM, Vinod Koul wrote:
On Thu, May 08, 2014 at 05:52:37PM +0800, Hongbo Zhang wrote:
On 05/07/2014 04:31 PM, Shevchenko, Andriy wrote:
On Sun, 2014-05-04 at 18:22 +0800, Hongbo Zhang wrote:
On 05/03/2014 12:46 AM, Vinod Koul wrote:
On Fri, Apr 18, 2014 at 04:17:51PM +0800
On 05/03/2014 12:50 AM, Vinod Koul wrote:
On Fri, Apr 18, 2014 at 04:17:49PM +0800, hongbo.zh...@freescale.com wrote:
This need review from Dan ...
Dan, could you please have a look at this? thanks.
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On 05/07/2014 04:31 PM, Shevchenko, Andriy wrote:
On Sun, 2014-05-04 at 18:22 +0800, Hongbo Zhang wrote:
On 05/03/2014 12:46 AM, Vinod Koul wrote:
On Fri, Apr 18, 2014 at 04:17:51PM +0800, hongbo.zh...@freescale.com wrote:
From: Hongbo Zhang
This patch adds suspend resume functions for
On 05/03/2014 12:46 AM, Vinod Koul wrote:
On Fri, Apr 18, 2014 at 04:17:51PM +0800, hongbo.zh...@freescale.com wrote:
From: Hongbo Zhang
This patch adds suspend resume functions for Freescale DMA driver.
.prepare callback is used to stop further descriptors from being added into the
pending
On 05/03/2014 12:51 AM, Vinod Koul wrote:
On Fri, Apr 18, 2014 at 04:17:50PM +0800, hongbo.zh...@freescale.com wrote:
From: Hongbo Zhang
The usage of spin_lock_irqsave() is a stronger locking mechanism than is
required throughout the driver. The minimum locking required should be used
On 04/14/2014 09:40 PM, Andy Shevchenko wrote:
On Fri, 2014-04-11 at 16:14 +0800, Hongbo Zhang wrote:
On 04/10/2014 07:29 PM, Andy Shevchenko wrote:
On Thu, 2014-04-10 at 15:10 +0800, hongbo.zh...@freescale.com wrote:
[]
@@ -819,8 +826,7 @@ static void fsldma_cleanup_descriptor(struct
On 04/11/2014 04:00 PM, Hongbo Zhang wrote:
On 04/10/2014 07:56 PM, Andy Shevchenko wrote:
On Thu, 2014-04-10 at 15:10 +0800, hongbo.zh...@freescale.com wrote:
From: Hongbo Zhang
Fix the potential risk when enable config NET_DMA and ASYNC_TX.
Async_tx is
lack of support in current release
On 04/10/2014 07:29 PM, Andy Shevchenko wrote:
On Thu, 2014-04-10 at 15:10 +0800, hongbo.zh...@freescale.com wrote:
From: Hongbo Zhang
There are several places where descriptors are freed using identical code.
This patch puts this code into a function to reduce code duplication.
Signed-off
On 04/10/2014 07:56 PM, Andy Shevchenko wrote:
On Thu, 2014-04-10 at 15:10 +0800, hongbo.zh...@freescale.com wrote:
From: Hongbo Zhang
Fix the potential risk when enable config NET_DMA and ASYNC_TX. Async_tx is
lack of support in current release process of dma descriptor, all descriptors
On 04/10/2014 08:05 PM, Andy Shevchenko wrote:
On Thu, 2014-04-10 at 15:10 +0800, hongbo.zh...@freescale.com wrote:
From: Hongbo Zhang
This patch adds suspend resume functions for Freescale DMA driver.
.prepare callback is used to stop further descriptors from being added into the
pending
On 04/10/2014 04:46 PM, David Laight wrote:
From: hongbo.zh...@freescale.com
Methods of accessing DMA contorller registers are inconsistent, some registers
^^
Thanks.
sorry, that it a typo.
I would wait to see if there are other defects I have to correct, if y
Sorry, forgot the cover letter, plus it here.
From: Hongbo Zhang
Date: Thu, 10 Apr 2014 15:16:31 +0800
Subject: [PATCH v3 0/8] DMA: Freescale: driver cleanups and enhancements
Hi Vinod Koul,
Please have a look at the v3 patch set.
v2 -> v3 change:
Only add "chan->pm_state = R
On 04/04/2014 11:27 AM, hongbo.zh...@freescale.com wrote:
From: Hongbo Zhang
This patch adds suspend resume functions for Freescale DMA driver.
.prepare callback is used to stop further descriptors from being added into the
pending queue, and also issue pending queues into execution if there
On 03/28/2014 11:44 AM, Hongbo Zhang wrote:
On 03/11/2014 07:06 PM, Vinod Koul wrote:
On Thu, Jan 16, 2014 at 01:47:22PM +0800, hongbo.zh...@freescale.com
wrote:
From: Hongbo Zhang
There are several places where descriptors are freed using identical
code.
This patch puts this code into a
On 04/03/2014 12:35 AM, Vinod Koul wrote:
On Mon, Mar 31, 2014 at 12:08:55PM +0800, Hongbo Zhang wrote:
On 03/29/2014 09:45 PM, Vinod Koul wrote:
On Fri, Mar 28, 2014 at 02:33:37PM +0800, Hongbo Zhang wrote:
On 03/26/2014 03:01 PM, Vinod Koul wrote:
On Thu, 2014-01-16 at 13:47 +0800
On 03/29/2014 09:45 PM, Vinod Koul wrote:
On Fri, Mar 28, 2014 at 02:33:37PM +0800, Hongbo Zhang wrote:
On 03/26/2014 03:01 PM, Vinod Koul wrote:
On Thu, 2014-01-16 at 13:47 +0800, hongbo.zh...@freescale.com wrote:
From: Hongbo Zhang
The usage of spin_lock_irqsave() is a stronger locking
On 03/26/2014 03:01 PM, Vinod Koul wrote:
On Thu, 2014-01-16 at 13:47 +0800, hongbo.zh...@freescale.com wrote:
From: Hongbo Zhang
The usage of spin_lock_irqsave() is a stronger locking mechanism than is
required throughout the driver. The minimum locking required should be used
instead
On 03/11/2014 07:06 PM, Vinod Koul wrote:
On Thu, Jan 16, 2014 at 01:47:22PM +0800, hongbo.zh...@freescale.com wrote:
From: Hongbo Zhang
There are several places where descriptors are freed using identical code.
This patch puts this code into a function to reduce code duplication.
Signed
Hi Vinod,
How about these patches?
Thanks.
On 01/16/2014 01:47 PM, hongbo.zh...@freescale.com wrote:
From: Hongbo Zhang
Hi Vinod Koul and Dan Williams,
Please have a look at these patches.
Note that patch 2~6 had beed sent out for upstream before, but were together
with other storage
On 12/13/2013 01:43 PM, Liu Shengzhou-B36685 wrote:
-Original Message-
From: Hongbo Zhang [mailto:hongbo.zh...@freescale.com]
Sent: Thursday, December 12, 2013 5:57 PM
To: Liu Shengzhou-B36685; linuxppc-dev@lists.ozlabs.org; Wood Scott-
B07421
Subject: Re: [PATCH 1/5] powerpc/85xx/dts
in address, any
internal interrupt number greater than 159 should be added (16+208) to work,
adding 16 is due to external interrupts as usual, adding 208 is due to
non-continous MPIC register space.
Signed-off-by: Shengzhou Liu
Signed-off-by: Hongbo Zhang
---
arch/powerp
On 12/11/2013 02:33 AM, Scott Wood wrote:
On Tue, 2013-12-10 at 18:33 +0800, Hongbo Zhang wrote:
Scott,
This issue is due to the non-continuous MPIC register, I think there is
two ways to fix it.
The first one is as what we are discussing, in fact the Bman/Qman DT
author had introduced this
i - 11); /* scape the
address not for interrupts */
mpic_assign_isu(mpic, i, mpic->paddr + addr_off);
}
// Add this end
mpic_init(mpic);
}
On 12/07/2013 03:21 AM, Scott Wood wrote:
On Fri, 2013-11-29 at 16:07 +0800, hongbo.zh...@freescale.com wrote:
From: Hongbo Zhang
MPIC
On 11/13/2013 04:57 PM, Vinod Koul wrote:
On Thu, Sep 26, 2013 at 05:33:40PM +0800, hongbo.zh...@freescale.com wrote:
From: Hongbo Zhang
Hi DMA and DT maintainers, please have a look at these V11 patches.
Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch set
adds
On 11/12/2013 08:09 AM, Dan Williams wrote:
On Mon, Nov 11, 2013 at 1:12 AM, Hongbo Zhang
wrote:
diff --git a/drivers/dma/fsldma.c b/drivers/dma/fsldma.c
index 49e8fbd..16a9a48 100644
--- a/drivers/dma/fsldma.c
+++ b/drivers/dma/fsldma.c
@@ -1261,7 +1261,9 @@ static int fsl_dma_chan_probe
On 11/08/2013 10:45 AM, Dan Williams wrote:
On Mon, Nov 4, 2013 at 6:31 PM, Hongbo Zhang wrote:
Hi Vinod Koul and Dan Williams,
Ping?
Not much to review from the dmaengine side, just one question below.
It would be helpful if you can send these to the new dmaengine
patchwork at dmaeng
Hi Vinod Koul and Dan Williams,
Ping?
On 10/17/2013 01:56 PM, Hongbo Zhang wrote:
Hi Vinod,
I have gotten ACK from Mark for both the 1/3 and 2/3 patches.
Thanks.
On 09/26/2013 05:33 PM, hongbo.zh...@freescale.com wrote:
From: Hongbo Zhang
This patch adds support to 8-channel DMA engine
Hi Vinod,
I have gotten ACK from Mark for both the 1/3 and 2/3 patches.
Thanks.
On 09/26/2013 05:33 PM, hongbo.zh...@freescale.com wrote:
From: Hongbo Zhang
This patch adds support to 8-channel DMA engine, thus the driver works for both
the new 8-channel and the legacy 4-channel DMA engines
On 10/15/2013 09:38 PM, Mark Rutland wrote:
On Tue, Oct 08, 2013 at 04:22:07AM +0100, Hongbo Zhang wrote:
Hi Mark, Stephen and other DT maintainers?
The 1/3 had already been acked by Mark, and please have a further look
at this patch 2/3.
The DMA maintainer Vinod needs ack for the DT related
:
From: Hongbo Zhang
Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch adds
the device tree nodes for them.
Signed-off-by: Hongbo Zhang
---
.../devicetree/bindings/powerpc/fsl/dma.txt| 70 +
arch/powerpc/boot/dts/fsl/b4si-post.dtsi
On 09/26/2013 10:28 AM, David Gibson wrote:
On Wed, Sep 25, 2013 at 08:46:32PM -0500, Scott Wood wrote:
On Wed, 2013-09-25 at 15:35 +0800, Hongbo Zhang wrote:
By the way, I know maybe it is difficult, but why not introduce a
document of maintaining rules for the dt binding docs? we have
On 09/25/2013 01:31 AM, Stephen Warren wrote:
On 09/24/2013 04:30 AM, Hongbo Zhang wrote:
On 09/24/2013 01:04 AM, Stephen Warren wrote:
On 09/18/2013 04:15 AM, hongbo.zh...@freescale.com wrote:
From: Hongbo Zhang
Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this
patch adds
On 09/24/2013 01:04 AM, Stephen Warren wrote:
On 09/18/2013 04:15 AM, hongbo.zh...@freescale.com wrote:
From: Hongbo Zhang
Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch adds
the device tree nodes for them.
diff --git a/Documentation/devicetree/bindings/powerpc/fsl
On 09/13/2013 01:15 AM, Mark Rutland wrote:
On Tue, Sep 03, 2013 at 10:01:50AM +0100, Hongbo Zhang wrote:
On 09/02/2013 11:58 PM, Mark Rutland wrote:
Hi,
On Fri, Aug 30, 2013 at 12:26:19PM +0100, hongbo.zh...@freescale.com wrote:
From: Hongbo Zhang
Freescale QorIQ T4 and B4 introduce new 8
Mark? ping.
On 09/03/2013 05:01 PM, Hongbo Zhang wrote:
On 09/02/2013 11:58 PM, Mark Rutland wrote:
Hi,
On Fri, Aug 30, 2013 at 12:26:19PM +0100, hongbo.zh...@freescale.com
wrote:
From: Hongbo Zhang
Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this
patch adds
the
On 09/02/2013 11:58 PM, Mark Rutland wrote:
Hi,
On Fri, Aug 30, 2013 at 12:26:19PM +0100, hongbo.zh...@freescale.com wrote:
From: Hongbo Zhang
Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch adds
the device tree nodes for them.
Signed-off-by: Hongbo Zhang
On 08/28/2013 08:51 PM, Mark Rutland wrote:
On Wed, Aug 28, 2013 at 07:54:01AM +0100, Hongbo Zhang wrote:
On 08/27/2013 07:35 PM, Mark Rutland wrote:
On Tue, Aug 27, 2013 at 11:42:02AM +0100, hongbo.zh...@freescale.com wrote:
From: Hongbo Zhang
Freescale QorIQ T4 and B4 introduce new 8
On 08/27/2013 07:25 PM, Mark Rutland wrote:
On Tue, Aug 27, 2013 at 11:42:01AM +0100, hongbo.zh...@freescale.com wrote:
From: Hongbo Zhang
This patch updates the discription of each type of DMA controller and its
channels, it is preparation for adding another new DMA controller binding, it
On 08/27/2013 07:35 PM, Mark Rutland wrote:
On Tue, Aug 27, 2013 at 11:42:02AM +0100, hongbo.zh...@freescale.com wrote:
From: Hongbo Zhang
Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch adds
the device tree nodes for them.
Signed-off-by: Hongbo Zhang
On 08/23/2013 11:17 AM, Hongbo Zhang wrote:
On 08/22/2013 07:16 AM, Stephen Warren wrote:
On 08/21/2013 05:00 PM, Scott Wood wrote:
On Wed, 2013-08-21 at 16:40 -0600, Stephen Warren wrote:
On 07/29/2013 04:49 AM, hongbo.zh...@freescale.com wrote:
+- reg
On 08/22/2013 07:16 AM, Stephen Warren wrote:
On 08/21/2013 05:00 PM, Scott Wood wrote:
On Wed, 2013-08-21 at 16:40 -0600, Stephen Warren wrote:
On 07/29/2013 04:49 AM, hongbo.zh...@freescale.com wrote:
+- reg :
+- interrupts:
s/interrupts/specifier/
D
/20/2013 04:15 PM, Vinod Koul wrote:
On Tue, Aug 20, 2013 at 04:33:46PM +0800, Hongbo Zhang wrote:
On 07/29/2013 06:59 PM, Vinod Koul wrote:
On Mon, Jul 29, 2013 at 06:49:01PM +0800, hongbo.zh...@freescale.com wrote:
From: Hongbo Zhang
Hi Vinod, Dan, Scott and Leo, please have a look at these V7
On 07/29/2013 06:59 PM, Vinod Koul wrote:
On Mon, Jul 29, 2013 at 06:49:01PM +0800, hongbo.zh...@freescale.com wrote:
From: Hongbo Zhang
Hi Vinod, Dan, Scott and Leo, please have a look at these V7 patches.
The dma relates changes look okay to me.
I need someone to review and ACK the DT
On 07/30/2013 06:10 AM, Scott Wood wrote:
On 07/29/2013 05:49:03 AM, hongbo.zh...@freescale.com wrote:
From: Hongbo Zhang
Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this
patch adds
the device tree nodes for them.
Signed-off-by: Hongbo Zhang
---
.../devicetree/bindings
On 07/29/2013 06:59 PM, Vinod Koul wrote:
On Mon, Jul 29, 2013 at 06:49:01PM +0800, hongbo.zh...@freescale.com wrote:
From: Hongbo Zhang
Hi Vinod, Dan, Scott and Leo, please have a look at these V7 patches.
The dma relates changes look okay to me.
I need someone to review and ACK the DT
On 07/25/2013 03:33 AM, Scott Wood wrote:
On 07/24/2013 01:21:09 AM, hongbo.zh...@freescale.com wrote:
From: Hongbo Zhang
The variable cookie is initialized in a list_for_each_entry loop,
if(unlikely)
the list is empty, this variable will be used uninitialized, so we
get a gcc
compiling
On 07/15/2013 09:31 PM, Kumar Gala wrote:
On Jul 5, 2013, at 1:27 AM,
wrote:
From: Hongbo Zhang
Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch add
the device tree nodes for them.
Signed-off-by: Hongbo Zhang
---
arch/powerpc/boot/dts/fsl/elo3-dma-0.dtsi
On 07/10/2013 12:48 AM, Scott Wood wrote:
On 07/05/2013 01:27:05 AM, hongbo.zh...@freescale.com wrote:
From: Hongbo Zhang
Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this
patch add
the device tree nodes for them.
Signed-off-by: Hongbo Zhang
---
arch/powerpc/boot/dts
On 07/03/2013 11:53 AM, Hongbo Zhang wrote:
hmm...add the devicetree-disc...@lists.ozlabs.org into list.
Note that we are discussing a better naming for this new compatible
property in the corresponding [PATCH 2/2], so I will resend a v2 of
this patch.
On 07/01/2013 11:46 AM, hongbo.zh
hmm...add the devicetree-disc...@lists.ozlabs.org into list.
Note that we are discussing a better naming for this new compatible
property in the corresponding [PATCH 2/2], so I will resend a v2 of this
patch.
On 07/01/2013 11:46 AM, hongbo.zh...@freescale.com wrote:
From: Hongbo Zhang
On 07/03/2013 07:13 AM, Scott Wood wrote:
On 06/30/2013 10:46:18 PM, hongbo.zh...@freescale.com wrote:
From: Hongbo Zhang
This patch adds support to 8-channel DMA engine, thus the driver
works for both
the new 8-channel and the legacy 4-channel DMA engines.
Signed-off-by: Hongbo Zhang
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