On Thu, Jun 9, 2011 at 6:42 PM, Benjamin Herrenschmidt
wrote:
> On Thu, 2011-06-09 at 09:58 -0500, Eric Van Hensbergen wrote:
>> On Tue, Jun 7, 2011 at 7:47 PM, Benjamin Herrenschmidt
>> wrote:
>> > BTW. Care to explain to me why you have U2 -both- in the arguments to
On Tue, Jun 7, 2011 at 7:47 PM, Benjamin Herrenschmidt
wrote:
> On Tue, 2011-06-07 at 16:36 -0500, Eric Van Hensbergen wrote:
>
>> open to alternatives. jimix also suggested changing NEED_L1_WRITETHROUGH
>> to DCBZ_BROKEN, which I'm open to if you thin
>> +#define PPC_FEATURE_HAS_FPU_FP2 0x0040
>
> Any chance for a better name ?
>
That's the official external name, it sucks. I'm happy to
PPC_FEATURE_DOUBLE_HUMMER if you'd prefer, otherwise I'm not feeling
too creative, but am open to artistic suggestions.
-eric
___
ing
to stub code inside of the MMU_FTRs so I don't have so many no-ops. I'm
open to alternatives. jimix also suggested changing NEED_L1_WRITETHROUGH
to DCBZ_BROKEN, which I'm open to if you think appropriate, or maybe
DCBZ_BROKEN_DAMNIT would be more apt.
Thanks for any help.
ing other code as an example.
Thanks for any feedback.
Signed-off-by: Eric Van Hensbergen
---
arch/powerpc/include/asm/cputable.h |1 +
arch/powerpc/include/asm/mmu.h |9 +
arch/powerpc/kernel/cpu_setup_44x.S |1 +
arch/powerpc/kernel/cputable.c | 16
On Thu, May 19, 2011 at 10:52 PM, Benjamin Herrenschmidt
wrote:
>> Unfortunately, the firmware is also required:
>> - to configure Blue Gene Interrupt Controller(BIC)
>> - to configure Torus DMA unit. e.g. fifo
>> - to configure global interrupt (even we don't use, we need to disable
>> some chann
On Thu, May 19, 2011 at 7:39 PM, Benjamin Herrenschmidt
wrote:
> On Wed, 2011-05-18 at 16:24 -0500, Eric Van Hensbergen wrote:
>> BG/P maps firmware with an early TLB
>
> That's a bit gross. How often do you call that firmware in practice ?
> Aren't you better off i
On Thu, May 19, 2011 at 7:35 PM, Benjamin Herrenschmidt
wrote:
> On Wed, 2011-05-18 at 16:24 -0500, Eric Van Hensbergen wrote:
>> + .dcache_bsize = 32,
>> + .cpu_setup = __
On Thu, May 19, 2011 at 7:36 PM, Benjamin Herrenschmidt
wrote:
> On Wed, 2011-05-18 at 16:24 -0500, Eric Van Hensbergen wrote:
>>
>> -#ifdef CONFIG_NOT_COHERENT_CACHE
>> +#if defined(CONFIG_NOT_COHERENT_CACHE) || defined(CONFIG_BGP)
>> #define ARCH_DMA_MINALIGN
On Thu, May 19, 2011 at 6:16 PM, Michael Neuling wrote:
> In message you wrote:
>> On Thu, May 19, 2011 at 4:36 PM, Michael Neuling wrote:
>> > In message you wrote=
>> :
>> >> On Thu, May 19, 2011 at 12:58 AM, Michael Neuling wr=
>> ote=3D
>> >> :
>> >> > Eric,
>> >> >
>> >> >> This patch add
Damnit Mikey, just after I hit send on [V2].
On Thu, May 19, 2011 at 4:36 PM, Michael Neuling wrote:
> In message you wrote:
>> On Thu, May 19, 2011 at 12:58 AM, Michael Neuling wrote=
>> :
>> > Eric,
>> >
>> >> This patch adds save/restore register support for the BlueGene/P
>> >> double h
BG/P nodes need to be configured for writethrough to work in SMP
configurations. This patch adds the right hooks in the MMU code
to make sure BGP_L1_WRITETHROUGH configurations are setup for BG/P.
Signed-off-by: Eric Van Hensbergen
---
arch/powerpc/include/asm/mmu-44x.h |2 ++
arch
This patch adds save/restore register support for the BlueGene/P
double FPU. Since there are two FPUs, we need to save and restore
twice the registers. Fortunately BG/P gives us some opcodes to
assist with that task.
Signed-off-by: Eric Van Hensbergen
---
arch/powerpc/include/asm/ppc-opcode.h
On Thu, May 19, 2011 at 12:58 AM, Michael Neuling wrote:
> Eric,
>
>> This patch adds save/restore register support for the BlueGene/P
>> double hummer FPU.
>
> What does this mean? Needs more details here.
>
Hi Mikey,
any specific details you are looking for here? AFAIK these patches
are requ
On Thu, May 19, 2011 at 5:43 AM, Josh Boyer wrote:
> On Wed, May 18, 2011 at 04:24:52PM -0500, Eric Van Hensbergen wrote:
>>
>>+config L1_WRITETHROUGH
>>+ bool "Blue Gene/P enabled writethrough mode"
>>+ depends on BGP
>>+ default y
On Thu, May 19, 2011 at 6:01 AM, Josh Boyer wrote:
> On Wed, May 18, 2011 at 04:24:49PM -0500, Eric Van Hensbergen wrote:
>>
>>I'll be maintaining the patchset in my kernel.org repository
>>(/pub/scm/linux/kernel/git/ericvh/bluegene.git) under the bluegene
>>bra
This patch adds the necessary core code to enable SMP support on BlueGene/P
Signed-off-by: Eric Van Hensbergen
---
arch/powerpc/kernel/head_44x.S | 72 +
arch/powerpc/mm/fault.c| 77
arch/powerpc/platforms
For BGP, it is convenient for 'kmalloc' to come back with 32-byte
aligned units for torus DMA
Signed-off-by: Eric Van Hensbergen
---
arch/powerpc/include/asm/page_32.h |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/include/asm/page_32.h
b/ar
BG/P maps firmware with an early TLB
Signed-off-by: Eric Van Hensbergen
---
arch/powerpc/include/asm/mmu-44x.h |6 +-
1 files changed, 5 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/include/asm/mmu-44x.h
b/arch/powerpc/include/asm/mmu-44x.h
index ca1b90c..2807d6e 100644
This patch adds save/restore register support for the BlueGene/P
double hummer FPU.
Signed-off-by: Eric Van Hensbergen
---
arch/powerpc/include/asm/ppc_asm.h | 39 ---
arch/powerpc/kernel/fpu.S |8 +++---
arch/powerpc/platforms/44x/Kconfig |9
BG/P nodes need to be configured for writethrough to work in SMP
configurations. This patch adds the right hooks in the MMU code
to make sure L1_WRITETHROUGH configurations are setup for BG/P.
Signed-off-by: Eric Van Hensbergen
---
arch/powerpc/include/asm/mmu-44x.h |2 ++
arch/powerpc
Signed-off-by: Eric Van Hensbergen
---
arch/powerpc/kernel/cputable.c | 14 ++
1 files changed, 14 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index b9602ee..0eb245e 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b
ention reviewing these patches.
Signed-off-by: Eric Van Hensbergen
---
MAINTAINERS |8
1 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 69f19f1..3ffca88 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3863,6 +3863,14 @@ S: Maintained
F:
23 matches
Mail list logo