On Wed, May 28, 2025 at 11:43:59AM -0400, Frank Li wrote:
> On Mon, May 26, 2025 at 04:54:30PM +0100, Conor Dooley wrote:
> > On Thu, May 22, 2025 at 05:39:50PM -0400, Frank Li wrote:
> > > Add vf610 reset controller, which used to reboot system to fix below
> &
On Thu, May 22, 2025 at 05:39:50PM -0400, Frank Li wrote:
> Add vf610 reset controller, which used to reboot system to fix below
> CHECK_DTB warnings:
>
> arch/arm/boot/dts/nxp/vf/vf610-bk4.dtb: /soc/bus@4000/src@4006e000:
> failed to match any schema with compatible: ['fsl,vf610-src', 'sy
On Fri, May 23, 2025 at 04:45:23PM -0400, Frank Li wrote:
> Add fsl,imx23-digctl.yaml for i.MX23 and i.MX28 to fix below CHECK_DTB
> warning:
>
> arch/arm/boot/dts/nxp/mxs/imx23-sansa.dtb:
> /apb@8000/apbh-bus@8000/digctl@8001c000:
> failed to match any schema with compatible: ['fsl,i
Convert q(b)man-* to yaml
> format")
> Signed-off-by: Rob Herring (Arm)
Acked-by: Conor Dooley
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On Thu, Apr 03, 2025 at 07:38:00PM +0200, J. Neuschäfer via B4 Relay wrote:
> From: "J. Neuschäfer"
>
> As part of a larger effort to bring various PowerPC-related bindings
> into the YAML world, this patch converts msi-pic.txt to YAML and moves
> it into the bindings/interrupt-controller/ direct
On Thu, Mar 20, 2025 at 10:39:31AM -0700, Suren Baghdasaryan wrote:
> This patch introduces a new "guarantee" property for shared-dma-pool.
> With this property, admin can create specific memory pool as
> GCMA-based CMA if they care about allocation success rate and latency.
> The downside of GCMA
On Tue, Jan 14, 2025 at 09:40:11AM +0100, Thomas Weißschuh wrote:
> On Mon, Jan 13, 2025 at 07:48:15PM +0000, Conor Dooley wrote:
> > On Fri, Jan 10, 2025 at 04:23:48PM +0100, Thomas Weißschuh wrote:
> > > The generic storage implementation provides the same features as th
On Fri, Jan 10, 2025 at 04:23:48PM +0100, Thomas Weißschuh wrote:
> The generic storage implementation provides the same features as the
> custom one. However it can be shared between architectures, making
> maintenance easier.
>
> Co-developed-by: Nam Cao
> Signed-off-by: Nam Cao
> Signed-off-b
On Mon, Dec 16, 2024 at 03:10:03PM +0100, Thomas Weißschuh wrote:
> The generic storage implementation provides the same features as the
> custom one. However it can be shared between architectures, making
> maintenance easier.
>
> Co-developed-by: Nam Cao
> Signed-off-by: Nam Cao
> Signed-off-b
On Mon, Dec 02, 2024 at 12:57:55PM +0800, Chen-Yu Tsai wrote:
> Otherwise the binding matches against random nodes with "simple-bus"
> giving out all kinds of invalid warnings:
>
> $ make CHECK_DTBS=y mediatek/mt8188-evb.dtb
> SYNCinclude/config/auto.conf.cmd
> UPD include/
t; be uint32-array and constraint the single entry cases.
>
> Signed-off-by: Rob Herring (Arm)
Reviewed-by: Conor Dooley
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schemas/serial/fsl-lpuart.yaml#
>
> Alternatively, this property could be added to LPUART binding
> (fsl-lpuart.yaml), but it looks like none of in-tree DTS use it.
>
> Fixes: ad21e3840a88 ("dt-bindings: soc: fsl: Convert rcpm to yaml format")
> Signed-off-by: Krzysztof Kozlowski
Acked-by: Conor Dooley
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On Tue, Jun 04, 2024 at 01:44:15PM +0200, Alexandre Ghiti wrote:
> On Tue, Jun 4, 2024 at 10:52 AM Conor Dooley wrote:
> >
> > On Tue, Jun 04, 2024 at 09:17:26AM +0200, Alexandre Ghiti wrote:
> > > On Tue, Jun 4, 2024 at 9:15 AM Alexandre Ghiti
> > > wrote:
e kernel. But I'm not opposed to that
> at all, let me check how we handle other extensions. Maybe @Conor
> Dooley has some feedback here?
To be honest, not really sure what to give feedback on. Could you
elaborate on exactly what the option is going to do? Given the
portability con
On Fri, May 10, 2024 at 10:38:30AM +0800, Shengjiu Wang wrote:
> On Fri, May 10, 2024 at 10:27 AM Shengjiu Wang
> wrote:
> >
> > On Fri, May 10, 2024 at 1:14 AM Conor Dooley wrote:
> > >
> > > On Thu, May 09, 2024 at 10:57:38AM +0800, Shengjiu Wang wrote:
>
On Thu, May 09, 2024 at 10:57:38AM +0800, Shengjiu Wang wrote:
> Add two PLL clock sources, they are the parent clocks of the root clock
> one is for 8kHz series rates, named as 'pll8k', another one is for
> 11kHz series rates, named as 'pll11k'. They are optional clocks,
> if there are such clocks
On Thu, May 09, 2024 at 10:57:37AM +0800, Shengjiu Wang wrote:
> Add compatible string "fsl,imx95-xcvr" for i.MX95 platform.
That's apparent from the diff. Why is it not compatible with existing
devices?
Cheers,
Conor.
>
> Signed-off-by: Shengjiu Wang
> ---
> Documentation/devicetree/bindings
On Fri, Mar 22, 2024 at 07:45:29AM +0100, Javier Carrasco wrote:
> Convert existing binding to support validation.
>
> This is a straightforward conversion with no new properties.
>
Reviewed-by: Conor Dooley
Thanks,
Conor.
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I think its a poor
choice here regardless. With a compatible for the filename:
Reviewed-by: Conor Dooley
Thanks,
Conor.
> @@ -0,0 +1,37 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/hwmon/ibm,powernv.yaml#
On Thu, Mar 07, 2024 at 04:15:01PM -0500, Stefan Berger wrote:
>
>
> On 3/7/24 15:39, Conor Dooley wrote:
> > On Thu, Mar 07, 2024 at 10:11:03AM -0500, Stefan Berger wrote:
> > > On 3/7/24 05:41, Michael Ellerman wrote:
> > > > Stefan Berger writ
On Thu, Mar 07, 2024 at 10:11:03AM -0500, Stefan Berger wrote:
> On 3/7/24 05:41, Michael Ellerman wrote:
> > Stefan Berger writes:
> >
> > Also adding the new linux,sml-log property should be accompanied by a
> > change to the device tree binding.
>
>
> See my proposal below.
>
> >
> > The
On Wed, Mar 06, 2024 at 10:55:11AM -0500, Stefan Berger wrote:
> If linux,sml-log is available use it to get the TPM log rather than the
> pointer found in linux,sml-base. This resolves an issue on PowerVM and KVM
> on Power where after a kexec the memory pointed to by linux,sml-base may
> have bee
Hey Maxwell,
FYI:
> mm/vmalloc: allow arch-specific vmalloc_node overrides
> mm: pgalloc: support address-conditional pmd allocation
With these two arch/riscv/configs/* are broken with calls to undeclared
functions.
> arm64: separate code and data virtual memory allocation
> arm64: dyna
ot;real" drivers, then the solution is simple, firmware needs implementation
needs to patch the DT and, at least, mark the uart as reserved if it is
using it to provide the debug console. Marking this nonportable so that
people only walk into this with their eyes open seems like a r
arch/riscv/include/asm/ftrace.h | 2 +-
Reviewed-by: Conor Dooley
Cheers,
Conor.
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On Tue, Jan 09, 2024 at 04:55:51PM +0900, Chancel Liu wrote:
> Add compatible string "fsl,imx95-micfil" for i.MX95 platform.
>
> Signed-off-by: Chancel Liu
> ---
> .../devicetree/bindings/sound/fsl,micfil.yaml | 15 +++
> 1 file changed, 11 insertions(+), 4 deletions(-)
>
> diff
mage_info() because the content has been printed
> out in generic code.
>
> Signed-off-by: Baoquan He
I'm sorry - I meant to look at this several days ago but I forgot.
Apart from the typo that crept back into $subject, this version explains
the rationale behind what you're
On Wed, Dec 06, 2023 at 11:37:52PM +0800, Baoquan He wrote:
> On 12/04/23 at 04:14pm, Conor Dooley wrote:
> > On Mon, Dec 04, 2023 at 11:38:05PM +0800, Baoquan He wrote:
> > > On 12/01/23 at 10:38am, Conor Dooley wrote:
> > > > On Thu, Nov 30, 2023 at 10:3
On Mon, Dec 04, 2023 at 11:38:05PM +0800, Baoquan He wrote:
> On 12/01/23 at 10:38am, Conor Dooley wrote:
> > On Thu, Nov 30, 2023 at 10:39:53AM +0800, Baoquan He wrote:
> >
> > $subject has a typo in the arch bit :)
>
> Indeed, will fix if need report.
On Thu, Nov 30, 2023 at 10:39:53AM +0800, Baoquan He wrote:
$subject has a typo in the arch bit :)
> Replace pr_debug() with the newly added kexec_dprintk() in kexec_file
> loading related codes.
Commit messages should be understandable in isolation, but this only
explains (part of) what is obvi
On Mon, Oct 23, 2023 at 06:04:06PM +0200, Arnd Bergmann wrote:
> On Mon, Oct 23, 2023, at 17:37, Conor Dooley wrote:
> > On Mon, Oct 23, 2023 at 01:01:54PM +0200, Arnd Bergmann wrote:
>
> >> index 25474f8c12b79..f571bad2d22d0 100644
> >> --- a/arch/riscv/Kconfig
On Mon, Oct 23, 2023 at 01:01:54PM +0200, Arnd Bergmann wrote:
> From: Arnd Bergmann
>
> The cleanup for the CONFIG_KEXEC Kconfig logic accidentally changed the
> 'depends on CRYPTO=y' dependency to a plain 'depends on CRYPTO', which
> causes a link failure when all the crypto support is in a loa
for any node.
>
> Add unevaluatedProperties or additionalProperties as appropriate.
>
> Signed-off-by: Rob Herring
Acked-by: Conor Dooley
Thanks,
Conor.
> ---
> Documentation/devicetree/bindings/sound/dialog,da7219.yaml | 1 +
> Documentation/devicetree/bind
On Wed, Sep 13, 2023 at 03:56:16PM +0100, Conor Dooley wrote:
> On Wed, Sep 13, 2023 at 04:52:50PM +0200, Herve Codina wrote:
> > On Wed, 13 Sep 2023 15:42:45 +0100
> > Conor Dooley wrote:
> >
> > > On Wed, Sep 13, 2023 at 09:26:40AM +0200, Herve
On Wed, Sep 13, 2023 at 04:52:50PM +0200, Herve Codina wrote:
> On Wed, 13 Sep 2023 15:42:45 +0100
> Conor Dooley wrote:
>
> > On Wed, Sep 13, 2023 at 09:26:40AM +0200, Herve Codina wrote:
> > > Hi Conor,
> > >
> > > On Tue, 12 Sep 202
On Wed, Sep 13, 2023 at 09:26:40AM +0200, Herve Codina wrote:
> Hi Conor,
>
> On Tue, 12 Sep 2023 18:21:58 +0100
> Conor Dooley wrote:
>
> > On Tue, Sep 12, 2023 at 12:10:18PM +0200, Herve Codina wrote:
> > > The QMC (QUICC mutichannel controller) i
On Tue, Sep 12, 2023 at 01:54:05PM -0500, Rob Herring wrote:
> > > + lantiq,data-rate-bps:
> > > +$ref: /schemas/types.yaml#/definitions/uint32
> > > +enum: [2048000, 4096000, 8192000, 16384000]
> >
> > -kBps is a standard suffix, would it be worth using that instead here?
> > What you ha
Yo,
I'm not au fait enough with this to leave particularly meaningful
comments, so just some minor ones for you.
On Tue, Sep 12, 2023 at 12:14:44PM +0200, Herve Codina wrote:
> The Lantiq PEF2256 is a framer and line interface component designed to
> fulfill all required interfacing between an an
On Tue, Sep 12, 2023 at 12:10:18PM +0200, Herve Codina wrote:
> The QMC (QUICC mutichannel controller) is a controller present in some
> PowerQUICC SoC such as MPC885.
> The QMC HDLC uses the QMC controller to transfer HDLC data.
>
> Additionally, a framer can be connected to the QMC HDLC.
> If pr
On Tue, Sep 12, 2023 at 10:14:58AM +0200, Herve Codina wrote:
> Additional properties in child node should not be allowed.
>
> Prevent them adding 'additionalProperties: false'
>
> Signed-off-by: Herve Codina
Acked-by: Conor Dooley
Thanks,
Conor.
> ---
>
Fixes: a9b121327c93 ("dt-bindings: soc: fsl: cpm_qe: Add QMC controller")
> Signed-off-by: Herve Codina
Acked-by: Conor Dooley
Thanks,
Conor.
> ---
> .../bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
&g
On Thu, Jul 27, 2023 at 11:09:48AM +0200, Herve Codina wrote:
> On Thu, 27 Jul 2023 09:19:59 +0100
> Conor Dooley wrote:
> > On Wed, Jul 26, 2023 at 05:02:01PM +0200, Herve Codina wrote:
> If needed, I can change to:
> title: QMC (QUICC Multichannel Controller) HDLC
>
On Wed, Jul 26, 2023 at 05:02:01PM +0200, Herve Codina wrote:
> The QMC (QUICC mutichannel controller) is a controller present in some
> PowerQUICC SoC such as MPC885.
> The QMC HDLC uses the QMC controller to transfer HDLC data.
>
> Signed-off-by: Herve Codina
> ---
> .../devicetree/bindings/ne
On Wed, Jul 26, 2023 at 05:02:23PM +0200, Herve Codina wrote:
> A framer can be connected to the QMC HDLC.
> If present, this framer is the interface between the TDM used by the QMC
> HDLC and the E1/T1 line.
> The QMC HDLC can use this framer to get information about the line and
> configure the l
Hey Eric,
On Mon, Jun 26, 2023 at 12:13:30PM -0400, Eric DeVolder wrote:
> The kexec and crash kernel options are provided in the common
> kernel/Kconfig.kexec. Utilize the common options and provide
> the ARCH_SUPPORTS_ and ARCH_SELECTS_ entries to recreate the
> equivalent set of KEXEC and CRAS
On Mon, May 01, 2023 at 09:54:43PM +0200, Ricardo Ribalda wrote:
> On Mon, 1 May 2023 at 19:41, Conor Dooley wrote:
> > On Mon, May 01, 2023 at 02:38:22PM +0200, Ricardo Ribalda wrote:
> > > If PGO is enabled, the purgatory ends up with multiple .text sections.
> > &g
Hey Ricardo,
On Mon, May 01, 2023 at 02:38:22PM +0200, Ricardo Ribalda wrote:
> If PGO is enabled, the purgatory ends up with multiple .text sections.
> This is not supported by kexec and crashes the system.
>
> Cc: sta...@vger.kernel.org
> Fixes: 930457057abe ("kernel/kexec_file.c: split up __ke
On Mon, May 01, 2023 at 07:18:12PM +0200, Ricardo Ribalda wrote:
> On Mon, 1 May 2023 at 18:19, Nick Desaulniers wrote:
> >
> > On Mon, May 1, 2023 at 5:39 AM Ricardo Ribalda wrote:
> > >
> > > If PGO is enabled, the purgatory ends up with multiple .text sections.
> > > This is not supported by k
On Fri, Apr 21, 2023 at 07:10:14PM +, Konstantin Ryabitsev wrote:
> April 21, 2023 2:59 PM, "Palmer Dabbelt" wrote:
> >> riscv: Use PUD/P4D/PGD pages for the linear mapping
> >> (https://patchwork.kernel.org/project/linux-riscv/list/?series=733603)
> >> base-commit-tag: v6.3-rc1
> >
> > The Q
From: Conor Dooley
There's a bunch of bindings for (mostly l2) cache controllers
scattered to the four winds, move them to a common directory.
I renamed the freescale l2cache.txt file, as while that might make sense
when the parent dir is fsl, it's confusing after the move.
The t
*surely* if no other arch needs to do that, then we are safe to also
not do it... Your logic seems right by me at least, especially given the
lack of flushes elsewhere.
Reviewed-by: Conor Dooley
Cheers,
Conor.
> Signed-off-by: Arnd Bergmann
> ---
> arch/riscv/mm/dma-noncoherent.c
n by the device.
>
> riscv also invalidates the caches before the transfer, which does
> not appear to serve any purpose.
Rationale makes sense to me..
Reviewed-by: Conor Dooley
Thanks for working on all of this Arnd!
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On Thu, Feb 23, 2023 at 11:36:43AM +, Jiaxun Yang wrote:
> For riscv our assumption is unless a device states it is non-coherent,
> we take it to be DMA coherent.
>
> Select ARCH_DMA_DEFAULT_COHERENT to ensure dma_default_coherent
> is always initialized to true.
>
> Signed-off-by: Jiaxun Yan
On Wed, Feb 22, 2023 at 04:20:16PM +, Jiaxun Yang wrote:
> > 2023年2月22日 16:02，Conor Dooley 写道：
> > On Wed, Feb 22, 2023 at 03:55:19PM +, Jiaxun Yang wrote:
> >>> 2023年2月22日 14:50，Conor Dooley 写道：
> >>> On Wed, Feb 22, 2023 at 01:37:11PM +, Jia
On Wed, Feb 22, 2023 at 03:55:19PM +, Jiaxun Yang wrote:
>
>
> > 2023年2月22日 14:50，Conor Dooley 写道：
> >
> > On Wed, Feb 22, 2023 at 01:37:11PM +, Jiaxun Yang wrote:
> >> For riscv our assumption is unless a device states it is non-coherent,
&
On Wed, Feb 22, 2023 at 01:37:11PM +, Jiaxun Yang wrote:
> For riscv our assumption is unless a device states it is non-coherent,
> we take it to be DMA coherent.
>
> For devicetree probed devices that have been true since very begining
> with OF_DMA_DEFAULT_COHERENT selected.
>
> Signed-off-
On Tue, Feb 21, 2023 at 12:46:12PM +, Jiaxun Yang wrote:
> For RISCV we always assume devices are DMA coherent.
"Always assume", I'm not keen on that wording as it is unclear as to
whether you are suggesting that a) we always take devices to be DMA
coherent, or b) unless a device states it is
Hi Mike,
On Tue, Jan 31, 2023 at 08:41:49PM +0200, Mike Rapoport wrote:
> On Tue, Jan 31, 2023 at 05:47:24PM +0000, Conor Dooley wrote:
> > On Sun, Jan 29, 2023 at 02:42:35PM +0200, Mike Rapoport wrote:
> > > From: "Mike Rapoport (IBM)"
> > >
> >
Hey Mike,
On Sun, Jan 29, 2023 at 02:42:35PM +0200, Mike Rapoport wrote:
> From: "Mike Rapoport (IBM)"
>
> Every architecture that supports FLATMEM memory model defines its own
> version of pfn_valid() that essentially compares a pfn to max_mapnr.
>
> Use mips/powerpc version implemented as sta
ltera-msi: Include explicitly
> PCI: microchip: Include explicitly
> PCI: mvebu: Include explicitly
> PCI: Remove unnecessary includes
> drivers/pci/controller/pcie-microchip-host.c | 2 +-
Hey Bjorn, actually did the build this time rather than visually
inspecting... For the microchip bits:
Reviewed-by: Conor Dooley
Thanks!
On Thu, Oct 20, 2022 at 08:45:47AM -0500, Bjorn Helgaas wrote:
> [+cc Pali, heads-up for trivial addition of to
> pci-mvebu.c]
>
> On Thu, Oct 20, 2022 at 08:20:25AM +0100, Conor Dooley wrote:
> > On Thu, Oct 20, 2022 at 03:08:50PM +0800, kernel test robot wrote:
> > &g
crochip-host.c | 1 -
LGTM...
Acked-by: Conor Dooley
Hey,
Maybe I am just missing something blatantly obvious here, but trying
to build rust support in -next fails for me. I am using ClangBuiltLinux
clang version 15.0.0 5b0788fef86ed7008a11f6ee19b9d86d42b6fcfa and LLD
15.0.0. Is it just expected that building -next with rust support is
not a good id
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