On Tue, Jan 16, 2018 at 10:51 PM, Nicolin Chen wrote:
> [ Maciej, could you please send your Tested-by/Reviewed-by for AC97
> once you confirm this series?
>
> And Caleb, this version does not need a test for non-AC97 cases.
>
> Thanks both! ]
>
> ==Change log==
> v5
> * Reworked the series
d code to a separate probe()
> ASoC: fsl_ssi: Use ssi->streams instead of reading register
>
> sound/soc/fsl/fsl_ssi.c | 741
> +---
> sound/soc/fsl/fsl_ssi.h | 3 -
> 2 files changed, 379 insertions(+), 365 deletions(-)
>
> --
> 2.7.4
>
Tested v4 with 8 channel TDM at 48kHz. No problems found.
Tested-by: Caleb Crome
_fsl_ssi_set_dai_fmt()
> ASoC: fsl_ssi: Add bool synchronous to mark synchronous mode
> ASoC: fsl_ssi: Move DT related code to a separate probe()
> ASoC: fsl_ssi: Use ssi->streams instead of reading register
>
> sound/soc/fsl/fsl_ssi.c | 733
>
> sound/soc/fsl/fsl_ssi.h | 3 -
> 2 files changed, 370 insertions(+), 366 deletions(-)
>
> --
> 2.7.4
>
tested v3...
Tested-by: Caleb Crome
stead of reading register
>
> sound/soc/fsl/fsl_ssi.c | 740
>
> 1 file changed, 369 insertions(+), 371 deletions(-)
>
> --
> 2.7.4
>
Tested again, just to be sure... All looks good.
Tested-by: Caleb Crome
On Thu, Jan 4, 2018 at 11:48 AM, Nicolin Chen wrote:
> On Tue, Jan 02, 2018 at 03:28:11PM -0800, Caleb Crome wrote:
>
>> tested this patch set on MX6 SSI against broonie for-next (4.15-rc5),
>> no problems.
>> Do I send a separate Tested-by for each patch, or just the 0
sl_ssi: Move DT related code to a separate probe()
> ASoC: fsl_ssi: Use ssi->streams instead of reading register
>
> sound/soc/fsl/fsl_ssi.c | 710
>
> 1 file changed, 348 insertions(+), 362 deletions(-)
>
> --
> 2.7.4
>
tested this patch set on MX6 SSI against broonie for-next (4.15-rc5),
no problems.
Do I send a separate Tested-by for each patch, or just the 00/15 one?
Tested-by: Caleb Crome
Hi,
I just posted a little write up for helping people get started with
the Freescale SSI port in TDM mode.
https://medium.com/@caleb_22836/how-to-get-the-mx6-ssi-port-up-and-running-in-tdm-mode-dbce02a15e81
I'm just posting here in case anybody is searching the google for this
information and
On Wed, Dec 20, 2017 at 3:40 AM, Arnaud Mouiche
wrote:
>
>
> On 19/12/2017 01:25, Caleb Crome wrote:
>
>> On Mon, Dec 18, 2017 at 3:02 PM, Nicolin Chen
>> wrote:
>>
>>> On Mon, Dec 18, 2017 at 02:19:08PM -0800, Caleb Crome wrote:
>>>
On Thu, Dec 21, 2017 at 8:08 AM, Caleb Crome wrote:
On Wed, Dec 20, 2017 at 3:40 AM, Arnaud Mouiche
wrote:
>
>
>
> On 19/12/2017 01:25, Caleb Crome wrote:
>
>> On Mon, Dec 18, 2017 at 3:02 PM, Nicolin Chen wrote:
>>>
>>> On Mon, Dec 18, 2017
On Mon, Dec 18, 2017 at 3:02 PM, Nicolin Chen wrote:
> On Mon, Dec 18, 2017 at 02:19:08PM -0800, Caleb Crome wrote:
>
>> > Acked-by: Timur Tabi
>
> --- To Mark ---
>
> Mark, can you still take these changes first? Since this failed
> test that Caleb reported here
On Sun, Dec 17, 2017 at 7:13 PM, Timur Tabi wrote:
>
> On 12/17/17 8:51 PM, Nicolin Chen wrote:
>>
>> Nicolin Chen (11):
>>ASoC: fsl_ssi: Rename fsl_ssi_private to fsl_ssi
>>ASoC: fsl_ssi: Cache pdev->dev pointer
>>ASoC: fsl_ssi: Refine all comments
>>ASoC: fsl_ssi: Rename register
On Sat, Dec 16, 2017 at 9:15 AM, Timur Tabi wrote:
>
> On 12/13/17 5:18 PM, Nicolin Chen wrote:
>
>> - /* Used when using fsl-ssi as sound-card. This is only used by ppc
>> and
>> -* should be replaced with simple-sound-card. */
>> struct platform_device *pdev;
>
>
> Is this
From: Caleb Crome
The fsl_ssi fifo watermark is by default set to 2 free spaces (i.e.
activate DMA on FIFO when only 2 spaces are left.) This means the
DMA must service the fifo within 2 audio samples, which is just not
enough time for many use cases with high data rate. In many
because with simple stereo mode,
the consequence is that left and right are swapped, which isn't that
noticeable. However, it's catestrophic in some systems that
require the channels to be in the right slots.
Signed-off-by: Caleb Crome
Suggested-by: Arnaud Mouiche
---
sound/soc/fsl/fsl
On Mon, Apr 25, 2016 at 11:06 AM, Mark Brown wrote:
> On Mon, Apr 25, 2016 at 10:50:24AM -0700, Caleb Crome wrote:
>
>> Due to caching, SOR wasn't written when it should have been. This
>> patch simply adds SOR to the volatile list.
>
> Could you expand on when
Due to caching, SOR wasn't written when it should have been. This
patch simply adds SOR to the volatile list.
Signed-off-by: Caleb Crome
---
sound/soc/fsl/fsl_ssi.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c
index 216e3cb..2f
t;
> url:
> https://github.com/0day-ci/linux/commits/Caleb-Crome/ASoC-fsl_ssi-Set-watermark-and-maxburst-settings-to-eliminate-DMA-xruns-on-imx-processors/20160119-024143
> base: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
> for-next
> config: x86_64-randconfi
fifo, to start a DMA burst.
The tradeoff with this patch is that on IMX processors, the DMA will
be more reliable (not have DMA slips), epseically when running more
than 2 channels, at the expense of more DMA transactions. Interrupt
frequency is unaffected.
Signed-off-by: Caleb Crome
---
sound
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