. resetting the
Mailbox Full error bit back to zero or something else?
Regards,
Bastiaan Nijkamp
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doesn't it make
more sense to make the driver check this setting and correcting it or giving
an error instead of entering a endless loop?
Thank you for helping out, it is very much appreciated.
Bastiaan.
2010/10/13 Bounine, Alexandre
> Bastiaan Nijkamp wrote:
>
> >Has the
Nijkamp
2010/10/11 Bastiaan Nijkamp
> Hi,
>
> We have found a poorly documented jumper on our boards that force pci-mode
> to 32bit instead of 64bit. It seems to have an effect on RapidIO aswell
> since the host now completes the enumeration process including finding the
> other board
ZE: 2 Bytes)
LAWBAR08: 0x LAWAR0x08: 0x
(EN: 0 TGT: 0x00 SIZE: 2 Bytes)
LAWBAR09: 0x LAWAR0x09: 0x
(EN: 0 TGT: 0x00 SIZE: 2 Bytes)
We have removed the RapidIO TLB Entries from u-boot.
Kind regards,
Bastiaan Ni
Hi Alex,
Yes, Sorry, that was a typo. The correct address that is printed is
0xd1080068.
And i did not disable the error handler, CONFIG_E500 is set at compile time.
Regards,
Bastiaan
2010/10/5 Bounine, Alexandre
> Hi Bastiaan,
>
>
> Bastiaan Nijkamp wrote:
>
> >fsl-of
t;
> 3. How do you synchronise reset between both systems ? Both need to be
> reset to insure the inbound/outbound ackid's remain in sync. If you only
> reset one then you have the potential for the ackid's to get out of sync.
> Also what is the kernel log on the agent system ?
Hi Alex,
Thanks for your advice. We are trying to make a board-to-board connection
without any additional hardware (eg. a switch). The boards use a 50-pin,
right-angle MEC8-125-02-L-D-RA1 connector from SAMTEC and are connected
trough a EEDP-016-12.00-RA1-RA2-2 cross cable from SAMTEC. I hope this
= <0x0 0xc000 0x2000>;
interrupt-parent = <&mpic>;
/* err_irq bell_outb_irq bell_inb_irq
msg1_tx_irq msg1_rx_irq msg2_tx_irq msg2_rx_irq */
interrupts = <0x30 0x2 0x31 0x2 0x32 0x2 0x35 0x2 0x36 0x2 0x37
0x2 0x38 0
fsl_rio_config_read: Passed IS_ALIGNED.
fsl_rio_config_read: Passed 'out_be32_1'
fsl_rio_config_read: Passed 'out_be32_2'
fsl_rio_config_read: len is 4
fsl_rio_config_read: about to trigger '__fsl_read_rio_config'
Regards,
Bastiaan Nijkamp
