> On 30 May 2025, at 5:14 AM, Stephen Rothwell wrote:
>
> Hi all,
>
> On Tue, 13 May 2025 20:28:09 +1000 Stephen Rothwell
> wrote:
>>
>> After merging the powerpc tree, today's linux-next build (htmldocs)
>> produced this warning:
>>
>> Documentation/arch/powerpc/htm.rst: WARNING: documen
powerpc/htm.rst: WARNING: document isn't included in any
> toctree [toc.not_included]
>
> Fixes: ab1456c5aa7a ("powerpc/pseries/htmdump: Add documentation for H_HTM
> debugfs interface")
> Acked-by: Randy Dunlap
> Tested-by: Randy Dunlap
> Signed-off-by: Br
disabled.
Include header file explicitly to avoid the build error
Reported-by: kernel test robot
Closes:
https://lore.kernel.org/oe-kbuild-all/202505061324.elul4nju-...@intel.com/
Signed-off-by: Athira Rajeev
---
arch/powerpc/platforms/pseries/htmdump.c | 1 +
1 file changed, 1 insertion(+)
diff
> On 14 Apr 2025, at 7:08 AM, Madhavan Srinivasan wrote:
>
>
>
> On 4/7/25 5:38 PM, Venkat Rao Bagalkote wrote:
>>
>> On 07/04/25 12:10 am, Athira Rajeev wrote:
>>>
>>>> On 6 Apr 2025, at 10:04 PM, Likhitha Korrapati
>>>> wro
> On 22 Apr 2025, at 2:41 PM, James Clark wrote:
>
>
>
> On 21/04/2025 4:41 am, Athira Rajeev wrote:
>> To pick up the changes in:
>> commit acea9943271b ("vdso: Address variable shadowing in macros")
>> Addressing this perf tools build warning
> On 24 Apr 2025, at 11:43 PM, Arnaldo Carvalho de Melo wrote:
>
> On Thu, Apr 24, 2025 at 10:00:33PM +0530, Athira Rajeev wrote:
>> Headers sync up update for the patch that adds the original
>> copy of the IBS header file in arch/x86/include/asm/amd/ibs.h
>
>
.h"
And change the check-headers.sh entry to ignore this line when
comparing with the original kernel header.
Reported-by: Stephen Rothwell
Reported-by: Shrikanth Hegde
Reported-by: Venkat Rao Bagalkote
Signed-off-by: Athira Rajeev
---
tools/arch/x86/include
To pick up the changes in:
commit acea9943271b ("vdso: Address variable shadowing in macros")
Addressing this perf tools build warning:
diff -u tools/include/vdso/unaligned.h include/vdso/unaligned.h
Reported-by: Venkat Rao Bagalkote
Signed-off-by: Athira Rajeev
Under debugfs folder, "/sys/kernel/debug/powerpc/htmdump", add file
"htmflags". Currently supported flag value is to enable/disable
HTM buffer wrap. wrap is used along with "configure" to prevent
HTM buffer from wrapping. Writing 1 will set noWrap while
configur
uffer from the hcall.
Signed-off-by: Athira Rajeev
Tested-by: Venkat Rao Bagalkote
---
arch/powerpc/platforms/pseries/htmdump.c | 40
1 file changed, 40 insertions(+)
diff --git a/arch/powerpc/platforms/pseries/htmdump.c
b/arch/powerpc/platforms/pseries/htmdump.c
index dc5cdc
Documentation for HTM (Hardware Trace Macro) debugfs interface
and how it can be used to configure/control the HTM operations.
Signed-off-by: Athira Rajeev
Tested-by: Venkat Rao Bagalkote
---
Documentation/arch/powerpc/htm.rst | 104 +
1 file changed, 104 insertions
TM buffer by writing
size of HTM buffer in power of 2 to the "htmsetup" file
Signed-off-by: Athira Rajeev
Tested-by: Venkat Rao Bagalkote
---
arch/powerpc/platforms/pseries/htmdump.c | 38
1 file changed, 38 insertions(+)
diff --git a/arch/powerpc/platforms/pse
from the hcall. The 16th offset of HTM
buffer has value for the number of entries for array of processors.
Use this information to copy data to the debugfs file
Signed-off-by: Athira Rajeev
Tested-by: Venkat Rao Bagalkote
---
arch/powerpc/platforms/pseries/htmdump.c | 51
. The 16th offset of HTM
status buffer has value for the number of HTM entries in the status
buffer. Each nest htm status entry is 0x6 bytes, where as core HTM
status entry is 0x8 bytes. Calculate the number of bytes to read
based on this detail.
Signed-off-by: Athira Rajeev
Tested-by: Venkat Rao
g by
writing value "0" to this file. Any other value returns
-EINVAL.
Signed-off-by: Athira Rajeev
Tested-by: Venkat Rao Bagalkote
---
arch/powerpc/platforms/pseries/htmdump.c | 50
1 file changed, 50 insertions(+)
diff --git a/arch/powerpc/platforms/pseries/htm
via this file
by writing value "0". Any other value returns -EINVAL.
Signed-off-by: Athira Rajeev
Tested-by: Venkat Rao Bagalkote
---
arch/powerpc/platforms/pseries/htmdump.c | 56
1 file changed, 56 insertions(+)
diff --git a/arch/powerpc/platforms/pse
a separate function so that it can be reused for other
option too. Add check to disable the interface in guest environment.
Signed-off-by: Athira Rajeev
Tested-by: Venkat Rao Bagalkote
---
arch/powerpc/include/asm/plpar_wrappers.h | 18 +--
arch/powerpc/platforms/pseries/htmdu
1 and 0 to enable/disable HTM during some of the
operations, use macro (ex: HTM_ENABLE, HTM_DISABLE for 1, 0
respectively
3. In code where htm return code gives negative, add a failure
message
V1 -> V2:
V2: Venkat reported that patch 7 failed to apply on powerpc-next.
Fixed that in
> it "unsigned int" fixes the issues.
>
> After the fix:
>
> CC util/pmu-flex.o
> CC util/expr-flex.o
> LD util/perf-util-in.o
> LD perf-util-in.o
> AR libperf-util.a
> LINKperf
> GEN python/perf.cpython-312-powerpc64
the hcall. The 16th offset of HTM
buffer has value for the number of entries for array of processors.
Use this information to copy data to the debugfs file
Signed-off-by: Athira Rajeev
---
arch/powerpc/platforms/pseries/htmdump.c | 49
1 file changed, 49 insertions(+
date the 'struct perf_event's event-counter.
>
> Some minor updates to kvmppc_pmu_{add, del, read}() to remove some debug
> scaffolding code.
>
> Signed-off-by: Vaibhav Jain
Thanks Vaibhav for including the changes in V5. Changes looks good to me in
patches for perf events.
> On 20 Mar 2025, at 6:43 PM, Venkat Rao Bagalkote
> wrote:
>
> On 14/03/25 7:25 pm, Athira Rajeev wrote:
>> H_HTM (Hardware Trace Macro) hypervisor call is an HCALL to export
>> data from Hardware Trace Macro (HTM) function. The debugfs interface
>> to exp
dle
> compatible mode PVR for perf json events")
> Signed-off-by: Likhitha Korrapati
Hi Likhitha,
Thanks for the fix.
Reviewed-by: Athira Rajeev
Thanks
Athira
> ---
> tools/perf/arch/powerpc/util/header.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
TM buffer by writing
size of HTM buffer in power of 2 to the "htmsetup" file
Signed-off-by: Athira Rajeev
---
arch/powerpc/platforms/pseries/htmdump.c | 36
1 file changed, 36 insertions(+)
diff --git a/arch/powerpc/platforms/pseries/htmdump.c
b/arch/powerpc/pla
Under debugfs folder, "/sys/kernel/debug/powerpc/htmdump", add file
"htmflags". Currently supported flag value is to enable/disable
HTM buffer wrap. wrap is used along with "configure" to prevent
HTM buffer from wrapping. Writing 1 will set noWrap while
configur
Documentation for HTM (Hardware Trace Macro) debugfs interface
and how it can be used to configure/control the HTM operations.
Signed-off-by: Athira Rajeev
---
Documentation/arch/powerpc/htm.rst | 104 +
1 file changed, 104 insertions(+)
create mode 100644
from the hcall.
Signed-off-by: Athira Rajeev
---
arch/powerpc/platforms/pseries/htmdump.c | 38
1 file changed, 38 insertions(+)
diff --git a/arch/powerpc/platforms/pseries/htmdump.c
b/arch/powerpc/platforms/pseries/htmdump.c
index 45f8254fe322..f21d738ddecb 100644
---
via this file
by writing value "0". Any other value returns -EINVAL.
Signed-off-by: Athira Rajeev
---
arch/powerpc/platforms/pseries/htmdump.c | 52
1 file changed, 52 insertions(+)
diff --git a/arch/powerpc/platforms/pseries/htmdump.c
b/arch/powerpc/platfo
16th offset of HTM
status buffer has value for the number of HTM entries in the status
buffer. Each nest htm status entry is 0x6 bytes, where as core HTM
status entry is 0x8 bytes. Calculate the number of bytes to read
based on this detail.
Signed-off-by: Athira Rajeev
---
arch/powerpc/platforms/ps
g by
writing value "0" to this file. Any other value returns
-EINVAL.
Signed-off-by: Athira Rajeev
---
arch/powerpc/platforms/pseries/htmdump.c | 48
1 file changed, 48 insertions(+)
diff --git a/arch/powerpc/platforms/pseries/htmdump.c
b/arch/powerpc/platfo
a separate function so that it can be reused for other
option too.
Signed-off-by: Athira Rajeev
---
arch/powerpc/include/asm/plpar_wrappers.h | 18 +---
arch/powerpc/platforms/pseries/htmdump.c | 55 +--
2 files changed, 55 insertions(+), 18 deletions(-)
diff --git a/arch/power
start # Stop the HTM
# echo 0 > htmconfigure # Deconfigure the HTM
# cat htmstatus # Dump the status of HTM entries as data
Changelog:
V2: Venkat reported that patch 7 failed to apply on powerpc-next.
Fixed that in V2.
Athira Rajeev (9):
powerpc/pseries/htmdump: Add htm_hcall_wra
the hcall. The 16th offset of HTM
buffer has value for the number of entries for array of processors.
Use this information to copy data to the debugfs file
Signed-off-by: Athira Rajeev
---
arch/powerpc/platforms/pseries/htmdump.c | 49
1 file changed, 49 insertions(+
from the hcall.
Signed-off-by: Athira Rajeev
---
arch/powerpc/platforms/pseries/htmdump.c | 38
1 file changed, 38 insertions(+)
diff --git a/arch/powerpc/platforms/pseries/htmdump.c
b/arch/powerpc/platforms/pseries/htmdump.c
index 0b3bed738db5..3d30af0304d6 100644
---
TM buffer by writing
size of HTM buffer in power of 2 to the "htmsetup" file
Signed-off-by: Athira Rajeev
---
arch/powerpc/platforms/pseries/htmdump.c | 36
1 file changed, 36 insertions(+)
diff --git a/arch/powerpc/platforms/pseries/htmdump.c
b/arch/powerpc/pla
Documentation for HTM (Hardware Trace Macro) debugfs interface
and how it can be used to configure/control the HTM operations.
Signed-off-by: Athira Rajeev
---
Documentation/arch/powerpc/htm.rst | 104 +
1 file changed, 104 insertions(+)
create mode 100644
Under debugfs folder, "/sys/kernel/debug/powerpc/htmdump", add file
"htmflags". Currently supported flag value is to enable/disable
HTM buffer wrap. wrap is used along with "configure" to prevent
HTM buffer from wrapping. Writing 1 will set noWrap while
configur
16th offset of HTM
status buffer has value for the number of HTM entries in the status
buffer. Each nest htm status entry is 0x6 bytes, where as core HTM
status entry is 0x8 bytes. Calculate the number of bytes to read
based on this detail.
Signed-off-by: Athira Rajeev
---
arch/powerpc/platforms/ps
a separate function so that it can be reused for other
option too.
Signed-off-by: Athira Rajeev
---
arch/powerpc/include/asm/plpar_wrappers.h | 18 +---
arch/powerpc/platforms/pseries/htmdump.c | 55 +--
2 files changed, 55 insertions(+), 18 deletions(-)
diff --git a/arch/power
g by
writing value "0" to this file. Any other value returns
-EINVAL.
Signed-off-by: Athira Rajeev
---
arch/powerpc/platforms/pseries/htmdump.c | 48
1 file changed, 48 insertions(+)
diff --git a/arch/powerpc/platforms/pseries/htmdump.c
b/arch/powerpc/platfo
via this file
by writing value "0". Any other value returns -EINVAL.
Signed-off-by: Athira Rajeev
---
arch/powerpc/platforms/pseries/htmdump.c | 52
1 file changed, 52 insertions(+)
diff --git a/arch/powerpc/platforms/pseries/htmdump.c
b/arch/powerpc/platfo
start # Stop the HTM
# echo 0 > htmconfigure # Deconfigure the HTM
# cat htmstatus # Dump the status of HTM entries as data
Athira Rajeev (9):
powerpc/pseries/htmdump: Add htm_hcall_wrapper to integrate other htm
operations
powerpc/pseries/htmdump: Add htm configure support
> On 10 Mar 2025, at 12:42 PM, Vaibhav Jain wrote:
>
> Athira Rajeev writes:
>
>>> On 24 Feb 2025, at 6:45 PM, Vaibhav Jain wrote:
>>>
>>> Introduce a new PMU named 'kvm-hv' inside a new module named 'kvm-hv-pmu'
>>> to
> On 11 Mar 2025, at 3:02 PM, Vaibhav Jain wrote:
>
> Athira Rajeev writes:
>
>>> On 24 Feb 2025, at 6:45 PM, Vaibhav Jain wrote:
>>>
>>> Update 'kvm-hv-pmu.c' to add five new perf-events mapped to the five
>>> Hostwide counte
> On 24 Feb 2025, at 6:45 PM, Vaibhav Jain wrote:
>
> Update 'kvm-hv-pmu.c' to add five new perf-events mapped to the five
> Hostwide counters. Since these newly introduced perf events are at system
> wide scope and can be read from any L1-Lpar CPU, 'kvmppc_pmu' scope and
> capabilities are up
> On 24 Feb 2025, at 6:45 PM, Vaibhav Jain wrote:
>
> Introduce a new PMU named 'kvm-hv' inside a new module named 'kvm-hv-pmu'
> to report Book3s kvm-hv specific performance counters. This will expose
> KVM-HV specific performance attributes to user-space via kernel's PMU
> infrastructure and
In disasm_line__parse_powerpc() , return code from function
disasm_line__parse() is ignored. This will result in bad results
if the disasm_line__parse fails to disasm the line. Use
the return code to fix this.
Signed-off-by: Athira Rajeev
---
tools/perf/util/disasm.c | 5 +++--
1 file changed
er used.
Use this info to determine if disassembly is done while
parsing the disasm line.
Reported-by: Tejas Manhas
Signed-off-by: Athira Rajeev
---
tools/perf/util/annotate.h | 1 +
tools/perf/util/disasm.c | 22 +-
2 files changed, 14 insertions(+), 9 deletions(-)
> On 26 Feb 2025, at 6:35 PM, Masami Hiramatsu (Google)
> wrote:
>
> On Tue, 25 Feb 2025 18:00:42 +0530
> Athira Rajeev wrote:
>
>> Perf probe on vfs_fstatat fails as below on a powerpc system
>>
>> ./perf probe -nf --max-probes=512 -a 'vfs_fst
> On 27 Feb 2025, at 6:08 AM, Namhyung Kim wrote:
>
> On Tue, Feb 25, 2025 at 05:01:57PM +0530, Athira Rajeev wrote:
>> Perf trace on perf.data fails as below:
>>
>> ./perf trace record -- sleep 1
>> ./perf trace -i perf.data
>> perf: Segmentation f
> On 25 Feb 2025, at 6:00 PM, Athira Rajeev wrote:
>
> Perf probe on vfs_fstatat fails as below on a powerpc system
>
> ./perf probe -nf --max-probes=512 -a 'vfs_fstatat $params'
> Segmentation fault (core dumped)
>
> This is observed while running
the actual DW_TAG_subprogram as part of
"struct probe_finder". In copy_variables_cb(), include check to make
sure the DW_AT_abstract_origin points to the correct entry if the
dwarf_haspc() matches the instruction address.
Signed-off-by: Athira Rajeev
---
Changelog:
v1 -> v2:
Ins
lts are not initialized. Use
perf_tool__init() in perf trace to handle the initialization.
Reported-by: Tejas Manhas
Signed-off-by: Athira Rajeev
---
tools/perf/builtin-trace.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tools/perf/builtin-trace.c b/tools/perf/builtin-trace.c
index f55
> On 19 Feb 2025, at 4:06 AM, Namhyung Kim wrote:
>
> Added Masami.
>
> On Wed, Feb 12, 2025 at 06:49:49PM +0530, Athira Rajeev wrote:
>> Perf probe on vfs_fstatat fails as below on a powerpc system
>>
>> ./perf probe -nf --max-probes=512 -a 'vfs_fstata
> On 13 Feb 2025, at 9:04 AM, Namhyung Kim wrote:
>
> On Thu, Feb 13, 2025 at 12:24:38AM +0530, Athira Rajeev wrote:
>> "Tool PMU" tests fails on powerpc as below:
>>
>> 12.1: Parsing without PMU name:
>> --- start ---
>> test ch
> On 13 Feb 2025, at 9:04 AM, Namhyung Kim wrote:
>
> On Thu, Feb 13, 2025 at 12:24:38AM +0530, Athira Rajeev wrote:
>> "Tool PMU" tests fails on powerpc as below:
>>
>> 12.1: Parsing without PMU name:
>> --- start ---
>> test ch
ent, the
helper function helps to resolve the tool_pmu_event index to
its mapping event name. Update the testcase to check for null event
names before proceeding the test.
Signed-off-by: Athira Rajeev
---
tools/perf/tests/tool_pmu.c | 12
tools/perf/util/tool_pmu.c | 17 +++
the actual DW_TAG_subprogram as part of
"struct probe_finder". In copy_variables_cb(), include check to make
sure the DW_AT_abstract_origin points to the correct entry if the
dwarf_haspc() matches the instruction address.
Signed-off-by: Athira Rajeev
---
tools/perf/util/probe-finde
> On 23 Jan 2025, at 5:37 PM, Vaibhav Jain wrote:
>
> Introduce a new PMU named 'kvm-hv' to report Book3s kvm-hv specific
> performance counters. This will expose KVM-HV specific performance
> attributes to user-space via kernel's PMU infrastructure and would enable
> users to monitor active k
ster A) so that we only need to read these once on each
interrupt.
Update the isa207_get_mem_data_src function to use regs->dar instead of
reading from SPRN_SIER again. Also use regs->dsisr to read the mmcra
value
Signed-off-by: Athira Rajeev
---
arch/powerpc/perf/isa207-common.c | 14 +
reserved.
In ISA v3.1, value "7" has been used to indicate "larx/stcx".
Drop the sample if instruction type has reserved values for this
field with a ISA version check. Initialize data_src to zero in
isa207_get_mem_data_src if the instruction type is not load/store.
Rep
> On 20 Jan 2025, at 12:00 PM, Ravi Bangoria wrote:
>
> Hi Athira,
>
> On 10-Jan-25 3:16 PM, Athira Rajeev wrote:
>> In some of the powerpc platforms, event group testcase fails as below:
>>
>> # perf test -v &#x
ster A) so that we only need to read these once on each
interrupt.
Update the isa207_get_mem_data_src function to use regs->dar instead of
reading from SPRN_SIER again. Also use regs->dsisr to read the mmcra
value
Signed-off-by: Athira Rajeev
---
arch/powerpc/perf/isa207-common.c | 14 +
reserved.
In ISA v3.1, value "7" has been used to indicate "larx/stcx".
Drop the sample if instruction type has reserved values for this
field with a ISA version check. Initialize data_src to zero in
isa207_get_mem_data_src if the instruction type is not load/store.
Reported-by: D
> On 14 Jan 2025, at 3:47 AM, Namhyung Kim wrote:
>
> On Fri, Jan 10, 2025 at 03:07:30PM +0530, Athira Rajeev wrote:
>> perf lock contention returns zero exit value even if the lock contention
>> BPF setup failed.
>>
>> # ./perf lock con -b true
>>
> On 13 Jan 2025, at 8:59 PM, Arnaldo Carvalho de Melo wrote:
>
> On Mon, Jan 06, 2025 at 01:25:32PM -0800, Namhyung Kim wrote:
>> On Fri, Dec 27, 2024 at 04:18:32PM +0530, Athira Rajeev wrote:
>>>
>>>
>>>> On 23 Dec 2024, at 7:28 PM, Athira R
> On 13 Jan 2025, at 8:36 PM, Arnaldo Carvalho de Melo wrote:
>
> On Mon, Jan 13, 2025 at 11:21:24AM +0100, Veronika Molnarova wrote:
>> On 1/10/25 10:43, Athira Rajeev wrote:
>>> But if there are other probes in the system, the log will
>>> contain refe
-ma...@linux.ibm.com/
Please move the Changelog and v3 patch reference to below where it won’t come
as part of git log
>
> Signed-off-by: Abhishek Dubey
> Co-developed-by: Madhavan Srinivasan
> Signed-off-by: Madhavan Srinivasan
> —
Here we can add the changelog.
With that change,
R
platform specific bits from sampling registers.
Signed-off-by: Athira Rajeev
---
Changelog:
v1 -> v2
No code changes. Rebased to latest upstream
.../selftests/powerpc/pmu/sampling_tests/misc.c | 11 ++-
.../selftests/powerpc/pmu/sampling_tests/misc.h | 10 ++
2 fi
From: Kajol Jain
The testcase uses check_extended_regs_support and
perf_get_platform_reg_mask function to check if the
platform has extended reg support. This will help to
check if sampling pmu selftest is enabled or not for
a given platform.
Signed-off-by: Kajol Jain
Signed-off-by: Athira
auxv_generic_compat_pmu() utility function is to detect whether the
system is having generic compat PMU. The check is based on base platform
value from /proc/self/auxv. Update the comment with details on how auxv
is used to detect the platform.
Signed-off-by: Athira Rajeev
---
Changelog:
v1
bhrb filter to use
- reserved_bits_mmcra_sample_elig_mode: randome sampling
mode reserved bits is also varies based on platform
Signed-off-by: Athira Rajeev
---
Changelog:
v1 -> v2
No code changes. Rebased to latest upstream
.../pmu/event_code_tests/event_alternatives_tests_p10.c
Updated the comments in the pmu selftests to include
power11/ISA v3.1 where ever required.
Signed-off-by: Athira Rajeev
---
Changelog:
v1 -> v2
No code changes. Rebased to latest upstream
.../event_code_tests/group_constraint_l2l3_sel_test.c |
ster A) so that we only need to read these once on each
interrupt.
Update the isa207_get_mem_data_src function to use regs->dar instead of
reading from SPRN_SIER again. Also use regs->dsisr to read the mmcra
value
Reported-by: Disha Goel
Signed-off-by: Athira Rajeev
---
arch/powerpc
reserved.
In ISA v3.1, value "7" has been used to indicate "larx/stcx".
Drop the sample if instruction type has reserved values for this
field with a ISA version check. Initialize data_src to zero in
isa207_get_mem_data_src if the instruction type is not load/store.
Reported-by
ons as one of the sibling event. Since
PERF_COUNT_HW_INSTRUCTIONS is a generic hardware event and present
in all architectures, use this as third event.
Reported-by: Tejas Manhas
Signed-off-by: Athira Rajeev
---
tools/perf/tests/event_groups.c | 31 ++-
1 file cha
ther probes in the system, the log will
contain reference to other existing probe too. Hence change
usage of check_all_lines_matched.pl to check_all_patterns_found.pl
This will make sure expecting string comes in the result
Signed-off-by: Athira Rajeev
---
Changelog:
v1 -> v2:
No code changes. A
led
# echo $?
0
Fix this by saving the return code for lock_contention_prepare
so that command exits with proper return code. Similarly set the
return code properly for two other functions in builtin-lock, namely
setup_output_field() and select_key().
Signed-off-by: Athira Rajeev
---
Changelog:
v1 ->
> On 7 Jan 2025, at 2:45 AM, Namhyung Kim wrote:
>
> Hello,
>
> On Mon, Dec 23, 2024 at 07:26:55PM +0530, Athira Rajeev wrote:
>> perf lock contention returns zero exit value even if the lock contention
>> BPF setup failed.
>>
>> # ./perf lock
> On 7 Jan 2025, at 2:55 AM, Namhyung Kim wrote:
>
> On Fri, Dec 27, 2024 at 04:18:32PM +0530, Athira Rajeev wrote:
>>
>>
>>> On 23 Dec 2024, at 7:28 PM, Athira Rajeev
>>> wrote:
>>>
>>> When kernel is built without debuginfo, runn
h_stats), interface added code to use
> "down_write_trylock" call to take the dtl_access_lock. The dtl_access_lock
> is defined in dtl.h file. Also added global reference count variable called
> "dtl_global_refc", to ensure dtl data can be captured per-cpu. Code also
>
> On 23 Dec 2024, at 7:26 PM, Athira Rajeev wrote:
>
> perf lock contention returns zero exit value even if the lock contention
> BPF setup failed.
>
> # ./perf lock con -b true
> libbpf: kernel BTF is missing at '/sys/kernel/btf/vmlinux', was
> CONFIG_
> On 17 Dec 2024, at 12:27 AM, Athira Rajeev
> wrote:
>
>
>
>> On 5 Dec 2024, at 11:16 PM, Athira Rajeev
>> wrote:
>>
>>
>>
>>> On 14 Nov 2024, at 3:35 PM, Michael Petlan wrote:
>>>
>>> On Sun, 3 Nov 2024, Athi
> On 23 Dec 2024, at 7:28 PM, Athira Rajeev wrote:
>
> When kernel is built without debuginfo, running perf record with
> --off-cpu results in segfault as below:
>
> ./perf record --off-cpu -e dummy sleep 1
> libbpf: kernel BTF is missing at '/sy
f__load_vmlinux_btf fails when CONFIG_DEBUG_INFO_BTF is not enabled.
Here bpf__find_by_name_kind calls btf__type_cnt with NULL btf
value and results in segfault. To fix this, add a check to see if
btf is not NULL before invoking bpf__find_by_name_kind
Signed-off-by: Athira Rajeev
---
tools/perf/util/bpf_off_cpu.
d
# echo $?
0
Fix this by saving the return code for lock_contention_prepare
so that command exits with proper return code
Signed-off-by: Athira Rajeev
---
tools/perf/builtin-lock.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/tools/perf/builtin-lock.c b/tools/perf/
From: Kajol Jain
The testcase uses check_extended_regs_support and
perf_get_platform_reg_mask function to check if the
platform has extended reg support. This will help to
check if sampling pmu selftest is enabled or not for
a given platform.
Signed-off-by: Kajol Jain
Signed-off-by: Athira
Updated the comments in the pmu selftests to include
power11/ISA v3.1 where ever required.
Signed-off-by: Athira Rajeev
---
.../event_code_tests/group_constraint_l2l3_sel_test.c | 2 +-
.../group_constraint_radix_scope_qual_test.c | 2 +-
.../group_constraint_thresh_cmp_test.c
platform specific bits from sampling registers.
Signed-off-by: Athira Rajeev
---
.../selftests/powerpc/pmu/sampling_tests/misc.c | 11 ++-
.../selftests/powerpc/pmu/sampling_tests/misc.h | 10 ++
2 files changed, 16 insertions(+), 5 deletions(-)
diff --git a/tools/testing
bhrb filter to use
- reserved_bits_mmcra_sample_elig_mode: randome sampling
mode reserved bits is also varies based on platform
Signed-off-by: Athira Rajeev
---
.../pmu/event_code_tests/event_alternatives_tests_p10.c| 3 ++-
.../pmu/event_code_tests/generic_events_valid_test.c | 3
> On 12 Dec 2024, at 12:37 PM, Namhyung Kim wrote:
>
> On Wed, 04 Dec 2024 18:23:05 -0800, Ian Rogers wrote:
>
>> The refactoring of tool PMU events to have a PMU then adding the expr
>> literals to the tool PMU made it so that the literal system_tsc_freq
>> was only supported on x86. Update
> On 16 Dec 2024, at 10:15 PM, Arnaldo Carvalho de Melo wrote:
>
> On Mon, Dec 16, 2024 at 03:32:12PM +0530, Athira Rajeev wrote:
>>> On 11 Dec 2024, at 5:32 PM, kajoljain wrote:
>>> On 12/6/24 19:26, Athira Rajeev wrote:
>>>> Perf tools side use
> On 5 Dec 2024, at 11:16 PM, Athira Rajeev wrote:
>
>
>
>> On 14 Nov 2024, at 3:35 PM, Michael Petlan wrote:
>>
>> On Sun, 3 Nov 2024, Athira Rajeev wrote:
>>>> On 17 Oct 2024, at 3:44 PM, Michael Petlan wrote:
>>>>
>>>&g
> On 11 Dec 2024, at 5:32 PM, kajoljain wrote:
>
>
>
> On 12/6/24 19:26, Athira Rajeev wrote:
>> Perf tools side uses extended mask to display the platform
>> supported register names (with -I? option) to the user
>> and also send this mask to the kernel
for power11 to enable capturing the extended regs
as part of sample in power11.
Signed-off-by: Athira Rajeev
---
tools/perf/arch/powerpc/util/perf_regs.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/tools/perf/arch/powerpc/util/perf_regs.c
b/tools/perf/arch/powerpc/util
Use the check for
presence of dwarf with "perf check feature" and append the
hint message based on the result.
With the change:
## [ FAIL ] ## perf_probe :: test_invalid_options SUMMARY ::
11 failures found :: Some of the tests need DWARF to run
Signed-off-by: Athira Rajeev
---
Chan
> On 14 Nov 2024, at 3:35 PM, Michael Petlan wrote:
>
> On Sun, 3 Nov 2024, Athira Rajeev wrote:
>>> On 17 Oct 2024, at 3:44 PM, Michael Petlan wrote:
>>>
>>> On Mon, 14 Oct 2024, Athira Rajeev wrote:
> [...]
>>>
>>> I am wonderin
the parsing is x86 specific and only yields a non-zero value on
> Intel.
>
> Fixes: 609aa2667f67 ("perf tool_pmu: Switch to standard pmu functions and
> json descriptions")
> Reported-by: Athira Rajeev
> Closes:
> https://lore.kernel.org/linux-perf-users/2024102
> On 3 Dec 2024, at 11:46 PM, Namhyung Kim wrote:
>
> Hello,
>
> On Fri, Nov 08, 2024 at 10:50:10AM +0530, Athira Rajeev wrote:
>>
>>
>>> On 7 Nov 2024, at 7:26 PM, Leo Yan wrote:
>>>
>>> Hi Athira,
>>>
&g
> On 7 Nov 2024, at 7:26 PM, Leo Yan wrote:
>
> Hi Athira,
>
> On Wed, Nov 06, 2024 at 03:04:57PM +0530, Athira Rajeev wrote:
>
> [...]
>
>>> Hi Athira,
>>>
>>> sorry for the breakage and thank you for the detailed explanation. As
&g
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