Re: PowerPC 85xx board are caused die by Commit: 864b9e6fd76489aab422bac62162f57c52e06ed8(powerpc: Use lwarx/ldarx hint in bit locks)

2010-03-11 Thread Andrew Liu
Just validated it, this fix can make fsl_p2020ds work again. Andrew On Thu, Mar 11, 2010 at 1:39 PM, Kumar Gala wrote: > > On Mar 10, 2010, at 11:20 PM, Kumar Gala wrote: > > > > > On Mar 10, 2010, at 9:20 PM, Andrew Liu wrote: > > > >> Hi Guys: >

PowerPC 85xx board are caused die by Commit: 864b9e6fd76489aab422bac62162f57c52e06ed8(powerpc: Use lwarx/ldarx hint in bit locks)

2010-03-10 Thread Andrew Liu
Hi Guys: I have done several experiments on fsl_8548cds and fsl_p2020rdb, pinpointed the commit: 864b9e6fd76489aab422bac62162f57c52e06ed8(powerpc: Use lwarx/ldarx hint in bit locks) cause the bootup stalledd. " Filename 'fsl_8548cds/uImage'. Load address: 0x100 Loading: #

Re: [PATCH] [POWERPC] Uniformly use memstart_addr variable as the start address of physical memory in powerpc branch

2008-05-20 Thread Andrew Liu
Kumar Gala wrote: On May 20, 2008, at 8:38 PM, Andrew Liu wrote: [POWERPC]: Uniformly use memstart_addr as the start address of RAM The variable: memstart_addr whose initial value is got from dts file is used as the start address of physical memory in PowerPC ARCH, although it is used in

[PATCH] [POWERPC] Uniformly use memstart_addr variable as the start address of physical memory in powerpc branch

2008-05-20 Thread Andrew Liu
), however, in function: mmu_mapin_ram (ppc_mmu_32.c), use 0 as the start address of physical memory, so it is necessary to unify them: in mmu_mapin_ram, use memstart_addr as the start address of physical memory, instead of 0. Signed-off-by: Andrew Liu <[EMAIL PROTECTED]> --- b/arch/powe

[PATCH] Fix a potential issue in mpc52xx uart driver

2008-04-29 Thread Andrew Liu
erial driver is applied. The deadlock is avoided by releasing the lock before pushing a buffer and reacquiring it when completed. Signed-off-by: Andrew Liu <[EMAIL PROTECTED]> diff --git a/drivers/serial/mpc52xx_uart.c b/drivers/serial/mpc52xx_uart.c index d93b357..5f95e53 100644 --- a/drivers/

Re: AMCC yosemite 440ep PCI slot doesn't work.

2007-09-24 Thread Andrew Liu
t;> On Monday 24 September 2007, Andrew Liu wrote: >>> By default, it is IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE >> >> And that should be correct for PCI interrupts. >> >>> I change it to IRQ_SENSE_EDGE | IRQ_POLARITY_NEGATIVE or >>> IRQ_SENSE_EDGE | IRQ_

Re: AMCC yosemite 440ep PCI slot doesn't work.

2007-09-24 Thread Andrew Liu
oduce 100,000 interrupt request (25: 10 UIC0 Level eth2). BRs, Andrew. Stefan Roese wrote: > On Monday 24 September 2007, Andrew Liu wrote: > >> By default, it is IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE >> > > And that should be correct for PCI interrup

Re: AMCC yosemite 440ep PCI slot doesn't work.

2007-09-24 Thread Andrew Liu
1 Edge MAL TX DE 34: 0 UIC1 Edge MAL RX DE 40: 32 UIC1 Edge ohci_hcd:usb1 60: 0 UIC1 Edge EMAC BAD: 0 Can PCI slot use level trigger? give me some advice. Thanks. Valentine Barshak wrote: > Andrew Liu wrote: >> Hello All, >

AMCC yosemite 440ep PCI slot doesn't work.

2007-09-21 Thread Andrew Liu
Hello All, when insert a RealTek RTL8139 network card into PCI slot, After system boot up, [EMAIL PROTECTED]:/root> ifconfig eth2 192.168.17.12 irq 25: nobody cared (try booting with the "irqpoll" option) Call Trace: [cf135af0] [c0008820] show_stack+0x48/0x190 (unreliable) [cf135b20] [c003c414]