Hello Petr,
On 08/08/24 16:54, Petr Tesařík wrote:
Hi Sourabh,
sorry for late reply, was on vacation and then catching up...
On Mon, 5 Aug 2024 10:38:29 +0530
Sourabh Jain wrote:
Commit 79365026f869 ("crash: add a new kexec flag for hotplug support")
generalizes the crash hotplug support t
On 8/9/24 10:24 AM, Christophe Leroy wrote:
Le 09/08/2024 à 06:25, Madhavan Srinivasan a écrit :
On 8/6/24 12:24 PM, Christophe Leroy wrote:
Le 05/08/2024 à 10:30, Madhavan Srinivasan a écrit :
Currently exec-target.c file is linked as static and this
post a requirement to install libc
Le 09/08/2024 à 06:25, Madhavan Srinivasan a écrit :
On 8/6/24 12:24 PM, Christophe Leroy wrote:
Le 05/08/2024 à 10:30, Madhavan Srinivasan a écrit :
Currently exec-target.c file is linked as static and this
post a requirement to install libc dev package to build.
Without it, build-breaks
On 8/6/24 12:24 PM, Christophe Leroy wrote:
Le 05/08/2024 à 10:30, Madhavan Srinivasan a écrit :
Currently exec-target.c file is linked as static and this
post a requirement to install libc dev package to build.
Without it, build-breaks when compiling selftest/powerpc/benchmark.
CC
On 08/05/24 at 10:38am, Sourabh Jain wrote:
> Commit 79365026f869 ("crash: add a new kexec flag for hotplug support")
> generalizes the crash hotplug support to allow architectures to update
> multiple kexec segments on CPU/Memory hotplug and not just elfcorehdr.
> Therefore, update the relevant ke
On Thu, Aug 8, 2024 at 12:08 PM Matthew W Carlis wrote:
>
> On Wed, 7 Aug 2024 22:29:35 +1000 Oliver O'Halloran Wrote
> > My read was that Matt is essentially doing a surprise hot-unplug by
> > removing power to the card without notifying the OS. I thought the
> > LBMS bit wouldn't be set in that
On Thu, Aug 08, 2024, Peter Xu wrote:
> On Thu, Aug 08, 2024 at 02:31:19PM -0700, Sean Christopherson wrote:
> > On Thu, Aug 08, 2024, Peter Xu wrote:
> > > Hi, Sean,
> > >
> > > On Thu, Aug 08, 2024 at 08:33:59AM -0700, Sean Christopherson wrote:
> > > > On Wed, Aug 07, 2024, Peter Xu wrote:
> >
Commit 1e6b251ce175 ("crypto: nx - Avoid -Wflex-array-member-not-at-end
warning") introduced tagged `struct nx842_crypto_header_hdr`. We want
to ensure that when new members need to be added to the flexible
structure, they are always included within this tagged struct.
So, we use `static_assert()`
On Thu, Aug 08, 2024 at 02:31:19PM -0700, Sean Christopherson wrote:
> On Thu, Aug 08, 2024, Peter Xu wrote:
> > Hi, Sean,
> >
> > On Thu, Aug 08, 2024 at 08:33:59AM -0700, Sean Christopherson wrote:
> > > On Wed, Aug 07, 2024, Peter Xu wrote:
> > > > mprotect() does mmu notifiers in PMD levels.
On Thu, Aug 08, 2024, Peter Xu wrote:
> Hi, Sean,
>
> On Thu, Aug 08, 2024 at 08:33:59AM -0700, Sean Christopherson wrote:
> > On Wed, Aug 07, 2024, Peter Xu wrote:
> > > mprotect() does mmu notifiers in PMD levels. It's there since 2014 of
> > > commit a5338093bfb4 ("mm: move mmu notifier call f
Hi, Sean,
On Thu, Aug 08, 2024 at 08:33:59AM -0700, Sean Christopherson wrote:
> On Wed, Aug 07, 2024, Peter Xu wrote:
> > mprotect() does mmu notifiers in PMD levels. It's there since 2014 of
> > commit a5338093bfb4 ("mm: move mmu notifier call from change_protection to
> > change_pmd_range").
>
Restores caller's toc pointer to r2, on a sibling call this will
uncorrupt the caller's toc pointer and otherwise will be redundant
Signed-off-by: Ryan Sullivan
---
arch/powerpc/kernel/trace/ftrace_entry.S | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/powerpc/kernel/trace/ftrace_en
+void arch_check_zapped_pud(struct vm_area_struct *vma, pud_t pud)
+{
+ /* See note in arch_check_zapped_pte() */
+ VM_WARN_ON_ONCE(!(vma->vm_flags & VM_SHADOW_STACK) &&
+ pud_shstk(pud));
Please get rid of the line break. You have 100 characters.
Coding-style
On Thu, Aug 08, 2024 at 12:37:21AM +0200, Thomas Gleixner wrote:
> On Wed, Aug 07 2024 at 15:48, Peter Xu wrote:
> > These new helpers will be needed for pud entry updates soon. Introduce
> > these helpers by referencing the pmd ones. Namely:
> >
> > - pudp_invalidate()
> > - pud_modify()
>
> Ze
On Thu, Aug 8, 2024 at 11:46 AM Liam R. Howlett wrote:
>
> * Jeff Xu [240808 14:37]:
> > On Thu, Aug 8, 2024 at 11:08 AM Liam R. Howlett
> > wrote:
> > >
> > > * Jeff Xu [240807 23:37]:
> > > > On Wed, Aug 7, 2024 at 8:21 PM Linus Torvalds
> > > > wrote:
> > > > >
> > > > > On Wed, 7 Aug 2024
* Jeff Xu [240808 14:37]:
> On Thu, Aug 8, 2024 at 11:08 AM Liam R. Howlett
> wrote:
> >
> > * Jeff Xu [240807 23:37]:
> > > On Wed, Aug 7, 2024 at 8:21 PM Linus Torvalds
> > > wrote:
> > > >
> > > > On Wed, 7 Aug 2024 at 16:20, Liam R. Howlett
> > > > wrote:
> > > > >
> > > > > Okay, I'm go
Hello,
On Thu, Aug 08, 2024 at 12:14:12PM +0530, Athira Rajeev wrote:
>
>
> > On 7 Aug 2024, at 11:42 PM, Namhyung Kim wrote:
> >
> > Hello folks,
> >
> > On Tue, Aug 06, 2024 at 03:50:03PM -0700, Namhyung Kim wrote:
> >> Hello,
> >>
> >> This is the usual sync up in header files we keep in
On Thu, Aug 8, 2024 at 11:08 AM Liam R. Howlett wrote:
>
> * Jeff Xu [240807 23:37]:
> > On Wed, Aug 7, 2024 at 8:21 PM Linus Torvalds
> > wrote:
> > >
> > > On Wed, 7 Aug 2024 at 16:20, Liam R. Howlett
> > > wrote:
> > > >
> > > > Okay, I'm going to try one more time here. You are suggesting
* Jeff Xu [240807 23:37]:
> On Wed, Aug 7, 2024 at 8:21 PM Linus Torvalds
> wrote:
> >
> > On Wed, 7 Aug 2024 at 16:20, Liam R. Howlett
> > wrote:
> > >
> > > Okay, I'm going to try one more time here. You are suggesting to have a
> > > conf flag to leave the vdso pointer unchanged when it is
Restores caller's toc pointer to r2, on a sibling call this will
uncorrupt the caller's toc pointer and otherwise will be redundant
Signed-off-by: Ryan Sullivan
---
arch/powerpc/kernel/trace/ftrace_entry.S | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/powerpc/kernel/trace/ftrace_en
Hi,
I recently enabled several security module options in my test system.
CONFIG_SECURITY=y
CONFIG_SECURITY_APPARMOR=y
CONFIG_SECURITY_APPARMOR_KUNIT_TEST=y
CONFIG_SECURITY_LANDLOCK=y
CONFIG_SECURITY_LANDLOCK_KUNIT_TEST=y
CONFIG_SECURITY_LOCKDOWN_LSM=y
CONFIG_SECURITY_LOCKDOWN_LSM_EARLY=y
CONFIG_
* Linus Torvalds [240807 23:21]:
> On Wed, 7 Aug 2024 at 16:20, Liam R. Howlett wrote:
> >
...
>
> That said, I don't love how special powerpc is here.
I think more (all?) archs should be doing something like ppc when the
vdso is removed. If someone removes the vdso, then the speed up
provid
Sean Christopherson writes:
> On Thu, Aug 08, 2024, Alex Bennée wrote:
>> Sean Christopherson writes:
>>
>> > On Thu, Aug 08, 2024, Alex Bennée wrote:
>> >> Sean Christopherson writes:
>> >>
>> >> > Now that hva_to_pfn() no longer supports being called in atomic context,
>> >> > move the migh
On 08. 08. 24 14:19, Pierre-Louis Bossart wrote:
files changed, 10 insertions(+), 1 deletion(-)
diff --git a/include/uapi/sound/compress_offload.h b/include/uapi/
sound/compress_offload.h
index 98772b0cbcb7..8b2b72f94e26 100644
--- a/include/uapi/sound/compress_offload.h
+++ b/include/uapi/so
On Thu, Aug 08, 2024 at 12:28:47AM +0200, Thomas Gleixner wrote:
> On Wed, Aug 07 2024 at 15:48, Peter Xu wrote:
>
> > Subject: mm/x86: arch_check_zapped_pud()
>
> Is not a proper subject line. It clearly lacks a verb.
>
> Subject: mm/x86: Implement arch_check_zapped_pud()
>
>
> > Introduce
On Wed, Aug 07, 2024, Peter Xu wrote:
> mprotect() does mmu notifiers in PMD levels. It's there since 2014 of
> commit a5338093bfb4 ("mm: move mmu notifier call from change_protection to
> change_pmd_range").
>
> At that time, the issue was that NUMA balancing can be applied on a huge
> range of
On Thu, Aug 08, 2024, Alex Bennée wrote:
> Sean Christopherson writes:
>
> > On Thu, Aug 08, 2024, Alex Bennée wrote:
> >> Sean Christopherson writes:
> >>
> >> > Now that hva_to_pfn() no longer supports being called in atomic context,
> >> > move the might_sleep() annotation from hva_to_pfn_sl
On 8/8/24 02:36, Christophe Leroy wrote:
Le 07/08/2024 à 16:51, Guenter Roeck a écrit :
On 8/7/24 03:11, Christophe Leroy wrote:
Hi,
Le 31/07/2024 à 18:35, Guenter Roeck a écrit :
On 7/31/24 08:36, LEROY Christophe wrote:
Hi Guenter,
Thanks for this report. I'm afk this week, i"ll have a
On 8/8/24 02:32, Christophe Leroy wrote:
Commit 6b0e82791bd0 ("powerpc/e500: switch to 64 bits PGD on 85xx
(32 bits)") increased the size of PGD entries but failed to increase
the PGD directory.
Use the size of pgd_t instead of the size of pointers to calculate
the allocated size.
Reported-by:
Sean Christopherson writes:
> On Thu, Aug 08, 2024, Alex Bennée wrote:
>> Sean Christopherson writes:
>>
>> > Now that hva_to_pfn() no longer supports being called in atomic context,
>> > move the might_sleep() annotation from hva_to_pfn_slow() to
>> > hva_to_pfn().
>>
>> The commentary for hv
On Thu, Aug 08, 2024 at 12:22:38AM +0200, Thomas Gleixner wrote:
> On Wed, Aug 07 2024 at 15:48, Peter Xu wrote:
> > An entry should be reported as PUD leaf even if it's PROT_NONE, in which
> > case PRESENT bit isn't there. I hit bad pud without this when testing dax
> > 1G on zapping a PROT_NONE P
On Wed, Aug 07, 2024 at 02:44:54PM -0700, Andrew Morton wrote:
> On Wed, 7 Aug 2024 17:34:10 -0400 Peter Xu wrote:
>
> > The problem is mprotect() will skip the dax 1G PUD while it shouldn't;
> > meanwhile it'll dump some bad PUD in dmesg. Both of them look like (corner
> > case) bugs to me.. wh
On Thu, Aug 08, 2024 at 11:35:01AM +0200, Petr Tesařík wrote:
> On Wed, 7 Aug 2024 19:14:58 +0100
> Catalin Marinas wrote:
> > With ZONE_DMA32, since all the DMA code assumes that ZONE_DMA32 ends at
> > 4GB CPU address, it doesn't really work for such platforms. If there are
> > 32-bit devices wit
On Thu, Aug 08, 2024, Alex Bennée wrote:
> Sean Christopherson writes:
>
> > Now that hva_to_pfn() no longer supports being called in atomic context,
> > move the might_sleep() annotation from hva_to_pfn_slow() to
> > hva_to_pfn().
>
> The commentary for hva_to_pfn_fast disagrees.
>
> /*
>
files changed, 10 insertions(+), 1 deletion(-)
>
> diff --git a/include/uapi/sound/compress_offload.h b/include/uapi/
> sound/compress_offload.h
> index 98772b0cbcb7..8b2b72f94e26 100644
> --- a/include/uapi/sound/compress_offload.h
> +++ b/include/uapi/sound/compress_offlo
On 08. 08. 24 13:27, Pierre-Louis Bossart wrote:
On 8/8/24 11:17, Shengjiu Wang wrote:
On Tue, Aug 6, 2024 at 7:25 PM Pierre-Louis Bossart
wrote:
On 8/6/24 12:26, Shengjiu Wang wrote:
Add Sample Rate Converter(SRC) codec support, define the output
format and rate for SRC.
Signed-off-by:
Sean Christopherson writes:
> Now that hva_to_pfn() no longer supports being called in atomic context,
> move the might_sleep() annotation from hva_to_pfn_slow() to
> hva_to_pfn().
The commentary for hva_to_pfn_fast disagrees.
/*
* The fast path to get the writable pfn which will be stored
On 2024/7/27 上午7:52, Sean Christopherson wrote:
Mark pages accessed before dropping mmu_lock when faulting in guest memory
so that LoongArch can convert to kvm_release_faultin_page() without
tripping its lockdep assertion on mmu_lock being held.
Signed-off-by: Sean Christopherson
---
arch/
On 2024/7/27 上午7:52, Sean Christopherson wrote:
Mark pages/folios dirty only the slow page fault path, i.e. only when
mmu_lock is held and the operation is mmu_notifier-protected, as marking a
page/folio dirty after it has been written back can make some filesystems
unhappy (backing KVM guests
On 8/8/24 11:17, Shengjiu Wang wrote:
> On Tue, Aug 6, 2024 at 7:25 PM Pierre-Louis Bossart
> wrote:
>>
>>
>>
>> On 8/6/24 12:26, Shengjiu Wang wrote:
>>> Add Sample Rate Converter(SRC) codec support, define the output
>>> format and rate for SRC.
>>>
>>> Signed-off-by: Shengjiu Wang
>>> ---
>
Hi Sourabh,
sorry for late reply, was on vacation and then catching up...
On Mon, 5 Aug 2024 10:38:29 +0530
Sourabh Jain wrote:
> Commit 79365026f869 ("crash: add a new kexec flag for hotplug support")
> generalizes the crash hotplug support to allow architectures to update
> multiple kexec se
gcc-13.2.0
arc allnoconfig gcc-13.2.0
arc allyesconfig gcc-13.2.0
arc axs101_defconfig gcc-13.2.0
arc defconfig gcc-13.2.0
arc randconfig-001-20240808 gcc
On 2024-08-08 10:35 am, Petr Tesařík wrote:
On Wed, 7 Aug 2024 19:14:58 +0100
Catalin Marinas wrote:
On Wed, Aug 07, 2024 at 04:19:38PM +0200, Petr Tesařík wrote:
On Fri, 2 Aug 2024 10:37:38 +0100
Catalin Marinas wrote:
On Fri, Aug 02, 2024 at 09:03:47AM +0300, Baruch Siach wrote:
diff --g
On 07/08/2024 17:21, Catalin Marinas wrote:
> On Fri, Jul 26, 2024 at 04:51:11PM -0700, Sean Christopherson wrote:
>> Disallow copying MTE tags to guest memory while KVM is dirty logging, as
>> writing guest memory without marking the gfn as dirty in the memslot could
>> result in userspace failing
On 07/08/2024 15:15, Catalin Marinas wrote:
> On Fri, Jul 26, 2024 at 04:51:10PM -0700, Sean Christopherson wrote:
>> Put the page reference acquired by gfn_to_pfn_prot() if
>> kvm_vm_ioctl_mte_copy_tags() runs into ZONE_DEVICE memory. KVM's less-
>> than-stellar heuristics for dealing with pfn-ma
Le 07/08/2024 à 16:51, Guenter Roeck a écrit :
On 8/7/24 03:11, Christophe Leroy wrote:
Hi,
Le 31/07/2024 à 18:35, Guenter Roeck a écrit :
On 7/31/24 08:36, LEROY Christophe wrote:
Hi Guenter,
Thanks for this report. I'm afk this week, i"ll have a look at it in
more détails next week.
Bu
On Wed, 7 Aug 2024 19:14:58 +0100
Catalin Marinas wrote:
> On Wed, Aug 07, 2024 at 04:19:38PM +0200, Petr Tesařík wrote:
> > On Fri, 2 Aug 2024 10:37:38 +0100
> > Catalin Marinas wrote:
> > > On Fri, Aug 02, 2024 at 09:03:47AM +0300, Baruch Siach wrote:
> > > > diff --git a/kernel/dma/direct
Commit 6b0e82791bd0 ("powerpc/e500: switch to 64 bits PGD on 85xx
(32 bits)") increased the size of PGD entries but failed to increase
the PGD directory.
Use the size of pgd_t instead of the size of pointers to calculate
the allocated size.
Reported-by: Guenter Roeck
Fixes: 6b0e82791bd0 ("powerp
On Tue, Aug 6, 2024 at 7:25 PM Pierre-Louis Bossart
wrote:
>
>
>
> On 8/6/24 12:26, Shengjiu Wang wrote:
> > Add Sample Rate Converter(SRC) codec support, define the output
> > format and rate for SRC.
> >
> > Signed-off-by: Shengjiu Wang
> > ---
> > include/uapi/sound/compress_offload.h | 2 ++
The PUSHSCHED command is missing in the QE header file.
This command is supported on MPC8321 and is used to modify the start
address for the task running on a given peripheral. It is needed for the
QMC in order to perform the re-initialization procedure and so, ensure
the correct UCC setup in that
Introduce devm_cpm_muram_alloc() and devm_cpm_muram_alloc_fixed(), the
resource-managed version of cpm_muram_alloc and cpm_muram_alloc_fixed().
These resource-managed versions simplify the user avoiding the need to
call cpm_muram_free(). Indeed, the allocated area returned by these
functions will
The Freescale QMC controller driver supports both QE and CPM1.
Add the newly introduced QE files to the existing entry.
Signed-off-by: Herve Codina
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 1d32d38f2247..1331bdeb7386 100644
--- a/MAINTAI
Current code handles the CPM1 version of QMC and initialize the QMC used
SCC. The QUICC Engine (QE) version uses an UCC (Unified Communication
Controllers) instead of the SCC (Serial Communication Controllers) used
in the CPM1 version. These controllers serve the same purpose and are
used in the sa
The QUICC Engine (QE) QMC can use a firmware to have the QMC working in
'soft-qmc' mode.
Handle this optional 'soft-qmc' firmware.
Signed-off-by: Herve Codina
---
drivers/soc/fsl/qe/qmc.c | 67
1 file changed, 67 insertions(+)
diff --git a/drivers/soc/f
Add support for the QMC (QUICC Multichannel Controller) available in
some PowerQUICC SoC that uses a QUICC Engine (QE) block such as MPC8321.
This QE QMC is similar to the CPM QMC except that it uses UCCs (Unified
Communication Controllers) instead of SCCs (Serial Communication
Controllers). Also,
Add support for the QMC (QUICC Multichannel Controller) available in
some PowerQUICC SoC that uses a QUICC Engine (QE) block such as MPC8321.
This QE QMC is similar to the CPM QMC except that it uses UCCs (Unified
Communication Controllers) instead of SCCs (Serial Communication
Controllers). Also,
Current code handles the CPM1 version of QMC.
In order to prepare the support for the QUICC Engine (QE) version of
QMC, introduce qmc_version to identify versions. This will enable the
code to make the distinction between several QMC implementations.
Signed-off-by: Herve Codina
---
drivers/soc/
Current code handles CPM1 version of QMC. Even if GSMRL is specific to
the CPM1 version, the exact same purpose and format register (GUMRL) is
present in the QUICC Engine (QE) version of QMC. Compared to the QE
version, the values defined for the mode bitfield are different and the
0x0A value defin
Current code handles the CPM1 version of QMC, RPACK does not need to
be initialized. This is not the case in the QUICC Engine (QE) version.
In preparation of the support for QE, initialize the RPACK register
when the receiver is initialized and each time it is restarted.
This additional RPACK ini
Current code handles CPM1 version of QMC and qmc_chan_command() is
clearly CPM1 specific.
In order to prepare the support for the QUICC Engine (QE) version,
rename qmc_chan_command() to reflect that point.
Signed-off-by: Herve Codina
---
drivers/soc/fsl/qe/qmc.c | 6 +++---
1 file changed, 3 in
Current code handles the CPM1 version of QMC. Resources initialisations
(i.e. retrieving base addresses and offsets of different parts) will
be slightly different in the QUICC Engine (QE) version. Indeed, in QE
version, some resources need to be allocated and are no more "staticaly"
defined.
In or
Current code handles CPM1 version of QMC. In the QUICC Engine (QE)
version, some operations done at probe() need to be done in a different
order.
In order to prepare the support for the QE version, changed the sequence
of operation done at probe():
- Retrieve the tsa_serial earlier, before initial
Current code handles CPM1 version of QMC. Some hardcoded values are used
several times to initialize the QMC state machine. In the QUICC Engine
(QE) version of QMC, these values are different.
In order to prepare the support for the QE version of QMC and avoid the
copy of the hardcoded values, int
checkpatch.pl raises the following issue
CHECK: spinlock_t definition without comment
Add the missing comments.
Signed-off-by: Herve Codina
---
drivers/soc/fsl/qe/qmc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/soc/fsl/qe/qmc.c b/drivers/soc/fsl/qe/qmc.c
checkpatch.pl raises the following issue
CHECK: 'transmiter' may be misspelled - perhaps 'transmitter'?
Indeed, fix it.
Signed-off-by: Herve Codina
---
drivers/soc/fsl/qe/qmc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/soc/fsl/qe/qmc.c b/drivers/soc/fsl/q
checkpatch.pl raises the following issue in several places
CHECK: Unnecessary parenthesis around ...
Remove them.
Signed-off-by: Herve Codina
---
drivers/soc/fsl/qe/qmc.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/soc/fsl/qe/qmc.c b/drivers/soc/fsl/qe/
checkpatch.pl raises the following issues
CHECK: Please don't use multiple blank lines
CHECK: Alignment should match open parenthesis
Fix them.
Signed-off-by: Herve Codina
---
drivers/soc/fsl/qe/qmc.c | 10 --
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/drivers/soc
checkpatch.pl signals the following improvement for qmc.c
CHECK: Prefer using the BIT macro
Follow its suggestion and convert the code to BIT() and related macros.
Signed-off-by: Herve Codina
---
drivers/soc/fsl/qe/qmc.c | 132 +--
1 file changed, 72 insert
QMC_TSA_MASK is a bitfield. The value defined is a specific value of
this bitfield and correspond to the use of 8bit resolution for the
routing entry.
Be accurate and rename the defined constant to reflect this point.
Signed-off-by: Herve Codina
---
drivers/soc/fsl/qe/qmc.c | 8
1 file
TSA consumers in CPM1 implementation don't need to know about the serial
device number used by the TSA component. In QUICC Engine implementation,
this information is needed.
Improve the TSA API with tsa_serial_get_num() in order to provide this
information.
Signed-off-by: Herve Codina
---
drive
The Freescale TSA controller driver supports both QE and CPM1.
Add the newly introduced QE files to the existing entry.
Signed-off-by: Herve Codina
---
MAINTAINERS | 2 ++
1 file changed, 2 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 42decde38320..1d32d38f2247 100644
--- a/MAINT
Add support for the time slot assigner (TSA) available in some
PowerQUICC SoC that uses a QUICC Engine (QE) block such as MPC8321.
The QE TSA is similar to the CPM1 TSA except that it uses UCCs (Unified
Communication Controllers) instead of SCCs (Serial Communication
Controllers).
Also, compared a
Current code handles CPM1 version of TSA.
In order to prepare the support for the QUICC Engine (QE) version of
TSA, introduce tsa_version to identify versions. This will enable the
code to make the distinction between several TSA implementations.
Signed-off-by: Herve Codina
---
drivers/soc/fsl/
Current code handles the CPM1 version of TSA. Connecting and
disconnecting the SCC to/from the TSA consists in handling SICR register
which is CPM1 specific. The connection and disconnection operation in
the QUICC Engine (QE) version are slightly different.
In order to prepare the support for the
Current code handles the CPM1 version of TSA. Setting up TSA consists in
handling SIMODE and SIGMR registers. These registers are CPM1 specific.
Setting up the QUICC Engine (QE) version of TSA is slightly different.
In order to prepare the support for QE version, clearly identify these
registers
Current code handles the CPM1 version of TSA. Compared against QUICC
Engine (QE) version of TSA, CPM1 SIRAM entries are slightly different.
In order to prepare the support for the QE version, clearly identify
these entries and functions handling them as CPM1 compatible.
Signed-off-by: Herve Codin
Hi,
This series add support for the QUICC Engine (QE) version of TSA and QMC
components.
CPM1 version is already supported and, as the QE version of those
component are pretty similar to the CPM1 version, the series extend
the already existing drivers to support for the QE version.
The TSA and Q
The TRNSYNC feature is enabled whatever the number of time-slots used.
The feature is needed only when more than one time-slot is used.
Improve the driver enabling TRNSYNC only when it is needed.
Signed-off-by: Herve Codina
---
drivers/soc/fsl/qe/qmc.c | 12 +++-
1 file changed, 11 inse
checkpatch.pl raises the following issue
CHECK: spinlock_t definition without comment
Add the missing comment.
Signed-off-by: Herve Codina
---
drivers/soc/fsl/qe/tsa.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/soc/fsl/qe/tsa.c b/drivers/soc/fsl/qe/tsa.c
index
SISTR, SICMR and SIRP registers offset definitions are not used.
In order to avoid unneeded code, remove them.
Signed-off-by: Herve Codina
---
drivers/soc/fsl/qe/tsa.c | 9 -
1 file changed, 9 deletions(-)
diff --git a/drivers/soc/fsl/qe/tsa.c b/drivers/soc/fsl/qe/tsa.c
index a9d35b444
The tsa_write8() parameter is an u32 value. This is not consistent with
the function itself. Indeed, tsa_write8() writes an 8bits value.
Be consistent and use an u8 parameter value.
Fixes: 1d4ba0b81c1c ("soc: fsl: cpm1: Add support for TSA")
Cc: sta...@vger.kernel.org
Signed-off-by: Herve Codina
checkpatch.pl raises the following issues
CHECK: Please don't use multiple blank lines
CHECK: spaces preferred around that '/' (ctx:VxV)
CHECK: spaces preferred around that '+' (ctx:VxV)
CHECK: spaces preferred around that '-' (ctx:VxV)
Fix them.
Signed-off-by: Herve Codina
---
drivers/
Loops handling the tdm array use hardcoded size and the initialization
part uses hardcoded indexes to initialize the array.
Use ARRAY_SIZE() to avoid the hardcoded size and initialize the array
using a loop.
Signed-off-by: Herve Codina
---
drivers/soc/fsl/qe/tsa.c | 8
1 file changed,
Add support for the time slot assigner (TSA) available in some
PowerQUICC SoC that uses a QUICC Engine (QE) block such as MPC8321.
This QE TSA is similar to the CPM TSA except that it uses UCCs (Unified
Communication Controllers) instead of SCCs (Serial Communication
Controllers). Also, compared a
The TRNSYNC feature is available (and enabled) only in transparent mode.
Since commit 7cc9bda9c163 ("soc: fsl: cpm1: qmc: Handle timeslot entries
at channel start() and stop()") TRNSYNC register is updated in
transparent and hdlc mode. In hdlc mode, the address of the TRNSYNC
register is used by t
checkpatch.pl signals the following improvement for tsa.c
CHECK: Prefer using the BIT macro
Follow its suggestion and convert the code to BIT() and related macros.
Signed-off-by: Herve Codina
---
drivers/soc/fsl/qe/tsa.c | 127 +--
1 file changed, 68 insert
Booting with CONFIG_DEBUG_VIRTUAL leads to following warning when
passing hugepage reservation on command line:
Kernel command line: hugepagesz=1g hugepages=1 hugepagesz=64m hugepages=1
hugepagesz=256m hugepages=1 noreboot
HugeTLB: allocating 1 of page size 1.00 GiB failed. Only allocated 0
Le 24/07/2024 à 20:33, Ryan Sullivan a écrit :
[Vous ne recevez pas souvent de courriers de rysul...@redhat.com. Découvrez
pourquoi ceci est important à https://aka.ms/LearnAboutSenderIdentification ]
Currently, on PowerPC machines, sibling calls in livepatched functions
cause the stack to b
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