Gautam Menghani writes:
> When a KVM guest tries to use a feature disabled by HFSCR, it exits to
> the host for emulation support, and the code checks for all bits which
> are emulated. Avoid checking all the bits by using a switch case.
The patch looks fine, but I don't know what you mean by "av
On 7/15/24 11:55, Rob Herring wrote:
On Mon, Jul 15, 2024 at 2:08 AM Amit Machhiwal wrote:
With CONFIG_PCI_DYNAMIC_OF_NODES [1], a hot-plug and hot-unplug sequence
of a PCI device attached to a PCI-bridge causes following kernel Oops on
a pseries KVM guest:
RTAS: event: 2, Type: Hotplug Ev
On 6/21/24 11:32 AM, Uladzislau Rezki wrote:
> On Wed, Jun 19, 2024 at 11:28:13AM +0200, Vlastimil Babka wrote:
> One question. Maybe it is already late but it is better to ask rather than
> not.
>
> What do you think if we have a small discussion about it on the LPC 2024 as a
> topic? It might b
On 7/15/24 10:23, Bjorn Helgaas wrote:
On Mon, Jul 15, 2024 at 09:20:01AM -0700, Lizhi Hou wrote:
On 7/15/24 01:07, Amit Machhiwal wrote:
With CONFIG_PCI_DYNAMIC_OF_NODES [1], a hot-plug and hot-unplug sequence
of a PCI device attached to a PCI-bridge causes following kernel Oops on
a pseries
On Fri, May 03, 2024 at 02:01:28PM +0100, Joey Gouly wrote:
> This takes the last bit of HWCAP2, is this fine? What can we do about
> more features in the future?
HWCAP3 has already been allocated so we could just start using that.
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On Thu, Jun 13, 2024 at 10:36 PM Zheng Yejian wrote:
>
> Array 'table' is used to store pointers of symbols that read from in.map
> file, and its size depends on the number of symbols. Currently 'table'
> is expanded by calling realloc() every 1 symbols read.
>
> However, there generally are a
On Mon, Jul 15, 2024 at 03:21:34PM -0400, Peter Xu wrote:
> [Based on mm-unstable, commit 31334cf98dbd, July 2nd]
I forgot to update here in the cover letter; it's actually based on the
lastest.. Which is 79ae458094ff, as of today (July 15th).
--
Peter Xu
On 7/1/2024 1:33 AM, Viresh Kumar wrote:
> On 14-06-24, 23:08, Jeff Johnson wrote:
>> With ARCH=powerpc, make allmodconfig && make W=1 C=1 reports:
>> WARNING: modpost: missing MODULE_DESCRIPTION() in
>> drivers/cpufreq/ppc-cbe-cpufreq.o
>> WARNING: modpost: missing MODULE_DESCRIPTION() in
>> dri
This is only relevant to the two archs that support PUD dax, aka, x86_64
and ppc64. PUD THPs do not yet exist elsewhere, and hugetlb PUDs do not
count in this case.
DAX have had PUD mappings for years, but change protection path never
worked. When the path is triggered in any form (a simple test
These new helpers will be needed for pud entry updates soon. Introduce
these helpers by referencing the pmd ones. Namely:
- pudp_invalidate()
- pud_modify()
Cc: Thomas Gleixner
Cc: Ingo Molnar
Cc: Borislav Petkov
Cc: Dave Hansen
Cc: x...@kernel.org
Signed-off-by: Peter Xu
---
arch/x86/inc
Introduce arch_check_zapped_pud() to sanity check shadow stack on PUD zaps.
It has the same logic of the PMD helper.
One thing to mention is, it might be a good idea to use page_table_check in
the future for trapping wrong setups of shadow stack pgtable entries [1].
That is left for the future as
An entry should be reported as PUD leaf even if it's PROT_NONE, in which
case PRESENT bit isn't there. I hit bad pud without this when testing dax
1G on zapping a PROT_NONE PUD.
Cc: Thomas Gleixner
Cc: Ingo Molnar
Cc: Borislav Petkov
Cc: Dave Hansen
Cc: x...@kernel.org
Acked-by: Dave Hansen
S
These new helpers will be needed for pud entry updates soon. Introduce
them by referencing the pmd ones. Namely:
- pudp_invalidate()
- pud_modify()
Cc: Michael Ellerman
Cc: Nicholas Piggin
Cc: Christophe Leroy
Cc: linuxppc-dev@lists.ozlabs.org
Cc: Aneesh Kumar K.V
Signed-off-by: Peter Xu
-
mprotect() does mmu notifiers in PMD levels. It's there since 2014 of
commit a5338093bfb4 ("mm: move mmu notifier call from change_protection to
change_pmd_range").
At that time, the issue was that NUMA balancing can be applied on a huge
range of VM memory, even if nothing was populated. The not
In 2013, commit 72403b4a0fbd ("mm: numa: return the number of base pages
altered by protection changes") introduced "numa_huge_pte_updates" vmstat
entry, trying to capture how many huge ptes (in reality, PMD thps at that
time) are marked by NUMA balancing.
This patch proposes to remove it for some
Currently the dax fault handler dumps the vma range when dynamic debugging
enabled. That's mostly not useful. Dump the (aligned) address instead
with the order info.
Signed-off-by: Peter Xu
---
drivers/dax/device.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drive
[Based on mm-unstable, commit 31334cf98dbd, July 2nd]
v3:
- Fix a build issue on i386 PAE config
- Moved one line from patch 8 to patch 3
v1: https://lore.kernel.org/r/20240621142504.1940209-1-pet...@redhat.com
v2: https://lore.kernel.org/r/20240703212918.2417843-1-pet...@redhat.com
Dax supports
On Mon, Jul 15, 2024 at 2:08 AM Amit Machhiwal wrote:
>
> With CONFIG_PCI_DYNAMIC_OF_NODES [1], a hot-plug and hot-unplug sequence
> of a PCI device attached to a PCI-bridge causes following kernel Oops on
> a pseries KVM guest:
>
> RTAS: event: 2, Type: Hotplug Event (229), Severity: 1
> Kernel
On Mon, Jul 15, 2024 at 09:20:01AM -0700, Lizhi Hou wrote:
> On 7/15/24 01:07, Amit Machhiwal wrote:
> > With CONFIG_PCI_DYNAMIC_OF_NODES [1], a hot-plug and hot-unplug sequence
> > of a PCI device attached to a PCI-bridge causes following kernel Oops on
> > a pseries KVM guest:
> >
> > RTAS: ev
On Mon, Jul 15, 2024 at 04:28:15PM +1000, Michael Ellerman wrote:
> Ma Ke writes:
> > In read_handle(), of_get_address() may return NULL if getting address and
> > size of the node failed. When of_read_number() uses prop to handle
> > conversions between different byte orders, it could lead to a n
On 7/15/24 01:07, Amit Machhiwal wrote:
With CONFIG_PCI_DYNAMIC_OF_NODES [1], a hot-plug and hot-unplug sequence
of a PCI device attached to a PCI-bridge causes following kernel Oops on
a pseries KVM guest:
RTAS: event: 2, Type: Hotplug Event (229), Severity: 1
Kernel attempted to read use
On Mon, Jul 15, 2024 at 03:18:56PM +0200, Markus Elfring wrote:
> > In read_handle(), of_get_address() may return NULL if getting address and
> > size of the node failed. When of_read_number() uses prop to handle
> > conversions between different byte orders, it could lead to a null pointer
> > der
> In read_handle(), of_get_address() may return NULL if getting address and
> size of the node failed. When of_read_number() uses prop to handle
> conversions between different byte orders, it could lead to a null pointer
> dereference. Add NULL check to fix potential issue.
>
> Found by static ana
From: Nicholas Piggin
> Sent: 15 July 2024 09:25
>
> On Sun Jul 14, 2024 at 6:27 PM AEST, Naveen N Rao wrote:
> > Function profile sequence on powerpc includes two instructions at the
> > beginning of each function:
> > mflrr0
> > bl ftrace_caller
> >
> > The call to ftrace_caller
On 5/3/24 18:31, Joey Gouly wrote:
> The 3-bit POIndex is stored in the PTE at bits 60..62.
>
> Signed-off-by: Joey Gouly
> Cc: Catalin Marinas
> Cc: Will Deacon
> ---
> arch/arm64/include/asm/pgtable-hwdef.h | 10 ++
> 1 file changed, 10 insertions(+)
>
> diff --git a/arch/arm64/incl
On 5/3/24 18:31, Joey Gouly wrote:
> To make it easier to share the generic PKEYs flags, move the MTE flag.
The change looks good but too less details about it here. Please do consider
adding some more description, on how moving the VM flags down the arch range
helps going forward.
>
> Signed-
On 5/3/24 18:31, Joey Gouly wrote:
> Expose a HWCAP and ID_AA64MMFR3_EL1_S1POE to userspace, so they can be used to
> check if the CPU supports the feature.
>
> Signed-off-by: Joey Gouly
> Cc: Catalin Marinas
> Cc: Will Deacon
> ---
>
> This takes the last bit of HWCAP2, is this fine? What
On 5/3/24 18:31, Joey Gouly wrote:
> FEAT_ATS1E1A introduces a new instruction: `at s1e1a`.
> This is an address translation, without permission checks.
>
> POE allows read permissions to be removed from S1 by the guest. This means
> that an `at` instruction could fail, and not get the IPA.
>
On 5/3/24 18:31, Joey Gouly wrote:
> To allow using newer instructions that current assemblers don't know about,
> replace the `at` instruction with the underlying SYS instruction.
>
> Signed-off-by: Joey Gouly
> Cc: Marc Zyngier
> Cc: Oliver Upton
> Cc: Catalin Marinas
> Cc: Will Deacon
>
On 5/3/24 18:31, Joey Gouly wrote:
> POR_EL0 is a register that can be modified by userspace directly,
> so it must be context switched.
>
> Signed-off-by: Joey Gouly
> Cc: Catalin Marinas
> Cc: Will Deacon
> ---
> arch/arm64/include/asm/cpufeature.h | 6 ++
> arch/arm64/include/asm/pr
On Sun Jul 14, 2024 at 6:27 PM AEST, Naveen N Rao wrote:
> We are restricted to a .text size of ~32MB when using out-of-line
> function profile sequence. Allow this to be extended up to the previous
> limit of ~64MB by reserving space in the middle of .text.
>
> A new config option CONFIG_PPC_FTRAC
On Sun Jul 14, 2024 at 6:27 PM AEST, Naveen N Rao wrote:
> Function profile sequence on powerpc includes two instructions at the
> beginning of each function:
> mflrr0
> bl ftrace_caller
>
> The call to ftrace_caller() gets nop'ed out during kernel boot and is
> patched in when
With CONFIG_PCI_DYNAMIC_OF_NODES [1], a hot-plug and hot-unplug sequence
of a PCI device attached to a PCI-bridge causes following kernel Oops on
a pseries KVM guest:
RTAS: event: 2, Type: Hotplug Event (229), Severity: 1
Kernel attempted to read user page (10ec0048) - exploit attempt? (uid:
On 5/3/24 18:31, Joey Gouly wrote:
> Use the new CONFIG_ARCH_PKEY_BITS to simplify setting these bits
> for different architectures.
>
> Signed-off-by: Joey Gouly
>
> Cc: Andrew Morton
> Cc: linux-fsde...@vger.kernel.org
> Cc: linux...@kvack.org
> ---
> fs/proc/task_mmu.c | 2 ++
> include
On 5/3/24 18:31, Joey Gouly wrote:
> This indicates if the system supports POE. This is a CPUCAP_BOOT_CPU_FEATURE
> as the boot CPU will enable POE if it has it, so secondary CPUs must also
> have this feature.
>
> Signed-off-by: Joey Gouly
> Cc: Catalin Marinas
> Cc: Will Deacon
> ---
> ar
On 5/3/24 18:31, Joey Gouly wrote:
> Allow EL0 or EL1 to access POR_EL0 without being trapped to EL2.
>
> Signed-off-by: Joey Gouly
> Cc: Catalin Marinas
> Cc: Will Deacon
> Acked-by: Catalin Marinas
> ---
> arch/arm64/include/asm/el2_setup.h | 10 +-
> 1 file changed, 9 insertions
On Sun Jul 14, 2024 at 6:27 PM AEST, Naveen N Rao wrote:
> On powerpc, we would like to be able to make a pass on vmlinux.o and
> generate a new object file to be linked into vmlinux. Add a generic pass
> in Makefile.vmlinux that architectures can use for this purpose.
>
> Architectures need to sel
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