odule_init(cbe_cpufreq_init);
module_exit(cbe_cpufreq_exit);
+MODULE_DESCRIPTION("cpufreq driver for Cell BE processors");
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Christian Krafft ");
---
base-commit: 83a7eefedc9b56fe7bfeff13b6c7356688ffa670
change-id: 20240614-md-powerpc-drivers-cpufreq-6d345e48164e
On 2024-06-14 at 12:48:37 +0200, Vincent Guittot wrote:
> On Fri, 14 Jun 2024 at 11:28, Peter Zijlstra wrote:
> >
> > On Thu, Jun 13, 2024 at 06:15:59PM +, K Prateek Nayak wrote:
> > > Effects of call_function_single_prep_ipi()
> > > ==
> > >
> > > To pu
On Fri, 14 Jun 2024 at 11:28, Peter Zijlstra wrote:
>
> On Thu, Jun 13, 2024 at 06:15:59PM +, K Prateek Nayak wrote:
> > Effects of call_function_single_prep_ipi()
> > ==
> >
> > To pull a TIF_POLLING thread out of idle to process an IPI, the sender
> >
On Fri, Jun 14, 2024 at 02:35:33PM +0200, Uladzislau Rezki wrote:
> + /* Should a destroy process be deferred? */
> + if (s->flags & SLAB_DEFER_DESTROY) {
> + list_move_tail(&s->list, &slab_caches_defer_destroy);
> + schedule_delayed_work(&slab_caches_defer_destroy_w
Reading the dispatch trace log from /sys/kernel/debug/powerpc/dtl/cpu-*
results in a BUG() when the config CONFIG_HARDENED_USERCOPY is enabled as
shown below.
kernel BUG at mm/usercopy.c:102!
Oops: Exception in kernel mode, sig: 5 [#1]
LE PAGE_SIZE=64K MMU=Radix SMP NR_CPUS=2048 NUMA p
perf test "perf script tests" fails as below in systems
with python 3.6
File
"/home/athira/linux/tools/perf/tests/shell/../../scripts/python/parallel-perf.py",
line 442
if line := p.stdout.readline():
^
SyntaxError: invalid syntax
--- Cleaning up ---
Perf test for perf probe of function from different CU fails
as below:
./perf test -vv "test perf probe of function from different CU"
116: test perf probe of function from different CU:
--- start ---
test child forked, pid 2679
Failed to find symbol foo in
Since the "ins.name" is not set while using raw instruction,
perf annotate with insn-stat gives wrong data:
Result from "./perf annotate --data-type --insn-stat":
Annotate Instruction stats
total 615, ok 419 (68.1%), bad 196 (31.9%)
Name : Good Bad
-
In case of register defined variable (found using
find_data_type_global_reg), if the type of variable happens to be base
type (example, long unsigned int), perf report captures it as:
12.85% long unsigned int long unsigned int +0 (no field)
The above data type is actually referring to sampl
There are cases where define a global register variable and associate it
with a specified register. Example, in powerpc, two registers are
defined to represent variable:
1. r13: represents local_paca
register struct paca_struct *local_paca asm("r13");
2. r1: represents stack_pointer
register void
Now perf uses the capstone library to disassemble the instructions in
x86. capstone is used (if available) for perf annotate to speed up.
Currently it only supports x86 architecture. Patch includes changes to
enable this in powerpc. For now, only for data type sort keys, this
method is used and onl
capstone_init is made availbale for all archs to use and updated to
enable support for CS_ARCH_PPC as well. Patch removes
open_capstone_handle and uses capstone_init in all the places.
Signed-off-by: Athira Rajeev
---
tools/perf/util/disasm.c | 42 +++-
tools/p
symbol__disassemble_capstone in util/disasm.c calls function
open_capstone_handle to open/init the capstone. We already have a
capstone_init function in "util/print_insn.c". But capstone_init
is defined as a static function in util/print_insn.c. Change this and
also add the function in print_insn.h
Add instruction tracking function "update_insn_state_powerpc" for
powerpc. Example sequence in powerpc:
ld r10,264(r3)
mr r31,r3
<
ld r9,312(r31)
Consider ithe sample is pointing to: "ld r9,312(r31)".
Here the memory reference is hit at "312(r31)" where 312 is the offset
and r31 is
There are memory instructions in powerpc with opcode as 31.
Example: "ldx RT,RA,RB" , Its X form is as below:
__
| 31 | RT | RA | RB | 21 |/|
--
06 111621 30 31
The opcode for "ldx" i
Add few more instructions and use opcode as search key
to find if it is supported by the architecture. Added ones
are: addi, addic, addic., addis, subfic and mulli
Signed-off-by: Athira Rajeev
---
tools/perf/arch/powerpc/annotate/instructions.c | 14 ++
1 file changed, 14 insertions(
Data type profiling has concept of instruction tracking.
Example sequence in powerpc:
ld r10,264(r3)
mr r31,r3
<
ld r9,312(r31)
or differently
lwz r10,264(r3)
add r31, r3, RB
lwz r9, 0(r31)
If a sample is hit at
Use the raw instruction code and macros to identify memory instructions,
extract register fields and also offset. The implementation addresses
the D-form, X-form, DS-form instructions. Two main functions are added.
New parse function "load_store__parse" as instruction ops parser for
memory instruct
Currently, the perf tool infrastructure disasm_line__parse function to
parse disassembled line.
Example snippet from objdump:
objdump --start-address= --stop-address= -d
--no-show-raw-insn -C
c10224b4: lwz r10,0(r9)
This line "lwz r10,0(r9)" is parsed to extract instruction
perf annotate can be done in different ways. One way is to directly use
"perf annotate" command, other way to annotate specific symbol is to do
"perf report" and press "a" on the sample in UI mode. The approach
preferred in powerpc to parse sample for data type profiling is:
- Read directly from DS
Add support to capture and parse raw instruction in powerpc.
Currently, the perf tool infrastructure uses two ways to disassemble
and understand the instruction. One is objdump and other option is
via libcapstone.
Currently, the perf tool infrastructure uses "--no-show-raw-insn" option
with "objdu
Add "update_insn_state" callback to "struct arch" to handle instruction
tracking. Currently updating instruction state is handled by static
function "update_insn_state_x86" which is defined in "annotate-data.c".
Make this as a callback for specific arch and move to archs specific
file "arch/x86/ann
Data type profiling uses instruction tracking by checking each
instruction and updating the register type state in some data
structures. This is useful to find the data type in cases when the
register state gets transferred from one reg to another. Example, in
x86, "mov" instruction and in powerpc,
The patchset from Namhyung added support for data type profiling
in perf tool. This enabled support to associate PMU samples to data
types they refer using DWARF debug information. With the upstream
perf, currently it possible to run perf report or perf annotate to
view the data type information on
On Fri, Jun 14, 2024 at 06:46:46PM +0200, Piotr Wojtaszczyk wrote:
> On Fri, Jun 14, 2024 at 6:42 PM Mark Brown wrote:
> > On Fri, Jun 14, 2024 at 06:24:50PM +0200, Piotr Wojtaszczyk wrote:
> > > Ok. Later I will add a sound card driver to phytec3250 board which uses
> > > arch/arm/configs/lpc32x
On Fri, Jun 14, 2024 at 6:42 PM Mark Brown wrote:
>
> On Fri, Jun 14, 2024 at 06:24:50PM +0200, Piotr Wojtaszczyk wrote:
> > On Tue, Jun 11, 2024 at 12:36 PM Mark Brown wrote:
>
> > > On a quick scan I can't see any architecture dependency for build,
> > > please add an || COMPILE_TEST for improv
On Fri, Jun 14, 2024 at 06:34:48PM +0200, Piotr Wojtaszczyk wrote:
> This pach set is to bring back audio to machines with a LPC32XX CPU.
> The legacy LPC32XX SoC used to have audio spport in linux 2.6.27.
> The support was dropped due to lack of interest from mainaeners.
Please don't send new pat
On Fri, Jun 14, 2024 at 06:24:50PM +0200, Piotr Wojtaszczyk wrote:
> On Tue, Jun 11, 2024 at 12:36 PM Mark Brown wrote:
> > On a quick scan I can't see any architecture dependency for build,
> > please add an || COMPILE_TEST for improved coverage. As for all the
> > other things enabled in this
This driver was ported from an old version in linux 2.6.27 and adjusted
for the new ASoC framework and DMA API.
Signed-off-by: Piotr Wojtaszczyk
---
Changes for v3:
- Split previous commit for separate subsystems
- Add support and as a maintainer for the driver
- Replaced `SND_SOC` config depend
Some of the signals are multiplexed, multiplexer configured at a signal
request.
Signed-off-by: Piotr Wojtaszczyk
---
Changes for v3:
- Split previous commit for separate subsystems
- Add pl08x virtual dma channels for i2s1
- Add dma mux handling, required when requesting tx dma signal for i2s1
The 'dma-vc-names' correspond to virtual pl08x dma channels declared in
the 'phy3250.c' platform file.
Signed-off-by: Piotr Wojtaszczyk
---
Changes for v3:
- Split previous commit for separate subsystems
- Add properties to match dt binding
arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi | 8
1
Add nxp,lpc3220-i2s DT binding documentation.
Signed-off-by: Piotr Wojtaszczyk
---
Changes for v3:
- Added '$ref: dai-common.yaml#' and '#sound-dai-cells'
- Dropped all clock-names, references
- Dropped status property from the example
- Added interrupts property
- 'make dt_binding_check' pass
C
This pach set is to bring back audio to machines with a LPC32XX CPU.
The legacy LPC32XX SoC used to have audio spport in linux 2.6.27.
The support was dropped due to lack of interest from mainaeners.
Piotr Wojtaszczyk (4):
ASoC: dt-bindings: lpc32xx: Add lpc32xx i2s DT binding
ARM: dts: lpc32x
On Tue, Jun 11, 2024 at 12:36 PM Mark Brown wrote:
> > +config SND_SOC_FSL_LPC3XXX
> > + tristate "SoC Audio for NXP LPC32XX CPUs"
> > + depends on ARCH_LPC32XX && SND_SOC
>
> On a quick scan I can't see any architecture dependency for build,
> please add an || COMPILE_TEST for improved co
PCIe r6.0 added Flit mode that mainly alters HW behavior but some OS
visible changes are also because of it. The OS visible changes include
differences in the layout of some capabilities and interpretation of
the TLP headers (in diagnostics situations).
To be able to determine which mode the PCIe
This series adds support for Flit Mode (PCIe6). The series is built on
top of the TLP Logging refactoring series:
https://lore.kernel.org/linux-pci/20240514113109.6690-1-ilpo.jarvi...@linux.intel.com/
Important note to maintainer: The series carries
pcie_update_link_speed() refactoring change
Flit mode introduced in PCIe r6.0 alters how the TLP Header Log is
presented through AER and DPC Capability registers. The TLP Prefix Log
Register is not present with Flit mode and the register becomes
extension for TLP Header Log (PCIe r6.1 secs 7.8.4.12 & 7.9.14.13).
Adapt pcie_read_tlp_log() an
pcie_update_link_speed() is passed the Link Status register but not all
callers have that value at hand nor need the value.
Refactor pcie_update_link_speed() to include reading the Link Status
register into pcie_update_link_speed() and create
__pcie_update_link_speed() which can be used by the hot
On Fri, Jun 14, 2024 at 07:17:29AM -0700, Paul E. McKenney wrote:
> On Fri, Jun 14, 2024 at 02:35:33PM +0200, Uladzislau Rezki wrote:
> > On Thu, Jun 13, 2024 at 11:13:52AM -0700, Paul E. McKenney wrote:
> > > On Thu, Jun 13, 2024 at 07:58:17PM +0200, Uladzislau Rezki wrote:
> > > > On Thu, Jun 13,
On Thu, Jun 13, 2024 at 04:43:57PM +, LEROY Christophe wrote:
> I can test whatever you want on my 8xx boards.
>
> I have two types of board:
> - One with MPC866 microcontroller and 32Mbytes memory
> - One with MPC885 microcontroller and 128Mbytes memory
That is great.
I will code up some tes
On Fri, Jun 14, 2024 at 02:35:33PM +0200, Uladzislau Rezki wrote:
> On Thu, Jun 13, 2024 at 11:13:52AM -0700, Paul E. McKenney wrote:
> > On Thu, Jun 13, 2024 at 07:58:17PM +0200, Uladzislau Rezki wrote:
> > > On Thu, Jun 13, 2024 at 10:45:59AM -0700, Paul E. McKenney wrote:
> > > > On Thu, Jun 13,
On Fri, 07 Jun 2024 10:13:52 +0530, Athira Rajeev wrote:
> Perf bench futex fails as below when attempted to run on
> on a powerpc system:
>
> ./perf bench futex all
> Running futex/hash benchmark...
> Run summary [PID 626307]: 80 threads, each operating on 1024 [private]
> futexes for 10 secs
or pSeries
config: powerpc64-randconfig-r133-20240614
(https://download.01.org/0day-ci/archive/20240614/202406142110.r97ts8xm-...@intel.com/config)
compiler: clang version 19.0.0git (https://github.com/llvm/llvm-project
78ee473784e5ef6f0b19ce4cb111fb6e4d23c6b2)
reproduce:
(https://download.01.o
On Thu, Jun 13, 2024 at 11:13:52AM -0700, Paul E. McKenney wrote:
> On Thu, Jun 13, 2024 at 07:58:17PM +0200, Uladzislau Rezki wrote:
> > On Thu, Jun 13, 2024 at 10:45:59AM -0700, Paul E. McKenney wrote:
> > > On Thu, Jun 13, 2024 at 07:38:59PM +0200, Uladzislau Rezki wrote:
> > > > On Thu, Jun 13,
Al reported a possible use-after-free (UAF) in
kvm_spapr_tce_attach_iommu_group().
It looks up `stt` from tablefd, but then continues to use it after doing
fdput() on the returned fd. After the fdput() the tablefd is free to be
closed by another thread. The close calls kvm_spapr_tce_release() and
Greg KH writes:
> On Fri, Jun 14, 2024 at 05:54:50PM +1000, Michael Ellerman wrote:
>> Hi stable team,
>>
>> Can you please backport:
>> 2d43cc701b96 ("powerpc/uaccess: Fix build errors seen with GCC 13/14")
>>
>> To v6.9 and v6.6.
>>
>> It was marked for backporting, but hasn't been picked u
commit 2d43cc701b96f910f50915ac4c2a0cae5deb734c upstream.
Building ppc64le_defconfig with GCC 14 fails with assembler errors:
CC fs/readdir.o
/tmp/ccdQn0mD.s: Assembler messages:
/tmp/ccdQn0mD.s:212: Error: operand out of domain (18 is not a multiple of 4)
/tmp/ccdQn0mD.s:226: Erro
commit 2d43cc701b96f910f50915ac4c2a0cae5deb734c upstream.
Building ppc64le_defconfig with GCC 14 fails with assembler errors:
CC fs/readdir.o
/tmp/ccdQn0mD.s: Assembler messages:
/tmp/ccdQn0mD.s:212: Error: operand out of domain (18 is not a multiple of 4)
/tmp/ccdQn0mD.s:226: Erro
commit 2d43cc701b96f910f50915ac4c2a0cae5deb734c upstream.
Building ppc64le_defconfig with GCC 14 fails with assembler errors:
CC fs/readdir.o
/tmp/ccdQn0mD.s: Assembler messages:
/tmp/ccdQn0mD.s:212: Error: operand out of domain (18 is not a multiple of 4)
/tmp/ccdQn0mD.s:226: Erro
On Thu, Jun 13, 2024 at 06:15:59PM +, K Prateek Nayak wrote:
> Effects of call_function_single_prep_ipi()
> ==
>
> To pull a TIF_POLLING thread out of idle to process an IPI, the sender
> sets the TIF_NEED_RESCHED bit in the idle task's thread info in
>
On Fri, Jun 14, 2024 at 05:54:50PM +1000, Michael Ellerman wrote:
> Hi stable team,
>
> Can you please backport:
> 2d43cc701b96 ("powerpc/uaccess: Fix build errors seen with GCC 13/14")
>
> To v6.9 and v6.6.
>
> It was marked for backporting, but hasn't been picked up AFAICS. I'm not
> sure if
On Fri Jun 14, 2024 at 11:08 AM AEST, Segher Boessenkool wrote:
> On Fri, Jun 14, 2024 at 10:43:39AM +1000, Nicholas Piggin wrote:
> > On Wed Jun 12, 2024 at 6:28 PM AEST, Segher Boessenkool wrote:
> > > On Wed, Jun 12, 2024 at 02:42:32PM +1000, Nicholas Piggin wrote:
> > > > arm, powerpc, riscv, b
On Thu, Jun 13, 2024 at 04:05:08PM +0200, Christoph Hellwig wrote:
> On Wed, Jun 12, 2024 at 05:56:15PM +0200, Roger Pau Monné wrote:
> > Right. AFAICT advertising "feature-barrier" and/or
> > "feature-flush-cache" could be done based on whether blkback
> > understand those commands, not on whethe
Hi stable team,
Can you please backport:
2d43cc701b96 ("powerpc/uaccess: Fix build errors seen with GCC 13/14")
To v6.9 and v6.6.
It was marked for backporting, but hasn't been picked up AFAICS. I'm not
sure if it clashed with the asm_goto_output changes or something. But it
backports cleanly
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