Le 27/02/2021 à 08:13, Christian Zigotzky a écrit :
Hello Christophe,
Thanks a lot for compiling the latest git kernel.
I have solved the compiling issue through setting up a value for the SUBLEVEL variable in
"a/Makefile". Before it wasn't necessary to set up a value for the SUBLEVEL variab
Hello Christophe,
Thanks a lot for compiling the latest git kernel.
I have solved the compiling issue through setting up a value for the
SUBLEVEL variable in "a/Makefile". Before it wasn't necessary to set up
a value for the SUBLEVEL variable.
Cheers,
Christian
On 26 February 21 at 5:10 pm,
Usually sigset_t is exactly 8B which is a "trivial" size and does not
warrant using __copy_from_user(). Use __get_user() directly in
anticipation of future work to remove the trivial size optimizations
from __copy_from_user().
The ppc32 implementation of get_sigset_t() previously called
copy_from_
Previously setup_sigcontext() performed a costly KUAP switch on every
uaccess operation. These repeated uaccess switches cause a significant
drop in signal handling performance.
Rewrite setup_sigcontext() to assume that a userspace write access window
is open by replacing all uaccess functions wit
Previously restore_sigcontext() performed a costly KUAP switch on every
uaccess operation. These repeated uaccess switches cause a significant
drop in signal handling performance.
Rewrite restore_sigcontext() to assume that a userspace read access
window is open by replacing all uaccess functions
From: Daniel Axtens
Add uaccess blocks and use the 'unsafe' versions of functions doing user
access where possible to reduce the number of times uaccess has to be
opened/closed.
There is no 'unsafe' version of copy_siginfo_to_user, so move it
slightly to allow for a "longer" uaccess block.
Sign
As reported by Anton, there is a large penalty to signal handling
performance on radix systems using KUAP. The signal handling code
performs many user access operations, each of which needs to switch the
KUAP permissions bit to open and then close user access. This involves a
costly 'mtspr' operati
Both rt_sigreturn() and handle_rt_signal_64() contain TM-related ifdefs
which break-up an if/else block. Provide stubs for the ifdef-guarded TM
functions and remove the need for an ifdef in rt_sigreturn().
Rework the remaining TM ifdef in handle_rt_signal64() similar to
commit f1cf4f93de2f ("power
The majority of setup_sigcontext() can be refactored to execute in an
"unsafe" context assuming an open uaccess window except for some
non-inline function calls. Move these out into a separate
prepare_setup_sigcontext() function which must be called first and
before opening up a uaccess window. Non
Unlike the other MSR_TM_* macros, MSR_TM_ACTIVE does not reference or
use its parameter unless CONFIG_PPC_TRANSACTIONAL_MEM is defined. This
causes an 'unused variable' compile warning unless the variable is also
guarded with CONFIG_PPC_TRANSACTIONAL_MEM.
Reference but do nothing with the argument
Reuse the "safe" implementation from signal.c but call unsafe_get_user()
directly in a loop to avoid the intermediate copy into a local buffer.
Signed-off-by: Christopher M. Riedl
Reviewed-by: Daniel Axtens
---
arch/powerpc/kernel/signal.h | 26 ++
1 file changed, 26 ins
From: Daniel Axtens
Add uaccess blocks and use the 'unsafe' versions of functions doing user
access where possible to reduce the number of times uaccess has to be
opened/closed.
Signed-off-by: Daniel Axtens
Co-developed-by: Christopher M. Riedl
Signed-off-by: Christopher M. Riedl
---
arch/po
Use the same approach as unsafe_copy_to_user() but instead call
unsafe_get_user() in a loop.
Signed-off-by: Christopher M. Riedl
---
v7: * Change implementation to call unsafe_get_user() and remove
dja's 'Reviewed-by' tag
---
arch/powerpc/include/asm/uaccess.h | 21
Excerpts from Nicholas Piggin's message of February 27, 2021 10:21 am:
> Excerpts from Fabiano Rosas's message of February 27, 2021 8:37 am:
>> Nicholas Piggin writes:
>>
>> Hi, thanks for this. It helped me clarify a bunch of details that I
>> haven't understood while reading the asm code.
>
>
Excerpts from Fabiano Rosas's message of February 27, 2021 8:37 am:
> Nicholas Piggin writes:
>
> Hi, thanks for this. It helped me clarify a bunch of details that I
> haven't understood while reading the asm code.
Yes, me too :)
>> +/*
>> + * void kvmppc_p9_enter_guest(struct vcpu *vcpu);
>> +
Excerpts from Fabiano Rosas's message of February 27, 2021 2:38 am:
> Nicholas Piggin writes:
>
>> LPCR[HDICE]=0 suppresses hypervisor decrementer exceptions on some
>> processors, so it must be enabled before HDEC is set.
>>
>> Rather than set it in the host LPCR then setting HDEC, move the HDEC
Excerpts from Cédric Le Goater's message of February 26, 2021 12:51 am:
> On 2/25/21 2:46 PM, Nicholas Piggin wrote:
>> In the interest of minimising the amount of code that is run in
>> "real-mode", don't handle hcalls in real mode in the P9 path.
>>
>> POWER8 and earlier are much more expensive
Excerpts from Fabiano Rosas's message of February 27, 2021 1:56 am:
> Nicholas Piggin writes:
>
>> Switching the MMU from radix<->radix mode is tricky particularly as the
>> MMU can remain enabled and requires a certain sequence of SPR updates.
>> Move these together into their own functions.
>>
Excerpts from Daniel Axtens's message of February 26, 2021 4:06 pm:
> Hi Nick,
>
>> void kvmppc_set_msr_hv(struct kvm_vcpu *vcpu, u64 msr)
>> {
>> +/*
>> + * Guest must always run with machine check interrupt
>> + * enabled.
>> + */
>> +if (!(msr & MSR_ME))
>> +ms
Excerpts from Daniel Axtens's message of February 26, 2021 3:44 pm:
> Nicholas Piggin writes:
>
>> The code being executed in KVM_GUEST_MODE_SKIP is hypervisor code with
>> MSR[IR]=0, so the faults of concern are the d-side ones caused by access
>> to guest context by the hypervisor.
>>
>> Instru
Excerpts from Daniel Axtens's message of February 26, 2021 3:01 pm:
> Hi Nick,
>
>> The va argument is not used in the function or set by its asm caller,
>> so remove it to be safe.
>
> Huh, so it isn't. I tracked the original implementation down to commit
> a8606e20e41a ("KVM: PPC: Handle some P
Nicholas Piggin writes:
Hi, thanks for this. It helped me clarify a bunch of details that I
haven't understood while reading the asm code.
Some comments below:
> Almost all logic is moved to C, by introducing a new in_guest mode that
> selects and branches very early in the interrupt handler to
Reviewed-by: Brian King
--
Brian King
Power Linux I/O
IBM Linux Technology Center
Nicholas Piggin writes:
> LPCR[HDICE]=0 suppresses hypervisor decrementer exceptions on some
> processors, so it must be enabled before HDEC is set.
>
> Rather than set it in the host LPCR then setting HDEC, move the HDEC
> update to after the guest MMU context (including LPCR) is loaded.
> There
Reviewed-by: Brian King
--
Brian King
Power Linux I/O
IBM Linux Technology Center
On Fri, Feb 26, 2021 at 04:03:54PM +, Matthew Wilcox wrote:
> On Fri, Feb 26, 2021 at 10:42:00AM -0400, Jason Gunthorpe wrote:
> > On Thu, Feb 25, 2021 at 08:58:20PM +, Matthew Wilcox wrote:
> >
> > > I'd like to hear better ideas than this.
> >
> > You didn't like my suggestion to put a
On Thu, 25 Feb 2021 20:58:20 +
Matthew Wilcox wrote:
> In order to walk the page tables without the mmap semaphore, it must
> be possible to prevent them from being freed and reused (eg if munmap()
> races with viewing /proc/$pid/smaps).
>
> There is various commentary within the mm on how t
Le 26/02/2021 à 13:34, Christian Zigotzky a écrit :
Hello,
I tried to compile the latest Git kernel today. Unfortunately it doesn't
compile.
I have no such problem with latest git kernel.
Christophe
Error messages:
CC arch/powerpc/kernel/udbg_16550.o
In file included from ./in
On Fri, Feb 26, 2021 at 10:42:00AM -0400, Jason Gunthorpe wrote:
> On Thu, Feb 25, 2021 at 08:58:20PM +, Matthew Wilcox wrote:
>
> > I'd like to hear better ideas than this.
>
> You didn't like my suggestion to put a sleepable lock around the
> freeing of page tables during flushing?
>
> I s
Nicholas Piggin writes:
> Switching the MMU from radix<->radix mode is tricky particularly as the
> MMU can remain enabled and requires a certain sequence of SPR updates.
> Move these together into their own functions.
>
> This also includes the radix TLB check / flush because it's tied in to
> M
On Thu, Feb 25, 2021 at 08:58:20PM +, Matthew Wilcox wrote:
> I'd like to hear better ideas than this.
You didn't like my suggestion to put a sleepable lock around the
freeing of page tables during flushing?
I still don't see how you convert the sleepable page walkers to use
rcu??
Jason
Another drive-by review... just some minor nits, below...
On Fri, Feb 26, 2021 at 12:20:24PM +0530, Madhavan Srinivasan wrote:
> Introduce code to support the checking of attr.config* for
> values which are reserved for a given platform.
> Performance Monitoring Unit (PMU) configuration registers
Hello,
I tried to compile the latest Git kernel today. Unfortunately it doesn't
compile.
Error messages:
CC arch/powerpc/kernel/udbg_16550.o
In file included from ./include/linux/stackprotector.h:10:0,
from arch/powerpc/kernel/smp.c:35:
./arch/powerpc/include/asm/stack
On 2/25/21 8:49 AM, Jordan Niethe wrote:
Commit af99da74333b ("powerpc/sstep: Support VSX vector paired storage
access instructions") added loading and storing 32 word long data into
adjacent VSRs. However the calculation used to determine if two VSRs
needed to be loaded/stored inadvertently p
On Fri, Feb 26, 2021 at 1:17 PM Christoph Hellwig wrote:
>
> On Fri, Feb 26, 2021 at 12:17:50PM +0800, Claire Chang wrote:
> > Do you think I should fix this and rebase on the latest linux-next
> > now? I wonder if there are more factor and clean up coming and I
> > should wait after that.
>
> Her
On Thu, Feb 25, 2021 at 05:10:39AM -0500, Athira Rajeev wrote:
> diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c
> index 4b4319d8..c8be44c 100644
> --- a/arch/powerpc/perf/core-book3s.c
> +++ b/arch/powerpc/perf/core-book3s.c
> @@ -222,7 +222,7 @@ static inline void p
* Athira Rajeev [2021-02-25 11:50:02]:
> In systems having higher node numbers available like node
> 255, perf numa bench will fail with SIGABORT.
>
> <<>>
> perf: bench/numa.c:1416: init: Assertion `!(g->p.nr_nodes > 64 ||
> g->p.nr_nodes < 0)' failed.
> Aborted (core dumped)
> <<>>
>
Looks
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