Re: [PATCH] ASoC: fsl_asrc: Merge suspend/resume function to runtime_suspend/resume

2020-05-24 Thread Nicolin Chen
On Mon, May 25, 2020 at 02:11:18PM +0800, Shengjiu Wang wrote: > > > @@ -1135,6 +1137,24 @@ static int fsl_asrc_runtime_resume(struct device > > > *dev) > > > goto disable_asrck_clk; > > > } > > > > > > + /* Stop all pairs provisionally */ > > > + regmap_read(as

Re: [PATCH] ASoC: fsl_asrc: Merge suspend/resume function to runtime_suspend/resume

2020-05-24 Thread Nicolin Chen
On Fri, May 22, 2020 at 05:57:24PM +0800, Shengjiu Wang wrote: > With dedicated power domain for asrc, power can be disabled after > probe and pm runtime suspend, then the value of all registers need to > be restored in pm runtime resume. So we can merge suspend/resume function > to runtime_suspend

Re: [PATCH] kbuild: reuse vmlinux.o in vmlinux_link

2020-05-24 Thread Masahiro Yamada
Hi Sam, Thanks for the comments. On Sun, May 24, 2020 at 1:54 AM Sam Ravnborg wrote: > > Hi Masahiro. > > On Sun, May 24, 2020 at 12:12:35AM +0900, Masahiro Yamada wrote: > > Hi Nicholas, > > (+CC: Sam Ravnborg) > > > > > > On Sat, May 23, 2020 at 7:06 PM Nicholas Piggin wrote: > > > > > > Exce

Re: [PATCH] ASoC: fsl_asrc: Merge suspend/resume function to runtime_suspend/resume

2020-05-24 Thread Shengjiu Wang
On Mon, May 25, 2020 at 1:12 PM Nicolin Chen wrote: > > On Fri, May 22, 2020 at 05:57:24PM +0800, Shengjiu Wang wrote: > > With dedicated power domain for asrc, power can be disabled after > > probe and pm runtime suspend, then the value of all registers need to > > be restored in pm runtime resum

Re: [linux-next RFC v2] mm/gup.c: Convert to use get_user_{page|pages}_fast_only()

2020-05-24 Thread Souptick Joarder
On Mon, May 25, 2020 at 6:36 AM John Hubbard wrote: > > On 2020-05-23 21:27, Souptick Joarder wrote: > > API __get_user_pages_fast() renamed to get_user_pages_fast_only() > > to align with pin_user_pages_fast_only(). > > > > As part of this we will get rid of write parameter. Instead caller > > wi

[PATCH] powerpc: Add ppc_inst_as_u64()

2020-05-24 Thread Michael Ellerman
The code patching code wants to get the value of a struct ppc_inst as a u64 when the instruction is prefixed, so we can pass the u64 down to __put_user_asm() and write it with a single store. This is a bit awkward because the value differs based on the CPU endianness, so add a helper to do the con

[powerpc:merge] BUILD SUCCESS 1ef93962cf4293ec9e1bb3163cc4b7dcfc3de84f

2020-05-24 Thread kbuild test robot
allmodconfig powerpc defconfig powerpc allyesconfig powerpc rhel-kconfig powerpc allmodconfig powerpc allnoconfig i386 randconfig-a001-20200524 i386

Re: [PATCH v4 14/45] powerpc/32s: Don't warn when mapping RO data ROX.

2020-05-24 Thread Michael Ellerman
Christophe Leroy writes: > Mapping RO data as ROX is not an issue since that data > cannot be modified to introduce an exploit. Being pedantic: it is still an issue, in that it means there's more targets for a code-reuse attack. But given the entire kernel text is also available for code-reuse a

Re: [PATCH v4 07/45] powerpc/ptdump: Limit size of flags text to 1/2 chars on PPC32

2020-05-24 Thread Michael Ellerman
Christophe Leroy writes: > In order to have all flags fit on a 80 chars wide screen, > reduce the flags to 1 char (2 where ambiguous). I don't love this, the output is less readable. Is fitting on an 80 char screen a real issue for you? I just make my terminal window bigger. cheers > No cache

Re: [PATCH] ASoC: fsl_asrc: Merge suspend/resume function to runtime_suspend/resume

2020-05-24 Thread Nicolin Chen
On Fri, May 22, 2020 at 05:57:24PM +0800, Shengjiu Wang wrote: > With dedicated power domain for asrc, power can be disabled after > probe and pm runtime suspend, then the value of all registers need to > be restored in pm runtime resume. So we can merge suspend/resume function > to runtime_suspend

Re: [PATCH v2] powerpc: Add ppc_inst_next()

2020-05-24 Thread Jordan Niethe
On Fri, May 22, 2020 at 11:33 PM Michael Ellerman wrote: > > In a few places we want to calculate the address of the next > instruction. Previously that was simple, we just added 4 bytes, or if > using a u32 * we incremented that pointer by 1. > > But prefixed instructions make it more complicated

[PATCH 5/5] powerpc sstep: Add tests for Prefixed Add Immediate

2020-05-24 Thread Jordan Niethe
Use the existing support for testing compute type instructions to test Prefixed Add Immediate (paddi). The R bit of the paddi instruction controls whether current instruction address is used. Add test cases for when R=1 and for R=0. paddi has a 34 bit immediate field formed by concatenating si0 an

[PATCH 4/5] powerpc sstep: Let compute tests specify a required cpu feature

2020-05-24 Thread Jordan Niethe
An a array of struct compute_test's are used to declare tests for compute instructions. Add a cpu_feature field to struct compute_test as an optional way to specify a cpu feature that must be present. If not present then skip the test. Signed-off-by: Jordan Niethe --- arch/powerpc/lib/test_emula

[PATCH 3/5] powerpc sstep: Set NIP in instruction emulation tests

2020-05-24 Thread Jordan Niethe
The tests for emulation of compute instructions execute and emulate an instruction and then compare the results to verify the emulation. In ISA v3.1 there are instructions that operate relative to the NIP. Therefore set the NIP in the regs used for the emulated instruction to the location of the ex

[PATCH 2/5] powerpc sstep: Add tests for prefixed floating-point load/stores

2020-05-24 Thread Jordan Niethe
Add tests for the prefixed versions of the floating-point load/stores that are currently tested. This includes the following instructions: * Prefixed Load Floating-Point Single (plfs) * Prefixed Load Floating-Point Double (plfd) * Prefixed Store Floating-Point Single (pstfs) * Prefixed Stor

[PATCH 1/5] powerpc sstep: Add tests for prefixed integer load/stores

2020-05-24 Thread Jordan Niethe
Add tests for the prefixed versions of the integer load/stores that are currently tested. This includes the following instructions: * Prefixed Load Doubleword (pld) * Prefixed Load Word and Zero (plwz) * Prefixed Store Doubleword (pstd) Skip the new tests if ISA v3.1 is unsupported. Signed-

RE: [PATCH] soc: fsl: qe: Replace one-element array and use struct_size() helper

2020-05-24 Thread Qiang Zhao
On Wed, May 23, 2020 at 5:22 PM Li Yang > -Original Message- > From: Li Yang > Sent: 2020年5月23日 5:22 > To: Kees Cook > Cc: Gustavo A. R. Silva ; Qiang Zhao > ; linuxppc-dev ; > moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE > ; lkml ; > Gustavo A. R. Silva > Subject: Re: [PATCH

Re: [PATCH v2] powerpc: Add ppc_inst_next()

2020-05-24 Thread Michael Ellerman
Nicholas Piggin writes: > Excerpts from Nicholas Piggin's message of May 24, 2020 9:56 am: >> Excerpts from Michael Ellerman's message of May 22, 2020 11:33 pm: >>> In a few places we want to calculate the address of the next >>> instruction. Previously that was simple, we just added 4 bytes, or i

Re: [linux-next RFC v2] mm/gup.c: Convert to use get_user_{page|pages}_fast_only()

2020-05-24 Thread John Hubbard
On 2020-05-23 21:27, Souptick Joarder wrote: API __get_user_pages_fast() renamed to get_user_pages_fast_only() to align with pin_user_pages_fast_only(). As part of this we will get rid of write parameter. Instead caller will pass FOLL_WRITE to get_user_pages_fast_only(). This will not change any

[Bug 207873] BUG at swapops + rcu stall + soft lockup at running btrfs test suite (TEST=013\* ./misc-tests.sh)

2020-05-24 Thread bugzilla-daemon
https://bugzilla.kernel.org/show_bug.cgi?id=207873 Erhard F. (erhar...@mailbox.org) changed: What|Removed |Added Status|NEW |RESOLVED Resol

[PATCH v2 3/4] powerpc: Fix instruction dumping to use address value correctly

2020-05-24 Thread Aneesh Kumar K.V
Use ___va() to convert the real address that will skip the input validation. We can get interrupts with IR=0 and with NIP value > PAGE_OFFSET. Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/include/asm/processor.h | 9 + arch/powerpc/kernel/process.c| 7 ++- 2 files changed

[PATCH v2 4/4] powerpc: Avoid opencoding fixup_real_addr

2020-05-24 Thread Aneesh Kumar K.V
Use the newly added helper. Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/kernel/traps.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c index 051d7028e71f..1d58d88a7be1 100644 --- a/arch/powerpc/kernel/traps.c +

[PATCH v2 2/4] powerpc/va: Add a __va() variant that doesn't do input validation

2020-05-24 Thread Aneesh Kumar K.V
On ppc64, __va(x) do check for input argument to be less than PAGE_OFFSET. In certain code paths, we want to skip that check. Add a variant ___va(x) to be used in such cases. Switch the #define to static inline. __pa() still doesn't benefit from this. But a static inline done in this patch is bett

[PATCH v2 1/4] powerpc/instruction_dump: Fix kernel crash with show_instructions

2020-05-24 Thread Aneesh Kumar K.V
With Hard Lockup watchdog, we can hit a BUG() if we take a watchdog interrupt when in OPAL mode. This happens in show_instructions() where the kernel takes the watchdog NMI IPI with MSR_IR == 0. With that show_instructions() updates the variable pc in the loop and the second iterations will result

[PATCH v3 0/3] vmalloc kernel mapping and relocatable kernel

2020-05-24 Thread Alexandre Ghiti
This patchset originally implemented relocatable kernel support but now also moves the kernel mapping into the vmalloc zone. The first patch explains why we need to move the kernel into vmalloc zone (instead of memcpying it around). That patch should ease KASLR implementation a lot. The second pa

[PATCH v3 3/3] arch, scripts: Add script to check relocations at compile time

2020-05-24 Thread Alexandre Ghiti
Relocating kernel at runtime is done very early in the boot process, so it is not convenient to check for relocations there and react in case a relocation was not expected. Powerpc architecture has a script that allows to check at compile time for such unexpected relocations: extract the common lo

[PATCH v3 2/3] riscv: Introduce CONFIG_RELOCATABLE

2020-05-24 Thread Alexandre Ghiti
This config allows to compile the kernel as PIE and to relocate it at any virtual address at runtime: this paves the way to KASLR and to 4-level page table folding at runtime. Runtime relocation is possible since relocation metadata are embedded into the kernel. Note that relocating at runtime int

[PATCH v3 1/3] riscv: Move kernel mapping to vmalloc zone

2020-05-24 Thread Alexandre Ghiti
This is a preparatory patch for relocatable kernel. The kernel used to be linked at PAGE_OFFSET address and used to be loaded physically at the beginning of the main memory. Therefore, we could use the linear mapping for the kernel mapping. But the relocated kernel base address will be different