The functions returns s64 but the return statement is missing.
This adds the missing return statement.
Signed-off-by: Alexey Kardashevskiy
---
Just in case if this has not been caught just yet :)
---
arch/powerpc/platforms/powernv/opal-call.c | 1 +
1 file changed, 1 insertion(+)
diff --git
On Mon, Mar 11, 2019 at 6:35 PM Haibo Xu (Arm Technology China)
wrote:
>
> On 2019/3/12 2:34, Sudeep Holla wrote:
> > (I thought I had sent this email, last Tuesday itself, but saw this in my
> > draft today, something went wrong, sorry for the delay)
> >
> > On Tue, Mar 05, 2019 at 02:14:47AM +00
On 2019/3/12 2:34, Sudeep Holla wrote:
> (I thought I had sent this email, last Tuesday itself, but saw this in my
> draft today, something went wrong, sorry for the delay)
>
> On Tue, Mar 05, 2019 at 02:14:47AM +, Haibo Xu (Arm Technology China)
> wrote:
>> On 2019/3/4 18:12, Sudeep Holla wro
Wire up KASAN. Only outline instrumentation is supported.
The KASAN shadow area is mapped into vmemmap space:
0x8000 0400 to 0x8000 0600 .
To do this we require that vmemmap be disabled. (This is the default
in the kernel config that QorIQ provides for the machine in their
SDK a
In powerpc (as I understand it), we spend a lot of time in boot
running in real mode before MMU paging is initalised. During
this time we call a lot of generic code, including printk(). If
we try to access the shadow region during this time, things fail.
My attempts to move early init before the f
Currently, shadow addresses are always addr >> shift + offset.
However, for powerpc, the virtual address space is fragmented in
ways that make this simple scheme impractical.
Allow architectures to override:
- kasan_shadow_to_mem
- kasan_mem_to_shadow
- addr_has_shadow
Rename addr_has_shadow t
We have a couple of places checking for the existence of a shadow
mapping for an address by open-coding the inverse of the check in
addr_has_shadow.
Replace the open-coded versions with the helper. This will be
needed in future to allow architectures to override the layout
of the shadow mapping.
Building on the work of Christophe, Aneesh and Balbir, I've ported
KASAN to the e6500, a 64-bit Book3E processor which doesn't have a
hashed page table. It applies on top of Christophe's series, v9, plus
the proposed new version of patch 2.
It requires some changes to the KASAN core; we use the le
From: Nicholas Piggin
BugLink: https://bugs.launchpad.net/bugs/1788098
THP paths can defer splitting compound pages until after the actual
remap and TLB flushes to split a huge PMD/PUD. This causes radix
partition scope page table mappings to get out of synch with the host
qemu page table mappin
Formatting of Kconfig files doesn't look so pretty, so let the
Great White Handkerchief come around and clean it up.
Signed-off-by: Enrico Weigelt, metux IT consult
---
arch/powerpc/Kconfig | 28 ++--
arch/powerpc/kvm/Kconfig | 6 +++---
a
Formatting of Kconfig files doesn't look so pretty, so let the
Great White Handkerchief come around and clean it up.
Signed-off-by: Enrico Weigelt, metux IT consult
---
sound/aoa/Kconfig | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/sound/aoa/Kconfig b/sound/aoa/Kconf
When testing DLPAR CPU add/remove on a system under stress,
pseries_cpu_die() doesn't wait long enough for a CPU to die:
[ 446.983944] cpu 148 (hwid 148) Ready to die...
[ 446.984062] cpu 149 (hwid 149) Ready to die...
[ 446.993518] cpu 150 (hwid 150) Ready to die...
[ 446.993543] Querying DEA
Hello Gautham,
Thanks for your review.
Gautham R Shenoy writes:
> Hello Thiago,
>
> On Fri, Feb 22, 2019 at 07:57:52PM -0300, Thiago Jung Bauermann wrote:
>> I see two cases that can be causing this race:
>>
>> 1. It's possible that CPU 134 was inactive at the time it was unplugged. In
>>
(I thought I had sent this email, last Tuesday itself, but saw this in my
draft today, something went wrong, sorry for the delay)
On Tue, Mar 05, 2019 at 02:14:47AM +, Haibo Xu (Arm Technology China) wrote:
> On 2019/3/4 18:12, Sudeep Holla wrote:
> > On Mon, Mar 04, 2019 at 08:25:28AM +,
From: Nicholas Piggin
THP paths can defer splitting compound pages until after the actual
remap and TLB flushes to split a huge PMD/PUD. This causes radix
partition scope page table mappings to get out of synch with the host
qemu page table mappings.
This results in random memory corruption in t
Check a resource for the UNSET flags.
Signed-off-by: Sergey Miroshnichenko
---
arch/powerpc/platforms/powernv/pci-ioda.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c
b/arch/powerpc/platforms/powernv/pci-ioda.c
index fa6af52b5219
The allocated bridge windows are big enough to house all the children
bridges and BARs, but the fixed resources must be assigned first, so the
movable ones later divide the rest of the window. That's the assignment
order:
1. Bridge windows with fixed areas;
2. Fixed BARs;
3. The rest of BARs an
Consider previously calculated boundaries when allocating a bridge
window, setting the lowest allowed address and checking the result.
Signed-off-by: Sergey Miroshnichenko
---
drivers/pci/bus.c | 2 +-
drivers/pci/setup-res.c | 31 +--
2 files changed, 30 inser
With movable BARs, adding a hotplugged device may affect all the PCIe
domain starting from the root, so use a pci_rescan_bus() function which
handles the rearrangement of existing BARs and bridge windows.
Signed-off-by: Sergey Miroshnichenko
---
drivers/pci/hotplug/pciehp_pci.c | 14 +---
When movable BARs are enabled, the PCI subsystem at first releases
all the bridge windows and then performs an attempt to assign new
requested resources and re-assign the existing ones.
If a hotplugged device gets its resources first, there could be no
space left to re-assign resources of already
For every (IO, MEM, MEM64) bridge window, count the fixed resources of
its children endpoints and children bridge windows:
| <- BAR -> || <- child bus fixed_range_hard -> | | <- fixed BAR -> |
| <-bus's fixed_range_hard-> |
| <-
If a bridge window contains fixed areas (there are PCIe devices with
immovable BARs located on this bus), this window must be allocated
within the bound memory area, limited by windows size and by address
range of fixed resources, calculated as follows:
| <-- bus's fixed_range_hard
If the firmware or kernel has arranged memory for PCIe devices in a way
that doesn't provide enough space for BARs of a new hotplugged device, the
kernel can pause the drivers of the "obstructing" devices and move their
BARs, so new BARs can fit into the freed spaces.
When a driver is un-paused by
Don't lose the size of the requested EP's BAR if it can't be fit
in a current trial, so this can be retried.
But a failed bridge window must be dropped and recalculated in the
next trial.
Signed-off-by: Sergey Miroshnichenko
---
drivers/pci/setup-bus.c | 3 ++-
drivers/pci/setup-res.c | 12 +++
pbus_size_mem() returns a precise amount of memory required to fit
all the requested BARs and windows of children bridges.
Signed-off-by: Sergey Miroshnichenko
---
drivers/pci/setup-bus.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pci/setup-bus.c b/drivers/pci/se
When the movable BARs feature is enabled, don't rely on the memory gaps
reserved by the BIOS/bootloader/firmware, but instead rearrange the BARs
and bridge windows starting from the root.
Endpoint device's BARs, after being released, are resorted and written
back by the pci_assign_unassigned_root_
The only difference between the fixed and movable BARs is an offset
preservation during the release+reassign procedure on PCIe rescan.
When fixed BARs are included into the result of pbus_size_mem(), these
BARs can be restricted: assign them to direct parents only.
Signed-off-by: Sergey Miroshnic
Allow matching them to non-prefetchable windows, as it is done for movable
resources.
Signed-off-by: Sergey Miroshnichenko
---
drivers/pci/setup-bus.c | 13 +
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c
index 3644feb
If a PCIe device driver doesn't yet have support for movable BARs,
mark device's BARs with IORESOURCE_PCI_FIXED.
Signed-off-by: Sergey Miroshnichenko
---
drivers/pci/probe.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index dc935
Hotplugged devices can affect the existing ones by moving their BARs.
PCI subsystem will inform the NVME driver about this by invoking
reset_prepare()+reset_done(), then iounmap()+ioremap() must be called.
Signed-off-by: Sergey Miroshnichenko
---
drivers/nvme/host/pci.c | 29
Use the PM runtime methods to wake up the bridges before accessing
their config space.
Signed-off-by: Sergey Miroshnichenko
---
drivers/pci/probe.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 88350dd56344..dc935f82a595 100644
--- a/driv
Make the released resources of a bridge valid for later re-assignment:
clear the STARTALIGN flag.
Resources marked with PCI_FIXED must preserve their offset and size.
Signed-off-by: Sergey Miroshnichenko
---
drivers/pci/setup-bus.c | 47 -
1 file changed,
If a new PCIe device has been hot-plugged between the two active ones
without big enough gap between their BARs, these BARs should be moved
if their drivers support this feature. The drivers should be notified
and paused during the procedure:
1) dev 8 (new)
|
After updating the bridge window resources, the PCI_COMMAND_IO and
PCI_COMMAND_MEMORY bits of the bridge must be addressed as well.
Signed-off-by: Sergey Miroshnichenko
---
drivers/pci/pci.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 8
Drivers indicate their support of movable BARs by implementing the
new rescan_prepare() and rescan_done() hooks in the struct pci_driver.
All device's activity must be stopped during a rescan, and iounmap()
+ioremap() must be applied to every used BAR.
Signed-off-by: Sergey Miroshnichenko
---
d
CPU0 CPU1
pci_enable_device_mem() pci_enable_device_mem()
pci_enable_bridge() pci_enable_bridge()
pci_is_enabled()
return false;
atomic_inc_return(enable_cnt)
Start actual enabling the bridge
If BAR movement has happened (due to PCIe hotplug) after pci_save_state(),
the saved addresses will become outdated. Restore them the most recently
calculated values, not the ones stored in an arbitrary moment.
Signed-off-by: Sergey Miroshnichenko
---
drivers/pci/pci.c | 2 +-
1 file changed, 1
Way back in v4.3 the PPC hardware RNG stuff was changed to only provide
the RNG seed functions, but this line was missed during the change.
Fixes: 01c9348c7620 ("powerpc: Use hardware RNG for arch_get_random_seed_* not
arch_get_random_*")
Signed-off-by: Jon DeVree
---
arch/powerpc/include/asm/a
On Wed, 6 Mar 2019 12:12:06 +0100
Patrick Havelange wrote:
> This driver exposes the counter for the quadrature decoder of the
> FlexTimer Module, present in the LS1021A soc.
>
> Signed-off-by: Patrick Havelange
A few really trivial bits inline to add to William's feedback.
Otherwise I'm happy
On Thu, 7 Mar 2019 20:42:16 +0900
William Breathitt Gray wrote:
> On Wed, Mar 06, 2019 at 12:12:07PM +0100, Patrick Havelange wrote:
> > This adds documentation for the specific prescaler entry.
> >
> > Signed-off-by: Patrick Havelange
> > ---
> > Changes v2
> > - Add doc for prescaler entry
>
When called within pcibios_sriov_enable(), the pci_sriov_get_totalvfs(pdev)
returns zero, because the device is yet preparing to enable the VFs.
With this patch it becomes possible to enable VFs via sysfs "sriov_numvfs"
on PowerNV.
Signed-off-by: Sergey Miroshnichenko
---
arch/powerpc/include/a
Writing a new value to the PCI_SECONDARY_BUS register of the bridge means
that its children will become addressable on another address (new B in BDF)
or even un-addressable if the secondary bus is set to zero.
On PowerNV, device PEs are heavily BDF-dependent, so they must be updated
on every such
If supported by the platform, endpoint's pci_dn can be created dynamically,
without need to wait for DT updates from the firmware.
Signed-off-by: Sergey Miroshnichenko
---
arch/powerpc/kernel/pci_dn.c | 6 --
arch/powerpc/platforms/powernv/eeh-powernv.c | 2 +-
2 files change
When the pci=realloc command line switch is enabled (which should only be
set when working on on top of the skiboot with the "core/pci: Sync VFs and
the changes of bdfns between the firmware and the OS" patch serie applied),
PowerNV will not depend on PCIe topology info from DT anymore.
This makes
Reading an empty slot returns all ones, which triggers a false
EEH error event on PowerNV. This patch unfreezes the bus where
it has happened.
Signed-off-by: Sergey Miroshnichenko
---
arch/powerpc/include/asm/ppc-pci.h | 1 +
arch/powerpc/kernel/pci_dn.c | 2 +-
arch/powerpc/platform
It is possible now to allocate and fill a new pdn with add_one_dev_pci_data
Signed-off-by: Sergey Miroshnichenko
---
arch/powerpc/kernel/pci_dn.c | 38 +++-
1 file changed, 16 insertions(+), 22 deletions(-)
diff --git a/arch/powerpc/kernel/pci_dn.c b/arch/powerpc
If a struct pci_dn hasn't yet been created for the PCIe device (there was
no DT node for it), allocate this structure and fill with info read from
the device directly.
Signed-off-by: Sergey Miroshnichenko
---
arch/powerpc/kernel/pci_dn.c | 88 ++--
1 file changed,
This patchset allows switching from the pnv_php module to the standard
pciehp driver for PCIe hotplug functionality, if the platform supports it:
PowerNV working on on top of the skiboot with the "core/pci: Sync VFs and
the changes of bdfns between the firmware and the OS" [1] patch serie
applied.
To fetch an updated DT for the newly hotplugged device, OS must explicitly
request it from the firmware via the pnv_php driver.
If pnv_php wasn't triggered/loaded, it is still possible to discover new
devices if PCIe I/O will not stop in absence of the pci_dn structure.
Signed-off-by: Sergey Miro
On Thu, Mar 7, 2019 at 12:32 PM William Breathitt Gray
wrote:
> > +/*
> > + * take mutex
> > + * call ftm_clear_write_protection
> > + * update settings
> > + * call ftm_set_write_protection
> > + * release mutex
> > + */
>
> Jonathan mentioned it before in the previous review, and I think I agree
Le 08/03/2019 à 02:16, Michael Ellerman a écrit :
From: Christophe Leroy
This patch implements a framework for Kernel Userspace Access
Protection.
Then subarches will have the possibility to provide their own
implementation by providing setup_kuap() and
allow/prevent_user_access().
Some pl
Hi Bhupesh,
On 03/10/19 at 03:34pm, Bhupesh Sharma wrote:
> Changes since v1:
>
> - v1 was sent out as a single patch which can be seen here:
> http://lists.infradead.org/pipermail/kexec/2019-February/022411.html
>
> - v2 breaks the single patch into two independent patches:
>
This patch implements Kernel Userspace Access Protection for
book3s/32.
Due to limitations of the processor page protection capabilities,
the protection is only against writing. read protection cannot be
achieved using page protection.
The previous patch modifies the page protection so that RW us
Since the 8xx implements hardware page table walk assistance,
the PGD entries always point to a 4k aligned page, so the 2 upper
bits of the APG are not clobbered anymore and remain 0. Therefore
only APG0 and APG1 are used and need a definition. We set the
other APG to the lowest permission level.
This patch prepares Kernel Userspace Access Protection for
book3s/32.
Due to limitations of the processor page protection capabilities,
the protection is only against writing. read protection cannot be
achieved using page protection.
book3s/32 provides the following values for PP bits:
PP00 prov
This patch adds Kernel Userspace Access Protection on the 8xx.
When a page is RO or RW, it is set RO or RW for Key 0 and NA
for Key 1.
Up to now, the User group is defined with Key 0 for both User and
Supervisor.
By changing the group to Key 0 for User and Key 1 for Supervisor,
this patch preven
To implement Kernel Userspace Execution Prevention, this patch
sets NX bit on all user segments on kernel entry and clears NX bit
on all user segments on kernel exit.
Note that powerpc 601 doesn't have the NX bit, so KUEP will not
work on it. A warning is displayed at startup.
Signed-off-by: Chri
This patch adds Kernel Userspace Execution Prevention on the 8xx.
When a page is Executable, it is set Executable for Key 0 and NX
for Key 1.
Up to now, the User group is defined with Key 0 for both User and
Supervisor.
By changing the group to Key 0 for User and Key 1 for Supervisor,
this patch
syscalls are from user only, so we can account time without checking
whether returning to kernel or user as it will only be user.
Signed-off-by: Christophe Leroy
---
arch/powerpc/kernel/entry_32.S | 5 -
1 file changed, 5 deletions(-)
diff --git a/arch/powerpc/kernel/entry_32.S b/arch/power
This patch adds ASM macros for saving, restoring and checking
the KUAP state, and modifies setup_32 to call them on exceptions
from kernel.
The macros are defined as empty by default for when CONFIG_PPC_KUAP
is not selected and/or for platforms which don't handle (yet) KUAP.
Signed-off-by: Christ
This is a squash of the v5 series, not intended to be merged.
Signed-off-by: Christophe Leroy
---
Documentation/admin-guide/kernel-parameters.txt | 4 +-
arch/powerpc/include/asm/book3s/64/kup-radix.h | 119
arch/powerpc/include/asm/exception-64s.h| 2 +
arc
This series intend to implement Kernel Userspace protection for PPC32.
It comes on top of the v5 series for Radix.
The first patch of the series is a fix which is expected to be merged soon.
The second patch is a squash of Russel/Michael series for Radix.
Tested on:
- 8xx
- 83xx (ie book3s32 with
Not only the 603 but all 6xx need SPRN_SPRG_PGDIR to be initialised at
startup. This patch move it from __setup_cpu_603() to start_here()
and __secondary_start(), close to the initialisation of SPRN_THREAD.
Previously, virt addr of PGDIR was retrieved from thread struct.
Now that it is the phys ad
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