Hi All,
Could you please test Christoph's kernel on your PASEMI and NXP boards?
Download:
'git clone git://git.infradead.org/users/hch/misc.git -b powerpc-dma.5 a'
Thanks,
Christian
On Mon, Dec 03, 2018 at 04:52:02PM +0100, Florian Weimer wrote:
> * Ram Pai:
>
> > So the problem is as follows:
> >
> > Currently the kernel supports 'disable-write' and 'disable-access'.
> >
> > On x86, cpu supports 'disable-write' and 'disable-access'. This
> > matches with what the kernel su
On 4/12/18 4:11 pm, Russell Currey wrote:
From what I've seen, every time this warning comes up it's bogus,
so let's ignore it.
Signed-off-by: Russell Currey
Reviewed-by: Andrew Donnellan
---
arch/powerpc/tools/checkpatch.sh | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/powe
>From what I've seen, every time this warning comes up it's bogus,
so let's ignore it.
Signed-off-by: Russell Currey
---
arch/powerpc/tools/checkpatch.sh | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/powerpc/tools/checkpatch.sh b/arch/powerpc/tools/checkpatch.sh
index 1fad3fb90e7c..3c
On 03-12-18, 15:32, Rob Herring wrote:
> Convert SPEAr SoC bindings to DT schema format using json-schema.
>
> Cc: Viresh Kumar
> Cc: Shiraz Hashim
> Cc: Mark Rutland
> Cc: devicet...@vger.kernel.org
> Signed-off-by: Rob Herring
> ---
> .../devicetree/bindings/arm/spear.txt | 26 -
Mathieu Malaterre writes:
> On Sat, Nov 17, 2018 at 11:29 AM Christophe Leroy
> wrote:
>>
>> Today we have:
>>
>> config PPC_BOOK3S_32
>> bool "512x/52xx/6xx/7xx/74xx/82xx/83xx/86xx"
>> [depends on PPC32 within a choice]
>>
>> config PPC_BOOK3S
>> def_bool y
>> dep
On Tue, Dec 04, 2018 at 08:43:47AM +1030, Joel Stanley wrote:
> On Tue, 4 Dec 2018 at 05:15, Nick Desaulniers wrote:
> > > > > +ifdef CONFIG_CC_IS_CLANG
> > > > > +# clang ppc port does not yet support -maltivec when -msoft-float is
> > > > > +# enabled. A future release of clang will resolve this
When building a 32 bit powerpc kernel with Binutils 2.31.1 this warning
is emitted:
powerpc-linux-gnu-ld: warning: orphan section `.branch_lt' from
`arch/powerpc/kernel/head_44x.o' being placed in section `.branch_lt'
As of binutils commit 2d7ad24e8726 ("Support PLT16 relocs against local
symbo
Alan Modra explains:
> Likely you could discard .interp > and .dynstr too, and .dynsym when
> !CONFIG_PPC32.
Discarding of interp and dynstr happened in a previous patch. The dynsym
cleanup was a bit less straightforward, so it gets it's own patch.
Signed-off-by: Joel Stanley
---
See
https:
Building the ppc64 kernel with a modern binutils results in this
warning:
powerpc64le-linux-gnu-ld: warning: orphan section `.gnu.hash' from
`linker stubs' being placed in section `.gnu.hash'
Alan Modra explains:
> .gnu.hash, like .hash, is used by glibc ld.so for dynamic symbol
> lookup.
v2 pulls in the branch_lt patch too. No changes to the first two
patches.
Joel Stanley (3):
powerpc: Discard more sections in linker script
powerpc: Discard dynsym section for !PPC32
powerpc: Discard .branch_lt section
arch/powerpc/kernel/vmlinux.lds.S | 15 +--
1 file changed,
Ram Pai writes:
> At fork(), the pkey tracking information is not copied over
> to the mm_struct of the child. This can cause the child to erroneously
> allocate keys that were already allocated. Any allocated execute-only
> key is lost aswell.
>
> Add code; called by dup_mmap(), to copy the pk
Alan Modra explains:
> Likely you could discard .interp > and .dynstr too, and .dynsym when
> !CONFIG_PPC32.
Discarding of interp and dynstr happened in a previous patch. The dynsym
cleanup was a bit less straightforward, so it gets it's own patch.
Signed-off-by: Joel Stanley
---
See
https:
Building the ppc64 kernel with a modern binutils results in this
warning:
powerpc64le-linux-gnu-ld: warning: orphan section `.gnu.hash' from
`linker stubs' being placed in section `.gnu.hash'
Alan Modra explains:
> .gnu.hash, like .hash, is used by glibc ld.so for dynamic symbol
> lookup.
Joel Stanley (2):
powerpc: Discard more sections in linker script
powerpc: Discard dynsym section for !PPC32
arch/powerpc/kernel/vmlinux.lds.S | 13 -
1 file changed, 8 insertions(+), 5 deletions(-)
--
2.19.1
On Tue, Dec 04, 2018 at 09:37:46AM +1030, Joel Stanley wrote:
> The add_ss, sub_ddmmss, umul_ppmm and udiv_qrnnd macros originate
> from GCC's longlong.h which in turn was copied from GMP's longlong.h a
> few decades ago.
>
> This was found when compiling with clang:
>
>arch/powerpc/math-
On Mon, Dec 3, 2018 at 3:07 PM Joel Stanley wrote:
>
> The add_ss, sub_ddmmss, umul_ppmm and udiv_qrnnd macros originate
> from GCC's longlong.h which in turn was copied from GMP's longlong.h a
> few decades ago.
>
> This was found when compiling with clang:
>
>arch/powerpc/math-emu/fnmsub
On Sun, 18 Nov 2018 at 21:52, Alan Modra wrote:
>
> On Wed, Nov 14, 2018 at 09:20:23PM +1100, Michael Ellerman wrote:
> > Joel Stanley writes:
> > > Hello Alan,
> > >
> > > On Tue, 12 Jun 2018 at 07:44, Stephen Rothwell
> > > wrote:
> > >
> > >> Building Linus' tree, today's linux-next build (p
The add_ss, sub_ddmmss, umul_ppmm and udiv_qrnnd macros originate
from GCC's longlong.h which in turn was copied from GMP's longlong.h a
few decades ago.
This was found when compiling with clang:
arch/powerpc/math-emu/fnmsub.c:46:2: error: invalid use of a cast in a
inline asm context r
On Mon, Dec 3, 2018 at 2:14 PM Joel Stanley wrote:
>
> On Tue, 4 Dec 2018 at 05:15, Nick Desaulniers wrote:
> > > > > +ifdef CONFIG_CC_IS_CLANG
> > > > > +# clang ppc port does not yet support -maltivec when -msoft-float is
> > > > > +# enabled. A future release of clang will resolve this
> > > >
On 12/03/2018 02:26 PM, Sandipan Das wrote:
> Hi Daniel,
>
> On 03/12/18 6:18 PM, Daniel Borkmann wrote:
>>
>> Thanks for the patch, just to clarify, it's targeted at bpf-next and
>> not bpf, correct?
>
> This patch is targeted at the bpf tree.
Ok, thanks for clarifying, applied to bpf!
On Tue, 4 Dec 2018 at 05:15, Nick Desaulniers wrote:
> > > > +ifdef CONFIG_CC_IS_CLANG
> > > > +# clang ppc port does not yet support -maltivec when -msoft-float is
> > > > +# enabled. A future release of clang will resolve this
> > > > +# https://bugs.llvm.org/show_bug.cgi?id=31177
> > > > +CFLAG
Hi,
On Thu, Nov 29, 2018 at 07:00:16PM +, Christophe Leroy wrote:
> This patch reworks mmu_mapin_ram() to be more generic and map as much
> blocks as possible. It now supports blocks not starting at address 0.
>
> It scans DBATs array to find free ones instead of forcing the use of
> BAT2 and
Convert ZTE SoC bindings to DT schema format using json-schema.
Cc: Jun Nie
Cc: Mark Rutland
Cc: linux-arm-ker...@lists.infradead.org
Cc: devicet...@vger.kernel.org
Acked-by: Shawn Guo
Signed-off-by: Rob Herring
---
Documentation/devicetree/bindings/arm/zte.txt | 14 --
.../devicetree
From: Michal Simek
Add missing description for Ultra96, zcu104, zcu106 and zcu111.
Signed-off-by: Michal Simek
Signed-off-by: Rob Herring
---
.../devicetree/bindings/arm/xilinx.yaml | 32 +++
1 file changed, 32 insertions(+)
diff --git a/Documentation/devicetree/binding
Convert Xilinx SoC bindings to DT schema format using json-schema.
Cc: Mark Rutland
Cc: Michal Simek
Cc: devicet...@vger.kernel.org
Cc: linux-arm-ker...@lists.infradead.org
Signed-off-by: Rob Herring
---
.../devicetree/bindings/arm/xilinx.txt| 83 ---
.../devicetree/bin
Convert VIA SoC bindings to DT schema format using json-schema.
Cc: Tony Prisk
Cc: Mark Rutland
Cc: devicet...@vger.kernel.org
Signed-off-by: Rob Herring
---
.../devicetree/bindings/arm/vt8500.txt| 22 --
.../devicetree/bindings/arm/vt8500.yaml | 23 ++
Convert Tegra SoC bindings to DT schema format using json-schema.
Cc: Mark Rutland
Cc: Thierry Reding
Cc: Jonathan Hunter
Cc: devicet...@vger.kernel.org
Cc: linux-te...@vger.kernel.org
Signed-off-by: Rob Herring
---
.../devicetree/bindings/arm/tegra.txt | 65 ---
.../devicetr
Convert ST STi SoC bindings to DT schema format using json-schema.
Cc: Patrice Chotard
Cc: Mark Rutland
Cc: devicet...@vger.kernel.org
Signed-off-by: Rob Herring
---
Documentation/devicetree/bindings/arm/sti.txt | 23 ---
.../devicetree/bindings/arm/sti.yaml | 23 +
Convert SPEAr SoC bindings to DT schema format using json-schema.
Cc: Viresh Kumar
Cc: Shiraz Hashim
Cc: Mark Rutland
Cc: devicet...@vger.kernel.org
Signed-off-by: Rob Herring
---
.../devicetree/bindings/arm/spear.txt | 26 ---
.../devicetree/bindings/arm/spear.yaml
Convert CSR SiRF SoC bindings to DT schema format using json-schema.
Cc: Mark Rutland
Cc: Barry Song
Cc: devicet...@vger.kernel.org
Cc: linux-arm-ker...@lists.infradead.org
Signed-off-by: Rob Herring
---
.../devicetree/bindings/arm/sirf.txt | 11
.../devicetree/bindings/arm/s
Convert Renesas SoC bindings to DT schema format using json-schema.
Cc: Simon Horman
Cc: Magnus Damm
Cc: Mark Rutland
Cc: linux-renesas-...@vger.kernel.org
Cc: devicet...@vger.kernel.org
Signed-off-by: Rob Herring
---
.../devicetree/bindings/arm/shmobile.txt | 151
.../devic
In preparation to convert board-level bindings to json-schema, move
various misc SoC bindings out to their own file.
Cc: Mark Rutland
Cc: Simon Horman
Cc: Magnus Damm
Cc: devicet...@vger.kernel.org
Cc: linux-renesas-...@vger.kernel.org
Signed-off-by: Rob Herring
---
.../devicetree/bindings/ar
Convert Realtek SoC bindings to DT schema format using json-schema.
Cc: "Andreas Färber"
Cc: Mark Rutland
Cc: linux-arm-ker...@lists.infradead.org
Cc: devicet...@vger.kernel.org
Signed-off-by: Rob Herring
---
.../devicetree/bindings/arm/realtek.txt | 22 --
.../devicetree
Convert Rockchip SoC bindings to DT schema format using json-schema.
Cc: Mark Rutland
Cc: Heiko Stuebner
Cc: devicet...@vger.kernel.org
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-rockc...@lists.infradead.org
Signed-off-by: Rob Herring
---
.../devicetree/bindings/arm/rockchip.txt |
Convert QCom SoC bindings to DT schema format using json-schema.
Cc: Andy Gross
Cc: David Brown
Cc: Mark Rutland
Cc: devicet...@vger.kernel.org
Signed-off-by: Rob Herring
---
.../devicetree/bindings/arm/qcom.txt | 57
.../devicetree/bindings/arm/qcom.yaml | 125
Convert Oxford Semi SoC bindings to DT schema format using json-schema.
Cc: Mark Rutland
Cc: Neil Armstrong
Cc: devicet...@vger.kernel.org
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-ox...@groups.io
Signed-off-by: Rob Herring
---
.../devicetree/bindings/arm/oxnas.txt | 14 --
Convert TI NSpire SoC bindings to DT schema format using json-schema.
Cc: Mark Rutland
Cc: devicet...@vger.kernel.org
Signed-off-by: Rob Herring
---
.../devicetree/bindings/arm/nspire.txt| 14 ---
.../devicetree/bindings/arm/ti/nspire.yaml| 24 +++
2 files ch
Convert MediaTek SoC bindings to DT schema format using json-schema.
Cc: Mark Rutland
Cc: Matthias Brugger
Cc: devicet...@vger.kernel.org
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-media...@lists.infradead.org
Signed-off-by: Rob Herring
---
.../devicetree/bindings/arm/mediatek.txt
Convert Freescale SoC bindings to DT schema format using json-schema.
Cc: Shawn Guo
Cc: Mark Rutland
Cc: devicet...@vger.kernel.org
Signed-off-by: Rob Herring
---
.../devicetree/bindings/arm/armadeus.txt | 6 -
Documentation/devicetree/bindings/arm/bhf.txt | 6 -
.../bindings/arm/comp
Convert TI Davinci SoC bindings to DT schema format using json-schema.
Cc: Sekhar Nori
Cc: Kevin Hilman
Cc: Mark Rutland
Cc: devicet...@vger.kernel.org
Signed-off-by: Rob Herring
---
.../devicetree/bindings/arm/davinci.txt | 25 --
.../bindings/arm/ti/ti,davinci.yaml
Convert Calxeda SoC bindings to DT schema format using json-schema.
Cc: Mark Rutland
Cc: devicet...@vger.kernel.org
Signed-off-by: Rob Herring
---
.../devicetree/bindings/arm/calxeda.txt | 15 -
.../devicetree/bindings/arm/calxeda.yaml | 22 +++
2 files ch
Convert Atmel SoC bindings to DT schema format using json-schema.
Cc: Mark Rutland
Cc: Nicolas Ferre
Cc: Alexandre Belloni
Cc: devicet...@vger.kernel.org
Cc: linux-arm-ker...@lists.infradead.org
Signed-off-by: Rob Herring
---
.../devicetree/bindings/arm/atmel-at91.txt| 72 --
...
Convert Amlogic SoC bindings to DT schema format using json-schema.
Cc: Carlo Caione
Cc: Kevin Hilman
Cc: Mark Rutland
Cc: devicet...@vger.kernel.org
Signed-off-by: Rob Herring
---
.../devicetree/bindings/arm/amlogic.txt | 109 --
.../devicetree/bindings/arm/amlogic.yaml
It is best practice to have 1 binding per file, so board level bindings
should be separate for various misc SoC bindings.
Cc: Mark Rutland
Cc: Carlo Caione
Cc: Kevin Hilman
Cc: devicet...@vger.kernel.org
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-amlo...@lists.infradead.org
Signed-off-b
Convert Altera SoC bindings to DT schema format using json-schema.
Cc: Mark Rutland
Cc: Dinh Nguyen
Cc: devicet...@vger.kernel.org
Signed-off-by: Rob Herring
---
.../devicetree/bindings/arm/altera.txt| 14 -
.../devicetree/bindings/arm/altera.yaml | 20 +++
Convert Alpine SoC bindings to DT schema format using json-schema.
Cc: Tsahee Zidenberg
Cc: Antoine Tenart
Cc: Mark Rutland
Cc: devicet...@vger.kernel.org
Signed-off-by: Rob Herring
---
.../devicetree/bindings/arm/al,alpine.txt | 16 --
.../devicetree/bindings/arm/al,alpine.ya
Convert Actions Semi SoC bindings to DT schema format using json-schema.
Cc: "Andreas Färber"
Cc: Manivannan Sadhasivam
Cc: Mark Rutland
Cc: linux-arm-ker...@lists.infradead.org
Cc: devicet...@vger.kernel.org
Signed-off-by: Rob Herring
---
.../devicetree/bindings/arm/actions.txt | 56 --
Convert ARM Primecell binding to DT schema format using json-schema.
Cc: Mark Rutland
Cc: devicet...@vger.kernel.org
Signed-off-by: Rob Herring
---
.../devicetree/bindings/arm/primecell.txt | 46 ---
.../devicetree/bindings/arm/primecell.yaml| 36 +++
2 files
Convert ARM PMU binding to DT schema format using json-schema.
Cc: Will Deacon
Cc: Mark Rutland
Cc: linux-arm-ker...@lists.infradead.org
Cc: devicet...@vger.kernel.org
Signed-off-by: Rob Herring
---
Documentation/devicetree/bindings/arm/pmu.txt | 70 --
.../devicetree/bindings/arm/
Convert ARM CPU binding to DT schema format using json-schema.
Cc: Mark Rutland
Cc: Matthias Brugger
Cc: devicet...@vger.kernel.org
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-media...@lists.infradead.org
Signed-off-by: Rob Herring
---
.../devicetree/bindings/arm/cpus.txt | 490
Convert ARM timers to DT schema format using json-schema.
Cc: Daniel Lezcano
Cc: Thomas Gleixner
Cc: Mark Rutland
Cc: devicet...@vger.kernel.org
Signed-off-by: Rob Herring
---
.../bindings/timer/arm,arch_timer.txt | 112
.../bindings/timer/arm,arch_timer.yaml|
Convert the i2c-gpio binding to DT schema format using json-schema. This
serves as an example of how to include other schema (i2c-controller.yaml
in this case).
Signed-off-by: Rob Herring
---
.../devicetree/bindings/i2c/i2c-gpio.txt | 46
.../devicetree/bindings/i2c/i2c-gpio.ya
Convert Altera clkmgr to DT schema format using json-schema.
Cc: Mark Rutland
Cc: Dinh Nguyen
Cc: devicet...@vger.kernel.org
Signed-off-by: Rob Herring
---
.../arm/altera/socfpga-clk-manager.txt| 11 ---
.../arm/altera/socfpga-clk-manager.yaml | 31 +++
2 file
Convert trivial-devices.txt to DT schema format using json-schema.
Cc: Mark Rutland
Cc: devicet...@vger.kernel.org
Signed-off-by: Rob Herring
---
.../devicetree/bindings/trivial-devices.txt | 190 -
.../devicetree/bindings/trivial-devices.yaml | 392 ++
2 files change
Add a how-to doc on writing DT schema documentation. This gives a
description of each section and details on how to validate the DT schema
file. The DT schema are written using json-schema vocabulary in a YAML
encoded document. Using jsonschema gives us access to existing tooling.
A YAML encoding g
This adds the build infrastructure for checking DT binding schema
documents and validating dts files using the binding schema.
Check DT binding schema documents:
make dt_binding_check
Build dts files and check using DT binding schema:
make dtbs_check
Optionally, DT_SCHEMA_FILES can passed in wit
The current DT binding documentation is not ideal as it is just free form
text with at most only a loose structure. This makes reviewing bindings a
manual process. The bindings are often duplicating information that's
already defined elsewhere and missing information one would need to
validate a
On Sat, Nov 17, 2018 at 11:29 AM Christophe Leroy
wrote:
>
> Today we have:
>
> config PPC_BOOK3S_32
> bool "512x/52xx/6xx/7xx/74xx/82xx/83xx/86xx"
> [depends on PPC32 within a choice]
>
> config PPC_BOOK3S
> def_bool y
> depends on PPC_BOOK3S_32 || PPC_BOOK3S_64
>
On Mon, 2018-11-26 at 17:56 +0530, Anshuman Khandual wrote:
> At present there are multiple places where invalid node number is encoded
> as -1. Even though implicitly understood it is always better to have macros
> in there. Replace these open encodings for an invalid node number with the
> global
[...]
>>>
>>> + if (type == MEMORY_BLOCK_NONE)
>>> + return -EINVAL;
>>
>> No one will pass in this value. Can we omit this check for now?
>
>I could move it to patch nr 2 I guess, but as I introduce
>MEMORY_BLOCK_NONE here it made sense to keep it in here.
>
Yes, this make sense to m
At fork(), the pkey tracking information is not copied over
to the mm_struct of the child. This can cause the child to erroneously
allocate keys that were already allocated. Any allocated execute-only
key is lost aswell.
Add code; called by dup_mmap(), to copy the pkey state from
parent to child e
On Mon, Dec 3, 2018 at 2:24 AM Joel Stanley wrote:
>
> On Sat, 3 Nov 2018 at 04:04, Nick Desaulniers wrote:
> >
> > On Thu, Nov 1, 2018 at 5:45 PM Joel Stanley wrote:
> > >
> > > We cannot build these files with clang as it does not allow altivec
> > > instructions in assembly when -msoft-float
On Mon, Dec 03, 2018 at 05:06:42PM +, Christophe Leroy wrote:
> In the powerpc, there are several places implementing safe
> access to user data. This is sometimes implemented using
> probe_kernel_address() with additional access_ok() verification,
> sometimes with get_user() enclosed in a page
Le 16/11/2018 à 11:20, Michael Ellerman a écrit :
Christophe LEROY writes:
Le 15/11/2018 à 12:46, Michael Ellerman a écrit :
Christophe Leroy writes:
This patch adds a debugfs file to dump block address translation:
~# cat /sys/kernel/debug/block_address_translation
My instinct is it
This patch adds a debugfs file to dump block address translation:
~# cat /sys/kernel/debug/powerpc/block_address_translation
---[ Instruction Block Address Translations ]---
0: -
1: -
2: 0xc000-0xcfff 0x Kernel EXEC coherent
3: 0xd000-0xdfff 0x1000 Kerne
Le 19/10/2018 à 17:42, Kees Cook a écrit :
On Fri, Oct 19, 2018 at 8:14 AM, Christophe Leroy
wrote:
In the powerpc, there are several places implementing safe
access to user data. This is sometimes implemented using
probe_kerne_address() with additional access_ok() verification,
sometimes wi
Instead of opencoding, use probe_user_read() and probe_user_address()
to failessly read a user location.
Signed-off-by: Christophe Leroy
---
arch/powerpc/kernel/process.c | 12 +---
arch/powerpc/mm/fault.c | 6 +-
arch/powerpc/perf/callchain.c | 20 +++-
In the powerpc, there are several places implementing safe
access to user data. This is sometimes implemented using
probe_kernel_address() with additional access_ok() verification,
sometimes with get_user() enclosed in a pagefault_disable()/enable()
pair, etc... :
show_user_instructions()
b
On Mon, Dec 03, 2018 at 10:27:02AM -0600, Rob Herring wrote:
> On Mon, Dec 3, 2018 at 9:48 AM Mike Rapoport wrote:
> >
> > On arm and unicore32i the early_alloc_aligned() and and early_alloc() are
> > oneliner wrappers for memblock_alloc.
> >
> > Replace their usage with direct call to memblock_al
On Mon, Dec 03, 2018 at 05:29:08PM +0100, Sam Ravnborg wrote:
> Hi Mike.
>
> > index c37955d..2a17665 100644
> > --- a/arch/sparc/kernel/prom_64.c
> > +++ b/arch/sparc/kernel/prom_64.c
> > @@ -34,16 +34,13 @@
> >
> > void * __init prom_early_alloc(unsigned long size)
> > {
> > - unsigned lon
Hi Mike.
> index c37955d..2a17665 100644
> --- a/arch/sparc/kernel/prom_64.c
> +++ b/arch/sparc/kernel/prom_64.c
> @@ -34,16 +34,13 @@
>
> void * __init prom_early_alloc(unsigned long size)
> {
> - unsigned long paddr = memblock_phys_alloc(size, SMP_CACHE_BYTES);
> - void *ret;
> +
On Mon, Dec 03, 2018 at 05:10:52PM +0100, Sam Ravnborg wrote:
> Hi Mike.
>
> On Mon, Dec 03, 2018 at 05:47:12PM +0200, Mike Rapoport wrote:
> > Rather than use the memblock_alloc_base that returns a physical address and
> > then convert this address to the virtual one, use appropriate memblock
> >
On Mon, Dec 3, 2018 at 9:48 AM Mike Rapoport wrote:
>
> On arm and unicore32i the early_alloc_aligned() and and early_alloc() are
> oneliner wrappers for memblock_alloc.
>
> Replace their usage with direct call to memblock_alloc.
>
> Suggested-by: Christoph Hellwig
> Signed-off-by: Mike Rapoport
Hi Mike.
On Mon, Dec 03, 2018 at 05:47:12PM +0200, Mike Rapoport wrote:
> Rather than use the memblock_alloc_base that returns a physical address and
> then convert this address to the virtual one, use appropriate memblock
> function that returns a virtual address.
>
> There is a small functional
On Tue, Nov 27, 2018 at 09:38:36AM -0800, Douglas Anderson wrote:
> The function kgdb_roundup_cpus() was passed a parameter that was
> documented as:
>
> > the flags that will be used when restoring the interrupts. There is
> > local_irq_save() call before kgdb_roundup_cpus().
>
> Nobody used tho
On Tue, Nov 27, 2018 at 09:38:37AM -0800, Douglas Anderson wrote:
> When I had lockdep turned on and dropped into kgdb I got a nice splat
> on my system. Specifically it hit:
> DEBUG_LOCKS_WARN_ON(current->hardirq_context)
>
> Specifically it looked like this:
> sysrq: SysRq : DEBUG
> -
* Ram Pai:
> So the problem is as follows:
>
> Currently the kernel supports 'disable-write' and 'disable-access'.
>
> On x86, cpu supports 'disable-write' and 'disable-access'. This
> matches with what the kernel supports. All good.
>
> However on power, cpu supports 'disable-read' too. Since u
Rather than use the memblock_alloc_base that returns a physical address and
then convert this address to the virtual one, use appropriate memblock
function that returns a virtual address.
There is a small functional change in the allocation of then NODE_DATA().
Instead of panicing if the local all
There are several early memory allocations in arch/ code that use
memblock_phys_alloc() to allocate memory, convert the returned physical
address to the virtual address and then set the allocated memory to zero.
Exactly the same behaviour can be achieved simply by calling
memblock_alloc(): it allo
On arm and unicore32i the early_alloc_aligned() and and early_alloc() are
oneliner wrappers for memblock_alloc.
Replace their usage with direct call to memblock_alloc.
Suggested-by: Christoph Hellwig
Signed-off-by: Mike Rapoport
---
arch/arm/mm/mmu.c | 11 +++
arch/unicore32/mm/m
The pte_alloc_one_kernel() function allocates a page using
__get_free_page(GFP_KERNEL) when mm initialization is complete and
memblock_phys_alloc() on the earlier stages. The physical address of the
page allocated with memblock_phys_alloc() is converted to the virtual
address and in the both cases
There are a several places that allocate memory using memblock APIs that
return a physical address, convert the returned address to the virtual
address and frequently also memset(0) the allocated range.
Update these places to use memblock allocators already returning a virtual
address; use membloc
Hi,
These patches simplify some of the early memory allocations by replacing
usage of older memblock APIs with newer and shinier ones.
Quite a few places in the arch/ code allocated memory using a memblock API
that returns a physical address of the allocated area, then converted this
physical add
Rather than use the memblock_alloc_base that returns a physical address and
then convert this address to the virtual one, use appropriate memblock
function that returns a virtual address.
Signed-off-by: Mike Rapoport
---
arch/microblaze/mm/init.c | 5 +++--
1 file changed, 3 insertions(+), 2 del
The ipic_info[] array only has 95 elements so I have made the bounds
check smaller to prevent a read overflow. It was Smatch that found
this issue:
arch/powerpc/sysdev/ipic.c:784 ipic_set_priority()
error: buffer overflow 'ipic_info' 95 <= 127
Signed-off-by: Dan Carpenter
---
I wasn't a
On Mon, Dec 3, 2018 at 6:40 AM Will Deacon wrote:
>
> On Fri, Nov 30, 2018 at 12:00:05PM -0600, Rob Herring wrote:
> > On Thu, Nov 8, 2018 at 2:49 AM Michal Simek wrote:
> > >
> > > Hi Rob,
> > >
> > > On 05. 10. 18 18:58, Rob Herring wrote:
> > > > Convert ARM CPU binding to DT schema format usi
Hi Daniel,
On 03/12/18 6:18 PM, Daniel Borkmann wrote:
>
> Thanks for the patch, just to clarify, it's targeted at bpf-next and
> not bpf, correct?
>
This patch is targeted at the bpf tree.
This depends on commit e2c95a61656d ("bpf, ppc64: generalize fetching
subprog into bpf_jit_get_func_addr
Hi Sandipan,
On 12/03/2018 01:21 PM, Sandipan Das wrote:
> Once the JITed images for each function in a multi-function program
> are generated after the first three JIT passes, we only need to fix
> the target address for the branch instruction corresponding to each
> bpf-to-bpf function call.
>
On Fri, Nov 30, 2018 at 12:00:05PM -0600, Rob Herring wrote:
> On Thu, Nov 8, 2018 at 2:49 AM Michal Simek wrote:
> >
> > Hi Rob,
> >
> > On 05. 10. 18 18:58, Rob Herring wrote:
> > > Convert ARM CPU binding to DT schema format using json-schema.
> > >
> > > Cc: Mark Rutland
> > > Cc: Matthias Br
Once the JITed images for each function in a multi-function program
are generated after the first three JIT passes, we only need to fix
the target address for the branch instruction corresponding to each
bpf-to-bpf function call.
This introduces the following optimizations for reducing the work
do
This is a note to let you know that I've just added the patch titled
powerpc/function_graph: Simplify with function_graph_enter()
to the 4.19-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is
This is a note to let you know that I've just added the patch titled
powerpc/function_graph: Simplify with function_graph_enter()
to the 4.14-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is
Add the layerscape EP device support in pci_endpoint_test driver.
Signed-off-by: Xiaowei Bao
---
v2:
- no change
v3:
- no change
drivers/misc/pci_endpoint_test.c |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/drivers/misc/pci_endpoint_test.c b/drivers/misc/pci_endpo
Add the PCIe EP mode support for layerscape platform.
Signed-off-by: Xiaowei Bao
---
v2:
- remove the EP mode check function.
v3:
- modif the return value when enter default case.
drivers/pci/controller/dwc/Makefile|2 +-
drivers/pci/controller/dwc/pci-layerscape-ep.c | 146 +
Add the PCIE EP node in dts for ls1046a.
Signed-off-by: Xiaowei Bao
---
v2:
- Add the SoC specific compatibles.
v3:
- no change
arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 32
1 files changed, 32 insertions(+), 0 deletions(-)
diff --git a/arch/arm64/boot/dts/
Add the documentation for the Device Tree binding for the layerscape PCIe
controller with EP mode.
Signed-off-by: Xiaowei Bao
---
v2:
- Add the SoC specific compatibles.
v3:
- modify the commit message.
.../devicetree/bindings/pci/layerscape-pci.txt |3 +++
1 files changed, 3 insertio
On 01.12.18 02:50, Wei Yang wrote:
> On Fri, Nov 30, 2018 at 06:59:20PM +0100, David Hildenbrand wrote:
>> Let's pass a memory block type instead. Pass "MEMORY_BLOCK_NONE" for device
>> memory and for now "MEMORY_BLOCK_UNSPECIFIED" for anything else. No
>> functional change.
>
> I would suggest to
On 01.12.18 02:25, Wei Yang wrote:
> On Fri, Nov 30, 2018 at 06:59:19PM +0100, David Hildenbrand wrote:
>> Memory onlining should always be handled by user space, because only user
>> space knows which use cases it wants to satisfy. E.g. memory might be
>> onlined to the MOVABLE zone even if it can
On Sat, 3 Nov 2018 at 04:04, Nick Desaulniers wrote:
>
> On Thu, Nov 1, 2018 at 5:45 PM Joel Stanley wrote:
> >
> > We cannot build these files with clang as it does not allow altivec
> > instructions in assembly when -msoft-float is passed.
> >
> > Jinsong Ji wrote:
> > > We currently disable A
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