On Tuesday 09 October 2018 11:50 AM, Joel Stanley wrote:
On a Power9 box we get a few screens full of these on boot. Drop
them to pr_debug.
[5.993645] nest_centaur6_imc performance monitor hardware support registered
[5.993728] nest_centaur7_imc performance monitor hardware support re
On a Power9 box we get a few screens full of these on boot. Drop
them to pr_debug.
[5.993645] nest_centaur6_imc performance monitor hardware support registered
[5.993728] nest_centaur7_imc performance monitor hardware support registered
[5.996510] core_imc performance monitor hardware
On Tuesday 09 October 2018 11:24 AM, Joel Stanley wrote:
On a Power9 box we get a few screens full of these on boot. Drop
them to pr_debug.
[5.993645] nest_centaur6_imc performance monitor hardware support registered
[5.993728] nest_centaur7_imc performance monitor hardware support re
On a Power9 box we get a few screens full of these on boot. Drop
them to pr_debug.
[5.993645] nest_centaur6_imc performance monitor hardware support registered
[5.993728] nest_centaur7_imc performance monitor hardware support registered
[5.996510] core_imc performance monitor hardware
On Tue, 9 Oct 2018 06:46:30 +0200
Christophe LEROY wrote:
> Le 09/10/2018 à 06:32, Nicholas Piggin a écrit :
> > On Mon, 8 Oct 2018 17:39:11 +0200
> > Christophe LEROY wrote:
> >
> >> Hi Nick,
> >>
> >> Le 19/07/2017 à 08:59, Nicholas Piggin a écrit :
> >>> Use nmi_enter similarly to system
As several other arches including x86, this patch makes it explicit
that a bad page fault is a NULL pointer dereference when the fault
address is lower than PAGE_SIZE
Signed-off-by: Christophe Leroy
---
arch/powerpc/mm/fault.c | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
di
On Wed, 2018-10-03 at 16:10 -0700, Alexander Duyck wrote:
> > -* Because 32-bit DMA masks are so common we expect every
> > architecture
> > -* to be able to satisfy them - either by not supporting more
> > physical
> > -* memory, or by providing a ZONE_DMA32. If neither
Some stack pointers used to also be thread_info pointers
and were called tp. Now that they are only stack pointers,
rename them sp.
Signed-off-by: Christophe Leroy
---
arch/powerpc/kernel/irq.c | 17 +++--
arch/powerpc/kernel/setup_64.c | 20 ++--
2 files changed
Now that current_thread_info is located at the beginning of 'current'
task struct, CURRENT_THREAD_INFO macro is not really needed any more.
This patch replaces it by loads of the value at PACACURRENT(r13).
Signed-off-by: Christophe Leroy
---
arch/powerpc/include/asm/exception-64s.h | 4 +
The table of pointers 'current_set' has been used for retrieving
the stack and current. They used to be thread_info pointers as
they were pointing to the stack and current was taken from the
'task' field of the thread_info.
Now, the pointers of 'current_set' table are now both pointers
to task_str
Now that thread_info is similar to task_struct, it's address is in r2
so CURRENT_THREAD_INFO() macro is useless. This patch removes it.
At the same time, as the 'cpu' field is not anymore in thread_info,
this patch renames it to TASK_CPU.
Signed-off-by: Christophe Leroy
---
arch/powerpc/Makefil
thread_info is not anymore in the stack, so the entire stack
can now be used.
There is also no risk anymore of corrupting task_cpu(p) with a
stack overflow so the patch removes the test.
When doing this, an explicit test for NULL stack pointer is
needed in validate_sp() as it is not anymore impli
This patch activates CONFIG_THREAD_INFO_IN_TASK which
moves the thread_info into task_struct.
Moving thread_info into task_struct has the following advantages:
- It protects thread_info from corruption in the case of stack
overflows.
- Its address is harder to determine if stack addresses are
leak
This patch cleans the powerpc kernel before activating
CONFIG_THREAD_INFO_IN_TASK:
- The purpose of the pointer given to call_do_softirq() and
call_do_irq() is to point the new stack ==> change it to void* and
rename it 'sp'
- Don't use CURRENT_THREAD_INFO() to locate the stack.
- Fix a few comment
When moving to CONFIG_THREAD_INFO_IN_TASK, the thread_info 'cpu' field
gets moved into task_struct and only defined when CONFIG_SMP is set.
This patch ensures that TI_CPU is only used when CONFIG_SMP is set and
that task_struct 'cpu' field is not used directly out of SMP code.
Signed-off-by: Chri
When activating CONFIG_THREAD_INFO_IN_TASK, linux/sched.h
includes asm/current.h. This generates a circular dependency.
To avoid that, asm/processor.h shall not be included in mmu-hash.h
In order to do that, this patch moves into a new header called
asm/task_size_user64.h the information from asm/
The purpose of this serie is to activate CONFIG_THREAD_INFO_IN_TASK which
moves the thread_info into task_struct.
Moving thread_info into task_struct has the following advantages:
- It protects thread_info from corruption in the case of stack
overflows.
- Its address is harder to determine if stac
Le 09/10/2018 à 06:32, Nicholas Piggin a écrit :
On Mon, 8 Oct 2018 17:39:11 +0200
Christophe LEROY wrote:
Hi Nick,
Le 19/07/2017 à 08:59, Nicholas Piggin a écrit :
Use nmi_enter similarly to system reset interrupts. This uses NMI
printk NMI buffers and turns off various debugging facilit
On Tue, 2018-10-09 at 14:43 +1100, Michael Ellerman wrote:
> Joe Perches writes:
>
> > On Thu, 2018-10-04 at 19:10 +0200, Gustavo A. R. Silva wrote:
> > > Use ARRAY_SIZE instead of dividing sizeof array with sizeof an element.
> > []
> > > diff --git a/arch/powerpc/xmon/ppc-opc.c b/arch/powerpc/x
On Mon, 8 Oct 2018 17:39:11 +0200
Christophe LEROY wrote:
> Hi Nick,
>
> Le 19/07/2017 à 08:59, Nicholas Piggin a écrit :
> > Use nmi_enter similarly to system reset interrupts. This uses NMI
> > printk NMI buffers and turns off various debugging facilities that
> > helps avoid tripping on ourse
Joe Perches writes:
> On Thu, 2018-10-04 at 19:10 +0200, Gustavo A. R. Silva wrote:
>> Use ARRAY_SIZE instead of dividing sizeof array with sizeof an element.
> []
>> diff --git a/arch/powerpc/xmon/ppc-opc.c b/arch/powerpc/xmon/ppc-opc.c
> []
>> @@ -966,8 +966,7 @@ const struct powerpc_operand po
On Thu, 2018-10-04 at 19:10 +0200, Gustavo A. R. Silva wrote:
> Use ARRAY_SIZE instead of dividing sizeof array with sizeof an element.
[]
> diff --git a/arch/powerpc/xmon/ppc-opc.c b/arch/powerpc/xmon/ppc-opc.c
[]
> @@ -966,8 +966,7 @@ const struct powerpc_operand powerpc_operands[] =
>{ 0xff,
On Mon, Oct 08, 2018 at 04:30:52PM +1100, Paul Mackerras wrote:
> This streamlines the first part of the code that handles a hypervisor
> interrupt that occurred in the guest. With this, all of the real-mode
> handling that occurs is done before the "guest_exit_cont" label; once
> we get to that l
On Mon, Oct 08, 2018 at 04:31:08PM +1100, Paul Mackerras wrote:
> From: Suraj Jitindar Singh
>
> When a host (L0) page which is mapped into a (L1) guest is in turn
> mapped through to a nested (L2) guest we keep a reverse mapping (rmap)
> so that these mappings can be retrieved later.
>
> Whenev
On Mon, Oct 08, 2018 at 04:31:03PM +1100, Paul Mackerras wrote:
> This starts the process of adding the code to support nested HV-style
> virtualization. It defines a new H_SET_PARTITION_TABLE hypercall which
> a nested hypervisor can use to set the base address and size of a
> partition table in
On Mon, Oct 08, 2018 at 04:31:19PM +1100, Paul Mackerras wrote:
> This adds a KVM_PPC_NO_HASH flag to the flags field of the
> kvm_ppc_smmu_info struct, and arranges for it to be set when
> running as a nested hypervisor, as an unambiguous indication
> to userspace that HPT guests are not supported
On Mon, Oct 08, 2018 at 04:30:55PM +1100, Paul Mackerras wrote:
> This creates an alternative guest entry/exit path which is used for
> radix guests on POWER9 systems when we have indep_threads_mode=Y. In
> these circumstances there is exactly one vcpu per vcore and there is
> no coordination requ
On Mon, Oct 08, 2018 at 04:31:18PM +1100, Paul Mackerras wrote:
> With this, userspace can enable a KVM-HV guest to run nested guests
> under it.
>
> The administrator can control whether any nested guests can be run;
> setting the "nested" module parameter to false prevents any guests
> becoming
On Mon, Oct 08, 2018 at 04:31:16PM +1100, Paul Mackerras wrote:
> With this, the KVM-HV module can be loaded in a guest running under
> KVM-HV, and if the hypervisor supports nested virtualization, this
> guest can now act as a nested hypervisor and run nested guests.
>
> This also adds some check
On 10/08/18 11:46, Alan Tull wrote:
> On Mon, Oct 8, 2018 at 10:57 AM Alan Tull wrote:
>>
>> On Thu, Oct 4, 2018 at 11:14 PM wrote:
>>>
>>> From: Frank Rowand
>>>
>>> If overlay properties #address-cells or #size-cells are already in
>>> the live devicetree for any given node, then the values in
Hi Raz,
On 10/04/2018 04:41 AM, Raz wrote:
Frankly, the more I read the more perplexed I get. For example,
according to BOOK III-S, chapter 3,
the MSR bits are differ from the ones described in
arch/powerpc/include/asm/reg.h.
Bit zero, is LE, but in the book it is 64-bit mode.
Would someone be
On Mon, Oct 08, 2018 at 07:44:12PM +0300, Raz wrote:
> Both systemsim and my powerpc server boots with MSR_HV=1, i.e, hypervisor
> state.
> Is there away to fix that ? writing to the MSR cannot work according
> the documentation ( and reality ).
But that is what you do: you write HV=0 in MSR. Af
4.18-stable review patch. If anyone has any objections, please let me know.
--
From: Srikar Dronamraju
[ Upstream commit e5e96fafd9028b1478b165db78c52d981c14f471 ]
With the following commit:
051f3ca02e46 ("sched/topology: Introduce NUMA identity node sched domain")
the sch
On Mon, Oct 8, 2018 at 10:57 AM Alan Tull wrote:
>
> On Thu, Oct 4, 2018 at 11:14 PM wrote:
> >
> > From: Frank Rowand
> >
> > If overlay properties #address-cells or #size-cells are already in
> > the live devicetree for any given node, then the values in the
> > overlay must match the values i
Hi, Daniel
On Sat, Sep 29, 2018 at 9:17 PM wrote:
>
> On Thu, Sep 27, 2018 at 07:55:08PM +0300, Maksym Kokhan wrote:
> > Daniel Walker (7):
> > add generic builtin command line
> > drivers: of: ifdef out cmdline section
> > x86: convert to generic builtin command line
> > arm: convert to
On Mon, Oct 8, 2018 at 10:13 AM Geert Uytterhoeven wrote:
>
> Hi Rob,
>
> On Mon, Oct 8, 2018 at 4:57 PM Rob Herring wrote:
> > On Mon, Oct 8, 2018 at 2:47 AM Geert Uytterhoeven
> > wrote:
> > > On Fri, Oct 5, 2018 at 6:59 PM Rob Herring wrote:
> > > > Convert Renesas SoC bindings to DT schema
Both systemsim and my powerpc server boots with MSR_HV=1, i.e, hypervisor state.
Is there away to fix that ? writing to the MSR cannot work according
the documentation ( and reality ).
On Sat, Oct 6, 2018 at 3:27 PM Segher Boessenkool
wrote:
>
> On Sat, Oct 06, 2018 at 12:19:45PM +0300, Raz wro
Hi Nick,
Le 19/07/2017 à 08:59, Nicholas Piggin a écrit :
Use nmi_enter similarly to system reset interrupts. This uses NMI
printk NMI buffers and turns off various debugging facilities that
helps avoid tripping on ourselves or other CPUs.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/kern
On Thu, Oct 4, 2018 at 11:14 PM wrote:
>
> From: Frank Rowand
>
> If overlay properties #address-cells or #size-cells are already in
> the live devicetree for any given node, then the values in the
> overlay must match the values in the live tree.
Hi Frank,
I'm starting some FPGA testing on thi
This is a note to let you know that I've just added the patch titled
sched/topology: Set correct NUMA topology type
to the 4.18-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
sched-t
Hi Rob,
On Mon, Oct 8, 2018 at 4:57 PM Rob Herring wrote:
> On Mon, Oct 8, 2018 at 2:47 AM Geert Uytterhoeven
> wrote:
> > On Fri, Oct 5, 2018 at 6:59 PM Rob Herring wrote:
> > > Convert Renesas SoC bindings to DT schema format using json-schema.
> > > --- /dev/null
> > > +++ b/Documentation/
On Mon, Oct 8, 2018 at 2:05 AM Geert Uytterhoeven wrote:
>
> Hi Rob,
>
> On Fri, Oct 5, 2018 at 6:58 PM Rob Herring wrote:
> > In preparation to convert board-level bindings to json-schema, move
> > various misc SoC bindings out to their own file.
> >
> > Cc: Mark Rutland
> > Cc: Simon Horman
>
On Mon, Oct 8, 2018 at 2:47 AM Geert Uytterhoeven wrote:
>
> Hi Rob,
>
> On Fri, Oct 5, 2018 at 6:59 PM Rob Herring wrote:
> > Convert Renesas SoC bindings to DT schema format using json-schema.
> >
> > Cc: Simon Horman
> > Cc: Magnus Damm
> > Cc: Mark Rutland
> > Cc: linux-renesas-...@vger.ke
On Mon, Oct 8, 2018 at 3:02 AM Simon Horman wrote:
>
> On Fri, Oct 05, 2018 at 11:58:41AM -0500, Rob Herring wrote:
> > Convert Renesas SoC bindings to DT schema format using json-schema.
> >
> > Cc: Simon Horman
> > Cc: Magnus Damm
> > Cc: Mark Rutland
> > Cc: linux-renesas-...@vger.kernel.org
On Mon, Oct 8, 2018 at 4:45 AM Heiko Stuebner wrote:
>
> Hi Rob,
>
> either I'm misunderstanding that, or something did go a bit wrong during
> the conversion, as pointed out below:
>
> Am Freitag, 5. Oktober 2018, 18:58:40 CEST schrieb Rob Herring:
> > Convert Rockchip SoC bindings to DT schema f
On Mon, Oct 8, 2018 at 2:02 AM Shawn Guo wrote:
>
> On Fri, Oct 05, 2018 at 11:58:34AM -0500, Rob Herring wrote:
> > Convert Freescale SoC bindings to DT schema format using json-schema.
> > +properties:
> > + $nodename:
> > +const: '/'
> > + compatible:
> > +oneOf:
> > + - descrip
On 10/08/2018 11:06 AM, Michael Ellerman wrote:
Christophe Leroy writes:
The purpose of this serie is to activate CONFIG_THREAD_INFO_IN_TASK which
moves the thread_info into task_struct.
Moving thread_info into task_struct has the following advantages:
- It protects thread_info from corrup
On Fri, Oct 05, 2018 at 11:58:41AM -0500, Rob Herring wrote:
> Convert Renesas SoC bindings to DT schema format using json-schema.
>
> Cc: Simon Horman
> Cc: Magnus Damm
> Cc: Mark Rutland
> Cc: linux-renesas-...@vger.kernel.org
> Cc: devicet...@vger.kernel.org
> Signed-off-by: Rob Herring
Th
Christophe Leroy writes:
> The purpose of this serie is to activate CONFIG_THREAD_INFO_IN_TASK which
> moves the thread_info into task_struct.
>
> Moving thread_info into task_struct has the following advantages:
> - It protects thread_info from corruption in the case of stack
> overflows.
> - It
On Mon, 2018-10-08 at 09:16 +, Christophe Leroy wrote:
> The purpose of this serie is to activate CONFIG_THREAD_INFO_IN_TASK which
> moves the thread_info into task_struct.
We need to make sure we don't have code that assumes that we don't take
faults on TI access.
On ppc64, the stack SLB ent
Hi Rob,
either I'm misunderstanding that, or something did go a bit wrong during
the conversion, as pointed out below:
Am Freitag, 5. Oktober 2018, 18:58:40 CEST schrieb Rob Herring:
> Convert Rockchip SoC bindings to DT schema format using json-schema.
>
> Cc: Mark Rutland
> Cc: Heiko Stuebner
Serhii Popovych writes:
> Alexey Kardashevskiy wrote:
>> As a part of cleanup, the SPAPR TCE IOMMU subdriver releases preregistered
>> memory. If there is a bug in memory release, the loop in
>> tce_iommu_release() becomes infinite; this actually happened to me.
>>
>> This makes the loop finite a
On Mon, 2018-10-08 at 17:04 +1000, Nicholas Piggin wrote:
> On Mon, 08 Oct 2018 15:08:31 +1100
> Benjamin Herrenschmidt wrote:
>
> > HMIs will crash the kernel due to
> >
> > BRANCH_LINK_TO_FAR(hmi_exception_realmode)
> >
> > Calling into the OPD instead of the actual code.
> >
> > Signed-
Some stack pointers used to also be thread_info pointers
and were called tp. Now that they are only stack pointers,
rename them sp.
Signed-off-by: Christophe Leroy
---
arch/powerpc/kernel/irq.c | 17 +++--
arch/powerpc/kernel/setup_64.c | 20 ++--
2 files changed
Now that current_thread_info is located at the beginning of 'current'
task struct, CURRENT_THREAD_INFO macro is not really needed any more.
This patch replaces it by loads of the value at PACACURRENT(r13).
Signed-off-by: Christophe Leroy
---
arch/powerpc/include/asm/exception-64s.h | 4 +
Now that thread_info is similar to task_struct, it's address is in r2
so CURRENT_THREAD_INFO() macro is useless. This patch removes it.
At the same time, as the 'cpu' field is not anymore in thread_info,
this patch renames it to TASK_CPU.
Signed-off-by: Christophe Leroy
---
arch/powerpc/Makefil
The table of pointers 'current_set' has been used for retrieving
the stack and current. They used to be thread_info pointers as
they were pointing to the stack and current was taken from the
'task' field of the thread_info.
Now, the pointers of 'current_set' table are now both pointers
to task_str
thread_info is not anymore in the stack, so the entire stack
can now be used.
In the meantime, with the previous patch all pointers to the stacks
are not anymore pointers to thread_info so this patch changes them
to void*
Signed-off-by: Christophe Leroy
---
arch/powerpc/include/asm/irq.h
This patch activates CONFIG_THREAD_INFO_IN_TASK which
moves the thread_info into task_struct.
Moving thread_info into task_struct has the following advantages:
- It protects thread_info from corruption in the case of stack
overflows.
- Its address is harder to determine if stack addresses are
leak
This patch cleans the powerpc kernel before activating
CONFIG_THREAD_INFO_IN_TASK:
- The purpose of the pointer given to call_do_softirq() and
call_do_irq() is to point the new stack ==> change it to void* and
rename it 'sp'
- Don't use CURRENT_THREAD_INFO() to locate the stack.
- Fix a few comment
When moving to CONFIG_THREAD_INFO_IN_TASK, the thread_info 'cpu' field
gets moved into task_struct and only defined when CONFIG_SMP is set.
This patch ensures that TI_CPU is only used when CONFIG_SMP is set and
that task_struct 'cpu' field is not used directly out of SMP code.
Signed-off-by: Chri
The purpose of this serie is to activate CONFIG_THREAD_INFO_IN_TASK which
moves the thread_info into task_struct.
Moving thread_info into task_struct has the following advantages:
- It protects thread_info from corruption in the case of stack
overflows.
- Its address is harder to determine if stac
When activating CONFIG_THREAD_INFO_IN_TASK, linux/sched.h
includes asm/current.h. This generates a circular dependency.
To avoid that, asm/processor.h shall not be included in mmu-hash.h
In order to do that, this patch moves into a new header called
asm/task_size_user64.h the information from asm/
YueHaibing writes:
> Use DEFINE_DEBUGFS_ATTRIBUTE rather than DEFINE_SIMPLE_ATTRIBUTE
> for debugfs files.
>
> Semantic patch information:
> Rationale: DEFINE_SIMPLE_ATTRIBUTE + debugfs_create_file()
> imposes some significant overhead as compared to
> DEFINE_DEBUGFS_ATTRIBUTE + debugfs_create_fil
Jann Horn writes:
> On Fri, Oct 5, 2018 at 3:21 PM Michael Ellerman wrote:
>> Recently we implemented show_user_instructions() which dumps the code
>> around the NIP when a user space process dies with an unhandled
>> signal. This was modelled on the x86 code, and we even went so far as
>> to imp
On Monday 08 October 2018 11:00 AM, Paul Mackerras wrote:
This pulls out the assembler code that is responsible for saving and
restoring the PMU state for the host and guest into separate functions
so they can be used from an alternate entry path. The calling
convention is made compatible wit
Christophe LEROY writes:
> Le 05/10/2018 à 15:21, Michael Ellerman a écrit :
>> Recently we implemented show_user_instructions() which dumps the code
...
>> diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
>> index 913c5725cdb2..bb6ac471a784 100644
>> --- a/arch/powerpc/k
Hi Rob,
On Fri, Oct 5, 2018 at 6:59 PM Rob Herring wrote:
> Convert Renesas SoC bindings to DT schema format using json-schema.
>
> Cc: Simon Horman
> Cc: Magnus Damm
> Cc: Mark Rutland
> Cc: linux-renesas-...@vger.kernel.org
> Cc: devicet...@vger.kernel.org
> Signed-off-by: Rob Herring
Than
Alexey Kardashevskiy wrote:
> As a part of cleanup, the SPAPR TCE IOMMU subdriver releases preregistered
> memory. If there is a bug in memory release, the loop in
> tce_iommu_release() becomes infinite; this actually happened to me.
>
> This makes the loop finite and prints a warning on every fai
On Fri, Oct 05, 2018 at 11:58:48AM -0500, Rob Herring wrote:
> Convert ZTE SoC bindings to DT schema format using json-schema.
>
> Cc: Jun Nie
> Cc: Baoyou Xie
> Cc: Shawn Guo
> Cc: Mark Rutland
> Cc: linux-arm-ker...@lists.infradead.org
> Cc: devicet...@vger.kernel.org
> Signed-off-by: Rob He
Hi Rob,
On Fri, Oct 5, 2018 at 6:58 PM Rob Herring wrote:
> In preparation to convert board-level bindings to json-schema, move
> various misc SoC bindings out to their own file.
>
> Cc: Mark Rutland
> Cc: Simon Horman
> Cc: Magnus Damm
> Cc: devicet...@vger.kernel.org
> Cc: linux-renesas-...@
On Mon, 08 Oct 2018 15:08:31 +1100
Benjamin Herrenschmidt wrote:
> HMIs will crash the kernel due to
>
> BRANCH_LINK_TO_FAR(hmi_exception_realmode)
>
> Calling into the OPD instead of the actual code.
>
> Signed-off-by: Benjamin Herrenschmidt
> ---
>
> This hack fixes it for me, but it
On Fri, Oct 05, 2018 at 11:58:34AM -0500, Rob Herring wrote:
> Convert Freescale SoC bindings to DT schema format using json-schema.
>
> Cc: Shawn Guo
> Cc: Mark Rutland
> Cc: devicet...@vger.kernel.org
> Signed-off-by: Rob Herring
> ---
> .../devicetree/bindings/arm/armadeus.txt | 6 -
On Fri, Oct 05, 2018 at 11:58:18AM -0500, Rob Herring wrote:
> In preparation to convert board-level bindings to json-schema, move
> various misc SoC bindings out to their own file.
>
> Cc: Mark Rutland
> Cc: Jun Nie
> Cc: Baoyou Xie
> Cc: Shawn Guo
> Cc: devicet...@vger.kernel.org
> Cc: linux
On Fri, Oct 05, 2018 at 11:58:16AM -0500, Rob Herring wrote:
> In preparation to convert board-level bindings to json-schema, move
> various misc SoC bindings out to their own file.
>
> Cc: Shawn Guo
> Cc: Mark Rutland
> Cc: devicet...@vger.kernel.org
> Signed-off-by: Rob Herring
Acked-by: Sha
On Thu, Oct 04, 2018 at 06:33:51AM +0530, Vabhav Sharma wrote:
> LX2160A reference design board (RDB) is a high-performance
> computing, evaluation, and development platform with LX2160A
> SoC.
>
> Signed-off-by: Priyanka Jain
> Signed-off-by: Sriram Dash
> Signed-off-by: Vabhav Sharma
> ---
>
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