When a single-threaded process has a non-local mm_cpumask and requires
a full PID tlbie invalidation, use that as an opportunity to reset the
cpumask back to the current CPU we're running on.
No other thread can concurrently switch to this mm, because it must
have had a reference on mm_users befor
In the case of a spurious fault (which can happen due to a race with
another thread that changes the page table), the default Linux mm code
calls flush_tlb_page for that address. This is not required because
the pte will be re-fetched. Hash does not wire this up to a hardware
TLB flush for this rea
Radix flushes the TLB when updating ptes to increase permissiveness
of protection (increase access authority). Book3S does not require
TLB flushing in this case, and it is not done on hash. This patch
avoids the flush for radix.
>From Power ISA v3.0B, p.1090:
Setting a Reference or Change Bit
These two patches make radix match hash and not flush the TLB after
fixing up faults unnecessarily.
There was some concern that accelerators need to have this flush, but
nothing is documented or commented, so it should just be removed. We
have a coprocessor count in the mm context now, and that ca
From: Alastair D'Silva
In order to successfully issue as_notify, an AFU needs to know the TID
to notify, which in turn means that this information should be
available in userspace so it can be communicated to the AFU.
Signed-off-by: Alastair D'Silva
---
drivers/misc/ocxl/context.c | 5 +
From: Alastair D'Silva
Signed-off-by: Alastair D'Silva
---
Documentation/accelerators/ocxl.rst | 11 +++
1 file changed, 11 insertions(+)
diff --git a/Documentation/accelerators/ocxl.rst
b/Documentation/accelerators/ocxl.rst
index ddcc58d01cfb..14cefc020e2d 100644
--- a/Documentation/
From: Alastair D'Silva
The current implementation of TID allocation, using a global IDR, may
result in an errant process starving the system of available TIDs.
Instead, use task_pid_nr(), as mentioned by the original author. The
scenario described which prevented it's use is not applicable, as
se
From: Alastair D'Silva
The function removes the process element from NPU cache.
Signed-off-by: Alastair D'Silva
---
arch/powerpc/include/asm/pnv-ocxl.h | 2 +-
arch/powerpc/platforms/powernv/ocxl.c | 4 ++--
drivers/misc/ocxl/link.c | 2 +-
3 files changed, 4 insertions(+), 4 de
From: Alastair D'Silva
Switch the use of TIDR on it's CPU feature, rather than assuming it
is available based on architecture.
Signed-off-by: Alastair D'Silva
---
arch/powerpc/kernel/process.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/kernel/process
From: Alastair D'Silva
In order for a userspace AFU driver to call the POWER9 specific
OCXL_IOCTL_ENABLE_P9_WAIT, it needs to verify that it can actually
make that call.
Signed-off-by: Alastair D'Silva
---
drivers/misc/ocxl/file.c | 25 +
include/uapi/misc/ocxl.h | 4 +
From: Alastair D'Silva
This patch adds a CPU feature bit to show whether the CPU has
the TIDR register available, enabling as_notify/wait in userspace.
Signed-off-by: Alastair D'Silva
---
arch/powerpc/include/asm/cputable.h | 3 ++-
arch/powerpc/kernel/dt_cpu_ftrs.c | 1 +
2 files changed, 3
From: Alastair D'Silva
The Power 9 as_notify/wait feature provides a lower latency way to
signal a thread that work is complete. This series enables the use of
this feature from OpenCAPI adapters, as well as addressing a potential
starvation issue when allocating thread IDs.
Changelog:
v4:
Rem
Implement a local TLB flush for invalidating an LPID with variants for
process or partition scope. And a global TLB flush for invalidating
a partition scoped page of an LPID.
These will be used by KVM in subsequent patches.
Signed-off-by: Nicholas Piggin
---
.../include/asm/book3s/64/tlbflush-r
Dave Hansen writes:
> On 05/08/2018 07:59 AM, Michael Ellerman wrote:
>> Currently the architecture specific code is expected to display the
>> protection keys in smap for a given vma. This can lead to redundant
>> code and possibly to divergent formats in which the key gets
>> displayed.
>>
>>
Dave Hansen writes:
> On 05/08/2018 07:59 AM, Michael Ellerman wrote:
>> Move the last remaining pkey helper, vma_pkey() into asm/pkeys.h
>
> Fine with me, as long as it compiles. :)
Yeah fair point :)
It survived the kbuild robot, so fingers crossed. I'll let it sit in
linux-next for a while t
Josh Poimboeuf writes:
> On Tue, May 08, 2018 at 10:38:32AM +0200, Torsten Duwe wrote:
>> On Mon, 7 May 2018 10:42:08 -0500
>> Josh Poimboeuf wrote:
>>
>> > The subject doesn't actively describe what the patch does, maybe
>> > change it to something like:
>> >
>> > powerpc: Add support for H
From: Alastair D'Silva
In order to successfully issue as_notify, an AFU needs to know the TID
to notify, which in turn means that this information should be
available in userspace so it can be communicated to the AFU.
Signed-off-by: Alastair D'Silva
---
drivers/misc/ocxl/context.c | 5 +
From: Alastair D'Silva
In order for a userspace AFU driver to call the POWER9 specific
OCXL_IOCTL_ENABLE_P9_WAIT, it needs to verify that it can actually
make that call.
Signed-off-by: Alastair D'Silva
---
drivers/misc/ocxl/file.c | 25 +
include/uapi/misc/ocxl.h | 4 +
From: Alastair D'Silva
Signed-off-by: Alastair D'Silva
---
Documentation/accelerators/ocxl.rst | 11 +++
1 file changed, 11 insertions(+)
diff --git a/Documentation/accelerators/ocxl.rst
b/Documentation/accelerators/ocxl.rst
index ddcc58d01cfb..14cefc020e2d 100644
--- a/Documentation/
From: Alastair D'Silva
The current implementation of TID allocation, using a global IDR, may
result in an errant process starving the system of available TIDs.
Instead, use task_pid_nr(), as mentioned by the original author. The
scenario described which prevented it's use is not applicable, as
se
From: Alastair D'Silva
The Power 9 as_notify/wait feature provides a lower latency way to
signal a thread that work is complete. This series enables the use of
this feature from OpenCAPI adapters, as well as addressing a potential
starvation issue when allocating thread IDs.
Changelog:
v3:
Fix
From: Alastair D'Silva
The function removes the process element from NPU cache.
Signed-off-by: Alastair D'Silva
---
arch/powerpc/include/asm/pnv-ocxl.h | 2 +-
arch/powerpc/platforms/powernv/ocxl.c | 4 ++--
drivers/misc/ocxl/link.c | 2 +-
3 files changed, 4 insertions(+), 4 de
From: Alastair D'Silva
Switch the use of TIDR on it's CPU feature, rather than assuming it
is available based on architecture.
Signed-off-by: Alastair D'Silva
---
arch/powerpc/kernel/process.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/kernel/process
From: Alastair D'Silva
This patch adds a CPU feature bit to show whether the CPU has
the TIDR register available, enabling as_notify/wait in userspace.
Signed-off-by: Alastair D'Silva
---
arch/powerpc/include/asm/cputable.h | 3 ++-
arch/powerpc/kernel/dt_cpu_ftrs.c | 1 +
2 files changed, 3
On Tue, May 08, 2018 at 10:38:32AM +0200, Torsten Duwe wrote:
> On Mon, 7 May 2018 10:42:08 -0500
> Josh Poimboeuf wrote:
>
> > The subject doesn't actively describe what the patch does, maybe
> > change it to something like:
> >
> > powerpc: Add support for HAVE_RELIABLE_STACKTRACE
> >
> > o
On Tue, May 08, 2018 at 07:03:36PM +0200, Michal Suchánek wrote:
>
> How is the application denied setting the permissions on key 0 if it
> can program the register directly?
There is a UAMOR register. The userspace can change the permissions of a
given key; by modifying the bits in AMOR register
On Tue, 8 May 2018 09:38:01 -0700
Ram Pai wrote:
> On Mon, May 07, 2018 at 01:21:49PM +0200, Michal Suchánek wrote:
> > On Sun, 6 May 2018 13:10:43 -0700
> > Ram Pai wrote:
> >
> > > On Sat, May 05, 2018 at 02:39:56PM +0200, Michal Suchánek wrote:
> > > > On Fri, 4 May 2018 14:45:07 -0700
>
On 05/08/2018 07:59 AM, Michael Ellerman wrote:
> Currently the architecture specific code is expected to display the
> protection keys in smap for a given vma. This can lead to redundant
> code and possibly to divergent formats in which the key gets
> displayed.
>
> This patch changes the impleme
On 05/08/2018 07:59 AM, Michael Ellerman wrote:
> Move the last remaining pkey helper, vma_pkey() into asm/pkeys.h
Fine with me, as long as it compiles. :)
Reviewed-by: Dave Hansen
On 05/08/2018 07:59 AM, Michael Ellerman wrote:
> Consolidate the pkey handling by providing a common empty definition
> of vma_pkey() in pkeys.h when CONFIG_ARCH_HAS_PKEYS=n.
>
> This also removes another entanglement of pkeys.h and
> asm/mmu_context.h.
Looks fine to me. Thanks for consolidatin
On Mon, May 07, 2018 at 01:21:49PM +0200, Michal Suchánek wrote:
> On Sun, 6 May 2018 13:10:43 -0700
> Ram Pai wrote:
>
> > On Sat, May 05, 2018 at 02:39:56PM +0200, Michal Suchánek wrote:
> > > On Fri, 4 May 2018 14:45:07 -0700
> > > Ram Pai wrote:
> > >
> > > > On Fri, May 04, 2018 at 02:31
On Wed, May 09, 2018 at 12:59:44AM +1000, Michael Ellerman wrote:
> Consolidate the pkey handling by providing a common empty definition
> of vma_pkey() in pkeys.h when CONFIG_ARCH_HAS_PKEYS=n.
>
> This also removes another entanglement of pkeys.h and
> asm/mmu_context.h.
>
Reviewed-by: Ram Pai
On Wed, May 09, 2018 at 12:59:42AM +1000, Michael Ellerman wrote:
> From: Ram Pai
>
> Currently only 4bits are allocated in the vma flags to hold 16
> keys. This is sufficient for x86. PowerPC supports 32 keys,
> which needs 5bits. This patch allocates an additional bit.
>
> Reviewed-by: Ing
From: Ram Pai
Currently the architecture specific code is expected to display the
protection keys in smap for a given vma. This can lead to redundant
code and possibly to divergent formats in which the key gets
displayed.
This patch changes the implementation. It displays the pkey only if
the ar
Add an empty arch_pkeys_enabled() in linux/pkeys.h for the
CONFIG_ARCH_HAS_PKEYS=n case.
Split out of a patch by Ram Pai .
Signed-off-by: Michael Ellerman
---
include/linux/pkeys.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/include/linux/pkeys.h b/include/linux/pkeys.h
index 946cb
This will be used in future patches to check for arch support for
pkeys in generic code.
Signed-off-by: Michael Ellerman
---
arch/x86/include/asm/pkeys.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/x86/include/asm/pkeys.h b/arch/x86/include/asm/pkeys.h
index 0e5f749158e4..c1957
Move the last remaining pkey helper, vma_pkey() into asm/pkeys.h
Signed-off-by: Michael Ellerman
---
arch/x86/include/asm/mmu_context.h | 10 --
arch/x86/include/asm/pkeys.h | 8
include/linux/pkeys.h | 2 +-
3 files changed, 9 insertions(+), 11 deletions(-)
Consolidate the pkey handling by providing a common empty definition
of vma_pkey() in pkeys.h when CONFIG_ARCH_HAS_PKEYS=n.
This also removes another entanglement of pkeys.h and
asm/mmu_context.h.
Signed-off-by: Michael Ellerman
---
arch/powerpc/include/asm/mmu_context.h | 5 -
arch/x86/inc
While trying to unify the pkey handling in show_smap() between x86 and
powerpc we stumbled across various build failures due to the order of
includes between the two arches.
Part of the problem is that linux/pkeys.h includes asm/mmu_context.h,
and the relationship between asm/mmu_context.h and asm
From: Ram Pai
Currently only 4bits are allocated in the vma flags to hold 16
keys. This is sufficient for x86. PowerPC supports 32 keys,
which needs 5bits. This patch allocates an additional bit.
Reviewed-by: Ingo Molnar
Acked-by: Balbir Singh
Signed-off-by: Ram Pai
[mpe: Fold in #if VM_P
From: Ram Pai
VM_PKEY_BITx are defined only if CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
is enabled. Powerpc also needs these bits. Hence lets define the
VM_PKEY_BITx bits for any architecture that enables
CONFIG_ARCH_HAS_PKEYS.
Reviewed-by: Dave Hansen
Signed-off-by: Ram Pai
Reviewed-by: Ingo M
This is a rework of Ram's series, which broke the build on both arches at
various points due to the differing header dependencies.
The actual pkey changes are basically the same, this just has some rework to
get the headers cleaned up a bit beforehand.
If no one objects I'll ask Stephen to put th
On Fri, 2018-04-27 at 06:23:18 UTC, Mahesh J Salgaonkar wrote:
> From: Mahesh Salgaonkar
>
> Unregister fadump on kexec down path otherwise the fadump registration in
> new kexec-ed kernel complains that fadump is already registered. This
> makes new kernel to continue using fadump registered by
On Wed, 2018-05-02 at 11:29:48 UTC, Michael Ellerman wrote:
> config TRACING_SUPPORT has an exception for PPC32, because PPC32
> didn't have irqflags tracing support.
>
> But that hasn't been true since commit 5d38902c4838 ("powerpc: Add
> irqtrace support for 32-bit powerpc") (Jun 2009).
>
> So
On Tue, 2018-05-01 at 02:57:25 UTC, Balbir Singh wrote:
> This commit was a stop-gap to prevent crashes on hotunplug, caused by
> the mismatch between the 1G mappings used for the linear mapping and the
> memory block size. Those issues are now resolved because we split the
> linear mapping at hotu
On Tue, 2018-04-24 at 16:31:28 UTC, Christophe Leroy wrote:
> When nohash and book3s header were split, some hash related stuff
> remained in the nohash header. This patch removes them.
>
> Signed-off-by: Christophe Leroy
Series applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/
On Thu, 2018-04-19 at 07:04:00 UTC, "Naveen N. Rao" wrote:
> We have some C code that we call into from real mode where we cannot
> take any exceptions. Though the C functions themselves are mostly safe,
> if these functions are traced, there is a possibility that we may take
> an exception. For in
On Tue, 2018-04-10 at 13:41:16 UTC, Hari Bathini wrote:
> From: Mahesh Salgaonkar
>
> The second kernel, during early boot after the crash, reserves rest of
> the memory above boot memory size to make sure it does not touch any of the
> dump memory area. It uses memblock_reserve() that reserves t
On Tue, 2018-03-27 at 04:29:06 UTC, Michael Ellerman wrote:
> We've had dynamic ftrace support for over 9 years since Steve first
> wrote it, all the distros use dynamic, and static is basically
> untested these days, so drop support for static ftrace.
>
> Signed-off-by: Michael Ellerman
> Acked-
On Mon, 2017-12-11 at 03:29:13 UTC, Paul Gortmaker wrote:
> I no longer have a functional version of this board for even the most
> basic sanity boot testing, and they have not been available for purchase
> for quite some years now.
>
> There is no point in adding a burden to testing coverage that
Khem Raj writes:
> This masks the new gcc8 warning
>
> regset.h:270:4: error: 'memcpy' offset [-527, -529] is out
> of the bounds [0, 16] of object 'vrsave' with type 'union '
Why would we want to mask the warning rather than fix it?
cheers
> Signed-off-by: Khem Raj
> Cc: Benjamin Herrenschmi
Ram Pai writes:
> This patch series provides arch-neutral enhancements to
> enable memory-keys on new architecutes, and the corresponding
> changes in x86 and powerpc specific code to support that.
>
> a) Provides ability to support upto 32 keys. PowerPC
> can handle 32 keys and hence ne
Mathieu Malaterre writes:
> Hi there,
>
> Quick question (I have not investigate root cause): is support for
> seccomp complete on ppc32 ?
Doesn't look like it does it :)
> $ make KBUILD_OUTPUT=/tmp/kselftest TARGETS=seccomp kselftest
> ...
> seccomp_bpf.c:1804:TRACE_syscall.ptrace_syscall_drop
On 05/08/2018 04:49 AM, Andy Lutomirski wrote:
On Mon, May 7, 2018 at 2:48 AM Florian Weimer wrote:
On 05/03/2018 06:05 AM, Andy Lutomirski wrote:
On Wed, May 2, 2018 at 7:11 PM Ram Pai wrote:
On Wed, May 02, 2018 at 09:23:49PM +, Andy Lutomirski wrote:
If I recall correctly, the PO
Hi Michael,
> The hcall_exit() tracepoint has retval defined as unsigned long. That
> leads to humours results like:
>
> bash-3686 [009] d..2 854.134094: hcall_entry: opcode=24
> bash-3686 [009] d..2 854.134095: hcall_exit: opcode=24
> retval=18446744073709551609
>
> It's normal for so
Hi Laurent,
Laurent Dufour writes:
> Set ARCH_SUPPORTS_SPECULATIVE_PAGE_FAULT which turns on the
> Speculative Page Fault handler when building for 64bit.
>
> Cc: Thomas Gleixner
> Signed-off-by: Laurent Dufour
> ---
> arch/x86/Kconfig | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/
On Fri, May 04, 2018 at 11:10:54AM +0200, Laurent Dufour wrote:
> On 03/05/2018 17:42, Minchan Kim wrote:
> > On Thu, May 03, 2018 at 02:25:18PM +0200, Laurent Dufour wrote:
> >> On 23/04/2018 09:42, Minchan Kim wrote:
> >>> On Tue, Apr 17, 2018 at 04:33:18PM +0200, Laurent Dufour wrote:
> Whe
The kexec_state KEXEC_STATE_IRQS_OFF barrier is reached by all
secondary CPUs before the kexec_cpu_down() operation is called on
secondaries. This can raise conflicts and provoque errors in the XIVE
hcalls when XIVE is shutdown with H_INT_RESET on the primary CPU.
To synchronize the kexec_cpu_down
The hcall H_INT_RESET should be called to make sure XIVE is fully
reseted.
Signed-off-by: Cédric Le Goater
---
arch/powerpc/platforms/pseries/kexec.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/platforms/pseries/kexec.c
b/arch/powerpc/platforms/pserie
Christophe Leroy writes:
> Signed-off-by: Christophe Leroy
> ---
> arch/powerpc/include/asm/book3s/64/pgtable.h | 1 +
> arch/powerpc/mm/ioremap.c| 126
> +++
> 2 files changed, 34 insertions(+), 93 deletions(-)
>
> diff --git a/arch/powerpc/includ
On Mon, 7 May 2018 10:42:08 -0500
Josh Poimboeuf wrote:
> The subject doesn't actively describe what the patch does, maybe
> change it to something like:
>
> powerpc: Add support for HAVE_RELIABLE_STACKTRACE
>
> or maybe
>
> powerpc: Add support for livepatch consistency model
Maybe $SUBJ
Christophe Leroy writes:
> _PAGE_BUSY is always 0, remove it
>
Reviewed-by: Aneesh Kumar K.V
> Signed-off-by: Christophe Leroy
> ---
> arch/powerpc/include/asm/nohash/64/pgtable.h | 10 +++---
> arch/powerpc/include/asm/nohash/pte-book3e.h | 5 -
> 2 files changed, 3 insertions(+),
Christophe Leroy writes:
> When nohash and book3s header were split, some hash related stuff
> remained in the nohash header. This patch removes them.
>
Thanks for doing this. This was on the TODO list for a long time. When
we did the split for book3s, I mostly copied the generic headers to
noha
This is not the case for the moment, but future releases of pHyp might
need to introduce some synchronisation routines under the hood which
would make the XIVE hcalls longer to complete.
As this was done for H_INT_RESET, let's wrap the other hcalls in a
loop catching the H_LONG_BUSY_* codes.
Sign
The hcall H_INT_RESET can take some time to complete and in such cases
it returns H_LONG_BUSY_* codes requiring the machine to sleep for a
while before retrying.
Signed-off-by: Cédric Le Goater
---
Changes since v2:
- replaced msleep() by mdelay() as some calling path are under lock.
arch/
Hello,
H_INT_RESET performs a reset of the Hypervisor internal interrupt
structures, removing all settings done with H_INT_SET_SOURCE_CONFIG
and H_INT_SET_QUEUE_CONFIG. This is most important for kdump and kexec
to be able to restart in a clean state.
First patch closes a window in the kexec sequ
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