On Tue, Feb 13, 2018 at 08:29:26PM +0100, Frederic Barrat wrote:
> Hi,
>
> Thanks for the report. I'll fix the first issue. The 2nd is already on its
> way to upstream:
> https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?id=dedab7f0d3137441a97fe7cf9b9ca5
>
> (though we sti
On Tue, 2018-02-13 at 21:12 -0800, Tyrel Datwyler wrote:
> On 02/13/2018 05:20 PM, Cyril Bur wrote:
> > Hello all,
>
> Does reverting commit 02ef6dd8109b581343ebeb1c4c973513682535d6 alleviate the
> issue?
>
Hi Tyrel,
No it doesn't. Same backtrace.
> -Tyrel
>
> >
> > I'm seeing this crash tr
Cédric Le Goater writes:
> On 02/13/2018 10:18 AM, Michael Ellerman wrote:
>> Cédric Le Goater writes:
>>
>>> The CPU event notification queues on sPAPR should be configured using
>>> a hardware CPU identifier.
>>>
>>> The problem did not show up on the Power Hypervisor because pHyp
>>> support
On Tue, 2018-02-13 at 11:09:33 UTC, "Aneesh Kumar K.V" wrote:
> On powerpc we allocate page table pages from slab cache of different sizes.
> For
> now we have a constructor that zero out the objects when we allocate then for
> the first time. We expect the objects to be zeroed out when we free th
On Mon, 2018-02-12 at 22:34:08 UTC, Guenter Roeck wrote:
> Commit e67e02a544e9 ("powerpc/pseries: Fix cpu hotplug crash with
> memoryless nodes") adds an unconditional call to find_and_online_cpu_nid(),
> which is only declared if CONFIG_PPC_SPLPAR is enabled. This results in
> the following build
On Tue, 2018-02-13 at 06:32:55 UTC, Harish wrote:
> With glibc 2.26 'struct ucontext' is removed to improve POSIX
> compliance, which breaks powerpc/alignment_handler selftest.
> Fix the test by using ucontext_t. Tested on ppc, works with older
> glibc versions as well.
>
> Fixes the following:
>
On Mon, 2018-02-12 at 22:34:07 UTC, Guenter Roeck wrote:
> If KEXEC_CORE is not enabled, PowerNV builds fail as follows.
>
> arch/powerpc/platforms/powernv/smp.c: In function 'pnv_smp_cpu_kill_self':
> arch/powerpc/platforms/powernv/smp.c:236:4: error:
> implicit declaration of function 'cra
On Mon, 2018-02-12 at 00:19:29 UTC, Sam Bobroff wrote:
> Currently if the kernel receives a memory hot-unplug event early
> enough, it may get stuck in an infinite loop in
> dissolve_free_huge_pages(). This appears as a stall just after:
>
> pseries-hotplug-mem: Attempting to hot-remove XX LMB(s)
On Sun, 2018-02-11 at 15:00:08 UTC, "Aneesh Kumar K.V" wrote:
> The hugetlb pte entries are at the PMD and PUD level. Use the right offset
> for them to get the second half of the table.
>
> Signed-off-by: Aneesh Kumar K.V
> Reviewed-by: Ram Pai
Applied to powerpc fixes, thanks.
https://git.ke
On Sun, 2018-02-11 at 15:00:07 UTC, "Aneesh Kumar K.V" wrote:
> Signed-off-by: Aneesh Kumar K.V
> Reviewed-by: Ram Pai
Applied to powerpc fixes, thanks.
https://git.kernel.org/powerpc/c/4a7aa4fecbbf94b5c6fae8a983
cheers
On Sun, 2018-02-11 at 15:00:06 UTC, "Aneesh Kumar K.V" wrote:
> To support memory keys, we moved the hash pte slot information to the second
> half of the page table. This was ok with PTE entries at level 4 and level 3.
> We already allocate larger page table pages at those level to accomodate extr
On Thu, 2018-02-08 at 09:18:38 UTC, Nicholas Piggin wrote:
> cp_abort is only required or user windows, because kernel context
> must not be preempted between a copy/paste pair.
>
> Without this patch, the init task gets used_vas set when it runs
> the nx842_powernv_init initcall, which opens wind
On Thu, 2018-02-01 at 05:09:44 UTC, Alexey Kardashevskiy wrote:
> Radix guests do normally invalidate process-scoped translations when
> a new pid is allocated but migrated guests do not invalidate these so
> migrated guests crash sometime, especially easy to reproduce with
> migration happening wi
On 02/13/2018 05:20 PM, Cyril Bur wrote:
> Hello all,
Does reverting commit 02ef6dd8109b581343ebeb1c4c973513682535d6 alleviate the
issue?
-Tyrel
>
> I'm seeing this crash trying to boot a KVM virtual machine. This kernel
> was compiled with pseries_le_defconfig and run using the following qemu
> > +struct mmio_atsd_reg {
> > + struct npu *npu;
> > + int reg;
> > +};
> > +
>
> Is it just easier to move reg to inside of struct npu?
I don't think so, struct npu is global to all npu contexts where as this is
specific to the given invalidation. We don't have enough registers to assign
e
The TSCR can only be accessed in hypervisor mode.
Fixes: 88b5e12eeb11 ("powerpc: Expose TSCR via sysfs")
Signed-off-by: Cyril Bur
---
arch/powerpc/kernel/sysfs.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/kernel/sysfs.c b/arch/powerpc/kernel/sysfs.c
in
On Mon, 12 Feb 2018 15:25:51 -0800
Guenter Roeck wrote:
> On Tue, Feb 13, 2018 at 10:01:57AM +1100, Balbir Singh wrote:
> > On Tue, Feb 13, 2018 at 9:34 AM, Guenter Roeck wrote:
> > > If KEXEC_CORE is not enabled, PowerNV builds fail as follows.
> > >
> > > arch/powerpc/platforms/powernv/smp.c
On 02/12/2018 06:48 PM, Michael Ellerman wrote:
> Andrew Morton writes:
>
>> On Thu, 08 Feb 2018 12:30:45 + Punit Agrawal
>> wrote:
>>
So I don't think that the above test result means that errors are properly
handled, and the proposed patch should help for arm64.
>>>
>>> Alt
Hello all,
I'm seeing this crash trying to boot a KVM virtual machine. This kernel
was compiled with pseries_le_defconfig and run using the following qemu
commandline:
qemu-system-ppc64 -enable-kvm -cpu POWER8 -smp 4 -m 4G -M pseries
-nographic -vga none -drive file=vm.raw,if=virtio,format=raw -d
On 02/11/2018 11:27 PM, Ingo Molnar wrote:
>
> * Randy Dunlap wrote:
>
>> From: Randy Dunlap
>>
>> Currently #includes for no obvious
>> reason. It looks like it's only a convenience, so remove kmemleak.h
>> from slab.h and add to any users of kmemleak_*
>> that don't already #include it.
>>
confirm 179e695f420474677205db49a8cbfe950329975c
confirm 0da5e6b1343dcc6395ebcc8054c362d930498440
On Mon, Feb 12, 2018 at 11:35 PM, Vaibhav Jain
wrote:
> Thanks for reviewing this patch Balbir
>
> Balbir Singh writes:
>
>> Any specific issue you've run into without this patch?
> Without this patch since xmon is still accessible via sysrq and there is
> no indication/warning on the xmon consol
On Tue, Feb 13, 2018 at 2:32 AM, Michal Hocko wrote:
> On Tue 13-02-18 21:16:55, Michael Ellerman wrote:
>> Kees Cook writes:
>>
>> > On Mon, Feb 12, 2018 at 7:25 PM, Michael Ellerman
>> > wrote:
>> >> Michal Hocko writes:
>> >>> Hi,
>> >>> my build test machinery chokes on samples/seccomp whe
On 2/12/2018 9:59 PM, Michael Ellerman wrote:
Johannes Thumshirn writes:
On Wed, Feb 07, 2018 at 10:51:57AM +0100, Johannes Thumshirn wrote:
+ /* Enable combined writes for DPP aperture */
+ pg_addr = (unsigned long)(wq->dpp_regaddr) & PAGE_MASK;
+#
On 12/02/18 21:03, Boris Brezillon wrote:
> MTD users are no longer checking erase_info->state to determine if the
> erase operation failed or succeeded. Moreover, mtd_erase_callback() is
> now a NOP.
>
> We can safely get rid of all mtd_erase_callback() calls and all
> erase_info->state assignmen
This reverts commit 02ef6dd8109b581343ebeb1c4c973513682535d6.
The earlier patch tried to enable support for a new property
"ibm,drc-info" on powerpc systems.
Unfortunately, some errors in the associated patch set break things
in some of the DLPAR operations. In particular when attempting to
hot-
Le 09/02/2018 à 05:10, Vaibhav Jain a écrit :
For PSL9 the time-base enable bit has moved from PSL_TB_CTLSTAT
register to PSL_CONTROL register. Hence we don't need an sl_ops
implementation for 'write_timebase_ctrl' for PSL9.
Hence this patch removes function write_timebase_ctrl_psl9() and its
From: Sukadev Bhattiprolu
Date: Fri, 9 Feb 2018 11:49:06 -0600
Subject: [PATCH 1/1] powerpc/vas: Fix cleanup when VAS is not configured
When VAS is not configured, unregister the platform driver. Also simplify
cleanup by delaying vas debugfs init until we know VAS is configured.
Signed-off-by: S
On Tue, Feb 13, 2018 at 04:39:33PM +0530, Aneesh Kumar K.V wrote:
> On powerpc we allocate page table pages from slab cache of different sizes.
> For
> now we have a constructor that zero out the objects when we allocate then for
> the first time. We expect the objects to be zeroed out when we fre
On 02/12/2018 02:34 PM, Guenter Roeck wrote:
> Commit e67e02a544e9 ("powerpc/pseries: Fix cpu hotplug crash with
> memoryless nodes") adds an unconditional call to find_and_online_cpu_nid(),
> which is only declared if CONFIG_PPC_SPLPAR is enabled. This results in
> the following build error if thi
Hi,
Thanks for the report. I'll fix the first issue. The 2nd is already on
its way to upstream:
https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?id=dedab7f0d3137441a97fe7cf9b9ca5
(though we still have a useless cast in there; will fix as well).
May I ask what static c
I successfully compiled the latest Git kernel with this patch without enabled
AltiVec for my Freescale P5020 board today. The patch works without any
problems.
— Christian
Sent from my iPhone
On 13. Feb 2018, at 05:51, Paul Mackerras wrote:
Commit accb757d798c ("KVM: Move vcpu_load to arch-s
On 07/02/2018 20:44, Mathieu Malaterre wrote:
> Remove the __init annotation from pmu_init() to avoid the
> following warning.
>
> WARNING: vmlinux.o(.data+0x4739c): Section mismatch in reference from the
> variable via_pmu_driver to the function .init.text:pmu_init()
> The variable via_pmu_drive
On 02/13/2018 02:09 AM, Michael Ellerman wrote:
> Randy Dunlap writes:
>
>> On 02/12/2018 04:28 AM, Michael Ellerman wrote:
>>> Randy Dunlap writes:
>>>
From: Randy Dunlap
Currently #includes for no obvious
reason. It looks like it's only a convenience, so remove kmemleak.
> Does this fix your warning?
>
> diff --git a/drivers/macintosh/macio_asic.c b/drivers/macintosh/macio_asic.c
> index 62f541f968f6..07074820a167 100644
> --- a/drivers/macintosh/macio_asic.c
> +++ b/drivers/macintosh/macio_asic.c
> @@ -375,6 +375,7 @@ static struct macio_dev * macio_add_one_devic
Hi,
On Tue, Feb 13, 2018 at 3:51 PM, Christoph Hellwig wrote:
> Does this fix your warning?
>
> diff --git a/drivers/macintosh/macio_asic.c b/drivers/macintosh/macio_asic.c
> index 62f541f968f6..07074820a167 100644
> --- a/drivers/macintosh/macio_asic.c
> +++ b/drivers/macintosh/macio_asic.c
> @@
Try to allocate kernel page tables for direct mapping and vmemmap
according to the node of the memory they will map. The node is not
available for the linear map in early boot, so use range allocation
to allocate the page tables from the region they map, which is
effectively node-local.
Signed-off
Signed-off-by: Nicholas Piggin
---
arch/powerpc/mm/pgtable-radix.c | 114 +++-
1 file changed, 66 insertions(+), 48 deletions(-)
diff --git a/arch/powerpc/mm/pgtable-radix.c b/arch/powerpc/mm/pgtable-radix.c
index 435b19e74508..4c5cc69c92c2 100644
--- a/arch/p
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/book3s/64/hash.h | 2 +-
arch/powerpc/include/asm/book3s/64/radix.h | 2 +-
arch/powerpc/include/asm/sparsemem.h | 2 +-
arch/powerpc/mm/hash_utils_64.c| 2 +-
arch/powerpc/mm/mem.c | 4 ++--
arch/
Signed-off-by: Nicholas Piggin
---
arch/powerpc/kernel/setup_64.c | 51 ++
1 file changed, 32 insertions(+), 19 deletions(-)
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index 02fa358982e6..16ea71fa1ead 100644
--- a/arch/pow
Per-node allocations are possible on 64s with radix that does
not have the bolted SLB limitation.
Hash would be able to do the same if all CPUs had the bottom of
their node-local memory bolted as well. This is left as an
exercise for the reader.
---
arch/powerpc/kernel/paca.c | 41 +++
---
arch/powerpc/include/asm/paca.h| 3 +-
arch/powerpc/kernel/paca.c | 90 --
arch/powerpc/kernel/prom.c | 5 ++-
arch/powerpc/kernel/setup-common.c | 24 +++---
4 files changed, 51 insertions(+), 71 deletions(-)
diff --git a/arch/pow
Build an array that finds hardware CPU number from logical CPU
number in firmware CPU discovery. Use that rather than setting
paca of other CPUs directly, to begin with. Subsequent patch will
not have pacas allocated at this point.
---
arch/powerpc/include/asm/smp.h | 1 +
arch/powerpc/kernel
Move this into the early setup code, and don't iterate over CPU masks.
We don't want to call into sysfs so early from setup, and a future patch
won't initialize CPU masks by the time this is called.
---
arch/powerpc/kernel/paca.c | 3 +++
arch/powerpc/kernel/setup.h| 9 +++--
arch/po
Split sparsemem initialisation from basic numa topology discovery.
Move the parsing earlier in boot, before pacas are allocated.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/setup.h | 1 +
arch/powerpc/kernel/setup-common.c | 3 +++
arch/powerpc/mm/mem.c | 5
This will be used by powerpc to allocate per-cpu stacks and other
data structures node-local where possible.
Signed-off-by: Nicholas Piggin
---
include/linux/memblock.h | 5 -
mm/memblock.c| 2 +-
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/include/linux/memblo
Allocate slb_shadow structures individually.
slb_shadow structures are avoided for radix environment.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/kernel/paca.c | 65 +-
1 file changed, 30 insertions(+), 35 deletions(-)
diff --git a/arch/powerpc/k
Allocate LPPACAs individually.
We no longer allocate lppacas in an array, so this patch removes the 1kB
static alignment for the structure, and enforces the PAPR alignment
requirements at allocation time. We can not reduce the 1kB allocation size
however, due to existing KVM hypervisors.
Signed-o
Change the paca array into an array of pointers to pacas. Allocate
pacas individually.
This allows flexibility in where the PACAs are allocated. Future work
will allocate them node-local. Platforms that don't have address limits
on PACAs would be able to defer PACA allocations until later in boot
The "lppaca" is a structure registered with the hypervisor. This
is unnecessary when running on non-virtualised platforms. One field
from the lppaca (pmcregs_in_use) is also used by the host, so move
the host part out into the paca (lppaca field is still updated in
guest mode).
Signed-off-by: Nich
This series allows numa aware allocations for various early data
structures for radix. Hash still has a bolted SLB limitation that
prevents at least pacas and stacks from node-affine allocations.
Fixed up a number of bugs, got pSeries working, added a couple more
cases where page tables can be all
Does this fix your warning?
diff --git a/drivers/macintosh/macio_asic.c b/drivers/macintosh/macio_asic.c
index 62f541f968f6..07074820a167 100644
--- a/drivers/macintosh/macio_asic.c
+++ b/drivers/macintosh/macio_asic.c
@@ -375,6 +375,7 @@ static struct macio_dev * macio_add_one_device(struct
maci
On 02/13/2018 10:18 AM, Michael Ellerman wrote:
> Cédric Le Goater writes:
>
>> The CPU event notification queues on sPAPR should be configured using
>> a hardware CPU identifier.
>>
>> The problem did not show up on the Power Hypervisor because pHyp
>> supports 8 threads per core which keeps CPU
Guenter Roeck writes:
> If KEXEC_CORE is not enabled, PowerNV builds fail as follows.
>
> arch/powerpc/platforms/powernv/smp.c: In function 'pnv_smp_cpu_kill_self':
> arch/powerpc/platforms/powernv/smp.c:236:4: error:
> implicit declaration of function 'crash_ipi_callback'
>
> Add dummy fun
On 07/02/2018 18:49, Daniel Henrique Barboza wrote:
>
>
> On 02/07/2018 12:33 PM, Laurent Vivier wrote:
>> On 01/02/2018 06:09, Alexey Kardashevskiy wrote:
>>> Radix guests do normally invalidate process-scoped translations when
>>> a new pid is allocated but migrated guests do not invalidate the
Le 13/02/2018 à 09:40, Nicholas Piggin a écrit :
On Mon, 12 Feb 2018 18:42:21 +0100
Christophe LEROY wrote:
Le 12/02/2018 à 16:24, Nicholas Piggin a écrit :
On Mon, 12 Feb 2018 16:02:23 +0100
Christophe LEROY wrote:
Le 10/02/2018 à 09:11, Nicholas Piggin a écrit :
This series intends
PSL9D doesn't have a data-cache that needs to be flushed before
resetting the card. However when cxl tries to flush data-cache on such
a card, it times-out as PSL_Control register never indicates flush
operation complete due to missing data-cache. This is usually
indicated in the kernel logs with t
On powerpc we allocate page table pages from slab cache of different sizes. For
now we have a constructor that zero out the objects when we allocate then for
the first time. We expect the objects to be zeroed out when we free the the
object back to slab cache. This happens in the unmap path. For hu
Frederic Barrat writes:
> Le 11/02/2018 à 18:10, Vaibhav Jain a écrit :
>> Thanks for reviewing the patch Christophe,
>>
>> christophe lombard writes:
+bool cxl_enable_psltrace = true;
+module_param_named(enable_psltrace, cxl_enable_psltrace, bool, 0600);
+MODULE_PARM_DESC(enable
On Tue 13-02-18 21:16:55, Michael Ellerman wrote:
> Kees Cook writes:
>
> > On Mon, Feb 12, 2018 at 7:25 PM, Michael Ellerman
> > wrote:
> >> Michal Hocko writes:
> >>> Hi,
> >>> my build test machinery chokes on samples/seccomp when cross compiling
> >>> s390 and ppc64 allyesconfig. This has
Cédric Le Goater writes:
> The CPU event notification queues on sPAPR should be configured using
> a hardware CPU identifier.
>
> The problem did not show up on the Power Hypervisor because pHyp
> supports 8 threads per core which keeps CPU number contiguous. This is
> not the case on all sPAPR v
Kees Cook writes:
> On Mon, Feb 12, 2018 at 7:25 PM, Michael Ellerman wrote:
>> Michal Hocko writes:
>>> Hi,
>>> my build test machinery chokes on samples/seccomp when cross compiling
>>> s390 and ppc64 allyesconfig. This has been the case for quite some
>>> time already but I never found time
Hi Boris,
On Tue, 13 Feb 2018 09:17:14 +0100, Boris Brezillon
wrote:
> On Tue, 13 Feb 2018 08:42:46 +0100
> Miquel Raynal wrote:
>
> > Hi Boris,
> >
> > Just a few comments about the form.
> >
> > Otherwise:
> > Reviewed-by: Miquel Raynal
> >
> >
> > > diff --git a/drivers/mtd/devices/l
Hi Boris,
Just a few comments about the form.
Otherwise:
Reviewed-by: Miquel Raynal
> diff --git a/drivers/mtd/devices/lart.c b/drivers/mtd/devices/lart.c
> index 555b94406e0b..3d6c8ffd351f 100644
> --- a/drivers/mtd/devices/lart.c
> +++ b/drivers/mtd/devices/lart.c
> @@ -415,7 +415,6 @@ stati
Randy Dunlap writes:
> On 02/12/2018 04:28 AM, Michael Ellerman wrote:
>> Randy Dunlap writes:
>>
>>> From: Randy Dunlap
>>>
>>> Currently #includes for no obvious
>>> reason. It looks like it's only a convenience, so remove kmemleak.h
>>> from slab.h and add to any users of kmemleak_*
>>>
The CPU event notification queues on sPAPR should be configured using
a hardware CPU identifier.
The problem did not show up on the Power Hypervisor because pHyp
supports 8 threads per core which keeps CPU number contiguous. This is
not the case on all sPAPR virtual machines, some use SMT=1.
Also
On Mon 12-02-18 21:54:39, Kees Cook wrote:
> On Mon, Feb 12, 2018 at 7:25 PM, Michael Ellerman wrote:
> > Michal Hocko writes:
> >> Hi,
> >> my build test machinery chokes on samples/seccomp when cross compiling
> >> s390 and ppc64 allyesconfig. This has been the case for quite some
> >> time alr
On Mon, 12 Feb 2018 18:42:21 +0100
Christophe LEROY wrote:
> Le 12/02/2018 à 16:24, Nicholas Piggin a écrit :
> > On Mon, 12 Feb 2018 16:02:23 +0100
> > Christophe LEROY wrote:
> >
> >> Le 10/02/2018 à 09:11, Nicholas Piggin a écrit :
> >>> This series intends to improve performance and red
On Tue, 13 Feb 2018 08:42:46 +0100
Miquel Raynal wrote:
> Hi Boris,
>
> Just a few comments about the form.
>
> Otherwise:
> Reviewed-by: Miquel Raynal
>
>
> > diff --git a/drivers/mtd/devices/lart.c b/drivers/mtd/devices/lart.c
> > index 555b94406e0b..3d6c8ffd351f 100644
> > --- a/drivers/m
Hello Frederic Barrat,
The patch aeddad1760ae: "ocxl: Add AFU interrupt support" from Jan
23, 2018, leads to the following static checker warning:
drivers/misc/ocxl/file.c:163 afu_ioctl()
warn: maybe return -EFAULT instead of the bytes remaining?
drivers/misc/ocxl/file.c
111 static l
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