On 11/01/18 19:55, Christophe Lombard wrote:
The POWER9 core supports a new feature: ASB_Notify which requires the
support of the Special Purpose Register: TIDR.
The ASB_Notify command, generated by the AFU, will attempt to
wake-up the host thread identified by the particular LPID:PID:TID.
This
Anshuman Khandual writes:
> From: Anshuman Khandual
>
> Any changes to the partition table must be followed by appropriate TLB
> flush which is not happening at present in native_register_proc_table()
> path. Fix this by calling mmu_partition_table_set_entry() which does
> take care of TLB flush
Since ssi->streams is being updated along with SCR register and
its SSIEN bit, it's simpler to use it instead.
Signed-off-by: Nicolin Chen
Tested-by: Caleb Crome
---
sound/soc/fsl/fsl_ssi.c | 7 +--
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/sound/soc/fsl/fsl_ssi.c b/sound
This patch cleans up probe() function by moving all Device Tree
related code into a separate function. It allows the probe() to
be Device Tree independent. This will be very useful for future
integration of imx-ssi driver which has similar functionalities
while exists only because it supports non-D
Using symmetric_rates in the cpu_dai_drv is a bit implicit,
so this patch adds a bool synchronous instead.
Signed-off-by: Nicolin Chen
Tested-by: Caleb Crome
---
Changelog
v3
* Removed all cpu_dai_drv changes in PATCH-15
sound/soc/fsl/fsl_ssi.c | 13 -
1 file changed, 8 insertions
The _fsl_ssi_set_dai_fmt() is a helper function being called from
fsl_ssi_set_dai_fmt() as an ASoC operation and fsl_ssi_hw_init()
mainly for AC97 format initialization.
This patch cleans the _fsl_ssi_set_dai_fmt() in following ways:
* Removing *dev pointer in the parameters as it's included in th
AC97 configures most of registers earlier to start a communication
with CODECs in order to successfully initialize CODEC. Currently,
_fsl_ssi_set_dai_fmt() and fsl_ssi_setup_ac97() are called to get
all SSI registers properly set.
Since now the driver has a fsl_ssi_hw_init() to handle all register
The probe() could handle some one-time configurations since
they will not be changed once being configured.
Signed-off-by: Nicolin Chen
Tested-by: Caleb Crome
---
Changelog
v2
* Moved all to fsl_ssi_hw_init() in platform probe()
sound/soc/fsl/fsl_ssi.c | 39 ++-
Since there is a helper function, use it to help readability.
Signed-off-by: Nicolin Chen
Tested-by: Caleb Crome
---
sound/soc/fsl/fsl_ssi.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c
index ba06e94..e1fe511 100644
It'd be safer to enable both FIFOs for TX or RX at the same time.
Signed-off-by: Nicolin Chen
Tested-by: Caleb Crome
---
sound/soc/fsl/fsl_ssi.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c
index e5efee2..ba06
This patch cleans fsl_ssi_setup_regvals() by following changes:
1) Moving DBG bits to the first lines.
2) Setting SSIE, RE/TE as default and cleaning it for AC97
Signed-off-by: Nicolin Chen
Tested-by: Caleb Crome
---
sound/soc/fsl/fsl_ssi.c | 17 ++---
1 file changed, 6 insertions(+
The _fsl_ssi_set_dai_fmt() bypasses an undefined format for AC97
mode. However, it's not really necessary if AC97 has its complete
format defined.
So this patch adds a DAIFMT macro of complete format including a
clock direction and polarity.
Signed-off-by: Nicolin Chen
Tested-by: Caleb Crome
--
The trigger() calls fsl_ssi_tx_config() and fsl_ssi_rx_config(),
and both of them jump to fsl_ssi_config(). And fsl_ssi_config()
later calls another fsl_ssi_rxtx_config().
However, the whole routine, especially fsl_ssi_config() function,
is too complicated because of the folowing reasons:
1) It ha
The FIFO clear helper function is just one line of code now.
So it could be cleaned up by removing it and calling regmap
directly.
Meanwhile, FIFO clear could be applied to all use cases, not
confined to AC97. So this patch also moves FIFO clear in the
trigger() to fsl_ssi_config() and removes the
The define of fsl_ssi_disable_val is not so clear as it mixes two
steps of calculations together. And those parameter names are also
a bit long to read.
Since it just tries to exclude the shared bits from the regvals of
current stream while the opposite stream is active, it's better to
use somethi
Checking TE and RE bits in SCR register doesn't work for AC97 mode
which enables SSIEN, TE and RE in the fsl_ssi_setup_ac97() that's
called during probe().
So when running into the trigger(), it will always get the result
of both TE and RE being enabled already, even if actually there is
no active
This patch replaces the register read with ssi->i2s_net for
simplification. It also removes masking SSIEN from scr value
since it's handled later by regmap_update_bits() to set this
scr value back.
Signed-off-by: Nicolin Chen
Tested-by: Caleb Crome
---
sound/soc/fsl/fsl_ssi.c | 7 ++-
1 fil
The hw_params() overwrites i2s_net settings for special cases like
mono-channel support, however, it doesn't update ssi->i2s_net as
set_dai_fmt() does.
This patch removes the local i2s_net variable and directly updates
ssi->i2s_net in the hw_params() so that the driver can simply look
up the ssi->
==Change log==
v3
* Reworked the series by taking suggestions from Maciej
+ Added PATCH-01 to make RX and TX more clearly defined
+ Replaced "bool dir" with "int dir" in PATCH-04
+ Replaced "!dir" with "int adir" in PATCH-05
+ Put CBM_CFS behind the baudclk check to keep the same
progr
The RX and TX macros were defined implicitly and there was
a potential risk if someone changes their values.
Since they were defined to index the array ssi->regvals[2],
this patch moves these two macros to fsl_ssi.c, closer to
its owner ssi->regvals. And it also puts some comments here
to limit th
On the Nintendo Wii, there are two ranges of physical memory, and MMIO
in between, but Linux on ppc32 doesn't support discontiguous memory.
Therefore a hack was introduced in commit c5df7f775148 ("powerpc: allow
ioremap within reserved memory regions") and commit de32400dd26e ("wii:
use both mem1 a
This series adds a driver for the GPIO controller used in the Nintendo
Wii game console.
The driver itself, and the related devicetree work should be pretty
uncontroversial, but due to the system architecture of the Wii, I also
had to extend an old resource allocation hack to kernel/resource.c: On
Signed-off-by: Jonathan Neuschäfer
---
.../bindings/gpio/nintendo,hollywood-gpio.txt | 27 ++
.../devicetree/bindings/powerpc/nintendo/wii.txt | 9 +---
2 files changed, 28 insertions(+), 8 deletions(-)
create mode 100644
Documentation/devicetree/bindings/gpio/ni
The Hollywood chipset's GPIO controller has two sets of registers: One
for access by the PowerPC CPU, and one for access by the ARM coprocessor
(but both are accessible from the PPC because the memory firewall
(AHBPROT) is usually disabled when booting Linux, today).
The wii_power_off function cur
The Hollywood GPIO controller supports 32 GPIOs, but on the Wii, only 24
are used.
Signed-off-by: Jonathan Neuschäfer
---
arch/powerpc/boot/dts/wii.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/powerpc/boot/dts/wii.dts b/arch/powerpc/boot/dts/wii.dts
index 40b324b6391e..7235e37591
These are the GPIO line names on a Nintendo Wii, as documented in:
https://wiibrew.org/wiki/Hardware/Hollywood_GPIOs
Signed-off-by: Jonathan Neuschäfer
---
arch/powerpc/boot/dts/wii.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/powerpc/boot/dts/wii.dts b/arch/powerpc/boot/
The Nintendo Wii's chipset (called "Hollywood") has a GPIO controller
that supports a configurable number of pins (up to 32), interrupts, and
some special mechanisms to share the controller between the system's
security processor (an ARM926) and the PowerPC CPU. Pin multiplexing is
not supported.
On Sun, Jan 14, 2018 at 10:40:36PM +0100, Arnd Bergmann wrote:
> Right. I've done some more investigation anyway, starting over with the
> analysis of the gcc options that change it. I've found now that turning
> off '-fcode-hoisting' but leaving on the other options I had suspected
> earlier (-O2
On Sun, Jan 14, 2018 at 11:42:59PM +0100, Maciej S. Szmigiero wrote:
> On 11.01.2018 07:43, Nicolin Chen wrote:
> > The cpu_dai_drv is only used for symmetric_rates. So this patch replaces
> > it with a synchronous boolean flag.
>
> You make cpu_dai_drv common to all SSI instances instead of per-i
On Sun, Jan 14, 2018 at 11:40:31PM +0100, Maciej S. Szmigiero wrote:
> > case SND_SOC_DAIFMT_I2S:
> > - regmap_update_bits(regs, REG_SSI_STCCR,
> > - SSI_SxCCR_DC_MASK, SSI_SxCCR_DC(2));
> > - regmap_update_bits(regs, REG_SSI_SRCCR,
> > -
On Sun, Jan 14, 2018 at 11:34:37PM +0100, Maciej S. Szmigiero wrote:
> > + /* Check if the opposite stream is active */
> > + aactive = ssi->streams & BIT(!dir);
>^
> Here an implicit assumption that either RX == 0, TX == 1 or
> RX == 1, TX == 0 still remain
On Sun, Jan 14, 2018 at 11:34:01PM +0100, Maciej S. Szmigiero wrote:
> > + bool dir = (&ssi->regvals[TX] == vals) ? TX : RX;
> Using a bool variable for a bit index (and array index in other parts
> of code) looks just wrong.
>
> Even a simple int would look better IMHO here (and in patch 5 tha
Hi Christophe,
On 14/01/18 06:17, Christophe JAILLET wrote:
> Le 13/01/2018 à 15:22, Borislav Petkov a écrit :
>> + Chris Packham who's been fixing some stuff in here too.
>>
>> On Sat, Jan 13, 2018 at 08:28:21AM +0100, Christophe JAILLET wrote:
>>> Reorder the error handling code in order to rele
On 11.01.2018 07:43, Nicolin Chen wrote:
> The cpu_dai_drv is only used for symmetric_rates. So this patch replaces
> it with a synchronous boolean flag.
You make cpu_dai_drv common to all SSI instances instead of per-instance.
What if you have multiple SSIs in the system with different
symmetric
On 11.01.2018 07:43, Nicolin Chen wrote:
> The _fsl_ssi_set_dai_fmt() is a helper function being called from
> fsl_ssi_set_dai_fmt() as an ASoC operation and fsl_ssi_hw_init()
> mainly for AC97 format initialization.
>
> This patch cleans the _fsl_ssi_set_dai_fmt() in following ways:
> * Removing
On 11.01.2018 07:43, Nicolin Chen wrote:
> The trigger() calls fsl_ssi_tx_config() and fsl_ssi_rx_config(),
> and both of them jump to fsl_ssi_config(). And fsl_ssi_config()
> later calls another fsl_ssi_rxtx_config().
>
> However, the whole routine, especially fsl_ssi_config() function,
> is too
On 11.01.2018 07:43, Nicolin Chen wrote:
> The define of fsl_ssi_disable_val is not so clear as it mixes two
> steps of calculations together. And those parameter names are also
> a bit long to read.
>
> Since it just tries to exclude the shared bits from the regvals of
> current stream while the
On 11.01.2018 07:43, Nicolin Chen wrote:
> Checking TE and RE bits in SCR register doesn't work for AC97 mode
> which enables SSIEN, TE and RE in the fsl_ssi_setup_ac97() that's
> called during probe().
>
> So when running into the trigger(), it will always get the result
> of both TE and RE being
Hi Linus,
Please pull some more powerpc fixes for 4.15, sorry these are so late.
The following changes since commit ecb101aed86156ec7cd71e5dca668e09146e6994:
powerpc/mm: Fix SEGV on mapped region to return SEGV_ACCERR (2018-01-02
21:12:33 +1100)
are available in the Git repository at:
htt
On Fri, Jan 12, 2018 at 11:10 PM, Segher Boessenkool
wrote:
> On Fri, Jan 12, 2018 at 10:45:31PM +0100, Arnd Bergmann wrote:
>> > I guess you could enable the _x routines whenever you use ubsan? Ubsan
>> > will cause much bigger code growth than the handful of insns in those
>> > routines?
>>
>>
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