For PSL9 currently we aren't dumping the PSL FIR register when a
PSL error interrupt is triggered. Contents of this register are useful
in debugging AFU issues.
This patch fixes issue by adding a new service_layer_ops callback
cxl_native_err_irq_dump_regs_psl9() to dump the PSL_FIR registers on a
The handlers support PR KVM from the day one; however the PR KVM's
enable/disable hcalls handler missed these ones.
Signed-off-by: Alexey Kardashevskiy
---
arch/powerpc/kvm/book3s_pr_papr.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/powerpc/kvm/book3s_pr_papr.c
b/arch/powerpc/kv
kvmppc_gpa_to_ua() accesses KVM memory slot array via
srcu_dereference_check() and this produces warnings from RCU like below.
This extends the existing srcu_read_lock/unlock to cover that
kvmppc_gpa_to_ua() as well.
We did not hit this before as this lock is not needed for the realmode
handlers
On Wednesday 11 October 2017 09:42 AM, Michael Ellerman wrote:
> Kamalesh Babulal writes:
>
>> Use WARN_ON(), while running out of stubs in stub_for_addr()
>> and abort loading of the module instead of BUG_ON().
>
> Thanks. This looks good in principle. Have you actually tested it to
> make sure
On Wednesday 11 October 2017 09:41 AM, Michael Ellerman wrote:
Anju T Sudhakar writes:
Call trace observed with latest firmware, and upstream kernel.
[ 14.499938] NIP [c00f318c] init_imc_pmu+0x8c/0xcf0
[ 14.499973] LR [c00f33f8] init_imc_pmu+0x2f8/0xcf0
[ 14.57] Ca
Kamalesh Babulal writes:
> Use WARN_ON(), while running out of stubs in stub_for_addr()
> and abort loading of the module instead of BUG_ON().
Thanks. This looks good in principle. Have you actually tested it to
make sure we do in fact gracefully fail the module load?
cheers
Anju T Sudhakar writes:
> Call trace observed with latest firmware, and upstream kernel.
>
> [ 14.499938] NIP [c00f318c] init_imc_pmu+0x8c/0xcf0
> [ 14.499973] LR [c00f33f8] init_imc_pmu+0x2f8/0xcf0
> [ 14.57] Call Trace:
> [ 14.500027] [c03fed18f710] [c00f
Hi Michael,
On Tue, Oct 10, 2017 at 09:10:32PM +1100, Michael Ellerman wrote:
> wei.guo.si...@gmail.com writes:
>
> > From: Simon Guo
> >
> > GCC 7 will take "r2" in clobber list as an error will it will get following
> > build errors for powerpc ptrace selftests even with -fno-pic option:
> >
Current vDSO64 implementation does not have support for coarse clocks
(CLOCK_MONOTONIC_COARSE, CLOCK_REALTIME_COARSE), for which it falls back
to system call, increasing the response time, vDSO implementation reduces
the cycle time. Below is a benchmark of the difference in execution times.
(Non-c
In preparation for unconditionally passing the struct timer_list pointer to
all timer callbacks, switch to using the new timer_setup() and from_timer()
to pass the timer pointer explicitly.
Cc: "Martin K. Petersen"
Cc: Tyrel Datwyler
Cc: Benjamin Herrenschmidt
Cc: Paul Mackerras
Cc: Michael El
On Mon, 9 Oct 2017 12:07:51 +0200 Laurent Dufour
wrote:
> +/*
> + * Advertise that we call the Speculative Page Fault handler.
> + */
> +#if defined(CONFIG_X86_64) && defined(CONFIG_SMP)
> +#define __HAVE_ARCH_CALL_SPF
> +#endif
Here's where I mess up your life ;)
It would be more idiomatic t
Michael Ellerman writes:
> Anju T Sudhakar writes:
>
>> Add a kernel command line parameter option to disable In-Memory Collection
>> (IMC) counters and add documentation. This helps in debug.
>
> I'd really rather we didn't. Do we *really* need this?
>
> We don't have command line parameters to
On Wed, 11 Oct 2017 01:58:28 +1000
Nicholas Piggin wrote:
> Ahh okay, pseries is using the start-cpu RTAS call to enter at
> generic_secondary_smp_init() as well. So we can take it out for
> pseries as well.
This patch seems to do the trick for pseries guests too:
powerpc/64s: Avoid waiting fo
Hi Will,
Ok, I will add your patch at the end of my series.
Thank you,
Pavel
>
> I was thinking that you could just add my patch to the end of your series
> and have the whole lot go up like that. If you want to merge it with your
> patch, I'm fine with that too.
>
> Will
>
> --
> To unsubscribe
I wanted to thank you Michal for spending time and doing the in-depth
reviews of every incremental change. Overall the series is in much
better shape now because of your feedback.
Pavel
On 10/10/2017 10:15 AM, Michal Hocko wrote:
Btw. thanks for your persistance and willingness to go over all
Hi Pavel,
On Tue, Oct 10, 2017 at 01:07:35PM -0400, Pavel Tatashin wrote:
> Thank you for doing this work. How would you like to proceed?
>
> - If you OK for my series to be accepted as-is, so your patch can be
> added later on top, I think, I need an ack from you for kasan changes.
> - Otherwise
Hi Will,
Thank you for doing this work. How would you like to proceed?
- If you OK for my series to be accepted as-is, so your patch can be
added later on top, I think, I need an ack from you for kasan changes.
- Otherwise, I can replace: 4267aaf1d279 arm64/kasan: add and use
kasan_map_populate()
Call trace observed with latest firmware, and upstream kernel.
[ 14.499938] NIP [c00f318c] init_imc_pmu+0x8c/0xcf0
[ 14.499973] LR [c00f33f8] init_imc_pmu+0x2f8/0xcf0
[ 14.57] Call Trace:
[ 14.500027] [c03fed18f710] [c00f33c8] init_imc_pmu+0x2c8/0xcf0
(unre
Currently protection key feature is erroneously configured to
be enabled for any flavor of PPC64. This patch fixes it.
Signed-off-by: Ram Pai
---
arch/powerpc/Kconfig |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 7dee4
On Tue, Oct 10, 2017 at 08:00:27PM +1100, Michael Ellerman wrote:
> Ram Pai writes:
>
> > "commit df3735c5 -- x86,mpx: make mpx depend on x86-64 to free up VMA flag"
> > added the same vm highmem flag we had introduced for PKEY4. That broke
> > some of the definitions in pkeys.h
> >
> > This patc
On Tue, 10 Oct 2017 21:44:15 +1000
Nicholas Piggin wrote:
> On Tue, 10 Oct 2017 22:11:46 +1100
> Michael Ellerman wrote:
>
> > Nicholas Piggin writes:
> >
> > > OPAL boot does not insert secondaries at 0x60 to wait at the secondary
> > > hold spinloop. Instead it keeps them held in firmware
Hi Pavel,
On Mon, Oct 09, 2017 at 06:19:29PM -0400, Pavel Tatashin wrote:
> During early boot, kasan uses vmemmap_populate() to establish its shadow
> memory. But, that interface is intended for struct pages use.
>
> Because of the current project, vmemmap won't be zeroed during allocation,
> but
Use WARN_ON(), while running out of stubs in stub_for_addr()
and abort loading of the module instead of BUG_ON().
Signed-off-by: Kamalesh Babulal
---
arch/powerpc/kernel/module_64.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/kernel/module_64.c b/arch/power
> Btw. I would add your example from
> http://lkml.kernel.org/r/bcf24369-ac37-cedd-a264-3396fb5cf...@oracle.com
> to do changelog
>
Will add, thank you for your review.
Pavel
Btw. thanks for your persistance and willingness to go over all the
suggestions which might not have been consistent btween different
versions. I believe this is a general improvement in the early
initialization code. We do not rely on an implicit zeroing which just
happens to work by a chance. The
On Tue 10-10-17 15:44:41, Michal Hocko wrote:
> On Mon 09-10-17 18:19:27, Pavel Tatashin wrote:
> > Some memory is reserved but unavailable: not present in memblock.memory
> > (because not backed by physical pages), but present in memblock.reserved.
> > Such memory has backing struct pages, but the
On Tue, 10 Oct 2017 19:09:54 +0530
"Aneesh Kumar K.V" wrote:
>
>
> On 10/10/2017 04:02 PM, Nicholas Piggin wrote:
> > On Tue, 10 Oct 2017 15:52:02 +0530
> > "Aneesh Kumar K.V" wrote:
> >
> >> On 10/10/2017 03:46 PM, Nicholas Piggin wrote:
> >>> Signed-off-by: Nicholas Piggin
> >>> ---
> >>>
On Mon 09-10-17 18:19:27, Pavel Tatashin wrote:
> Some memory is reserved but unavailable: not present in memblock.memory
> (because not backed by physical pages), but present in memblock.reserved.
> Such memory has backing struct pages, but they are not initialized by going
> through __init_single
On 10/10/2017 04:02 PM, Nicholas Piggin wrote:
On Tue, 10 Oct 2017 15:52:02 +0530
"Aneesh Kumar K.V" wrote:
On 10/10/2017 03:46 PM, Nicholas Piggin wrote:
Signed-off-by: Nicholas Piggin
---
arch/powerpc/mm/tlb-radix.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git
On Fri 06-10-17 11:25:16, Pasha Tatashin wrote:
> Hi Michal,
>
> >
> > As I've said in other reply this should go in only if the scenario you
> > describe is real. I am somehow suspicious to be honest. I simply do not
> > see how those weird struct pages would be in a valid pfn range of any
> > z
On Tue, 10 Oct 2017 20:18:28 +1000
Nicholas Piggin wrote:
> - Add another case where msgsync is required.
> - Required barrier sequence for global doorbells is msgsync ; lwsync
> - POWER9 DD1 has a different barrier sequence that we don't implement,
> so remove
This last item was not included
On Tue, 10 Oct 2017 22:11:46 +1100
Michael Ellerman wrote:
> Nicholas Piggin writes:
>
> > OPAL boot does not insert secondaries at 0x60 to wait at the secondary
> > hold spinloop. Instead it keeps them held in firmware until the
> > opal_start_cpu call is made, which directs them where the cal
Nicholas Piggin writes:
> OPAL boot does not insert secondaries at 0x60 to wait at the secondary
> hold spinloop. Instead it keeps them held in firmware until the
> opal_start_cpu call is made, which directs them where the caller
> specifies. Linux inserts them into generic_secondary_smp_init(),
Kees Cook writes:
> When available, CONFIG_KERNEL_RWX should be default-enabled for PPC64.
> On PPC32, there is a performance trade-off.
Thanks for prodding us. But I think we need some more test cycles on
this before we make it the default.
As Balbir said it's currently not compatible with REL
On Tue, 10 Oct 2017 15:52:02 +0530
"Aneesh Kumar K.V" wrote:
> On 10/10/2017 03:46 PM, Nicholas Piggin wrote:
> > Signed-off-by: Nicholas Piggin
> > ---
> > arch/powerpc/mm/tlb-radix.c | 3 ++-
> > 1 file changed, 2 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/powerpc/mm/tlb-radix.
On 10/10/2017 03:46 PM, Nicholas Piggin wrote:
Signed-off-by: Nicholas Piggin
---
arch/powerpc/mm/tlb-radix.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/mm/tlb-radix.c b/arch/powerpc/mm/tlb-radix.c
index b3e849c4886e..de414460287a 100644
--- a/arch/po
- Add another case where msgsync is required.
- Required barrier sequence for global doorbells is msgsync ; lwsync
- POWER9 DD1 has a different barrier sequence that we don't implement,
so remove
When msgsnd is used for IPIs to other cores, msgsync must be executed by
the target to order stores
Signed-off-by: Nicholas Piggin
---
arch/powerpc/mm/tlb-radix.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/mm/tlb-radix.c b/arch/powerpc/mm/tlb-radix.c
index b3e849c4886e..de414460287a 100644
--- a/arch/powerpc/mm/tlb-radix.c
+++ b/arch/powerpc/mm/tlb-radix.
wei.guo.si...@gmail.com writes:
> From: Simon Guo
>
> GCC 7 will take "r2" in clobber list as an error will it will get following
> build errors for powerpc ptrace selftests even with -fno-pic option:
> ptrace-tm-vsx.c: In function ‘tm_vsx’:
> ptrace-tm-vsx.c:42:2: error: PIC register clobber
Thomas Gleixner writes:
...
>
> So no, the lockdep assertion triggers in #1 and #2 because
>
>#1 does definitely not hold it
>
>#2 is indirectily protected, but we have no way to express that to lockdep
>
> So yes, it's safe for both cases to remove that assertion.
Thanks for clarifying t
On Tue, 10 Oct 2017 17:11:09 +1000
Nicholas Piggin wrote:
> For shared processor guests (e.g., KVM), add an idle polling mode rather
> than immediately returning to the hypervisor when the guest CPU goes
> idle.
>
> Test setup is a 2 socket POWER9 with 4 guests running, each with vCPUs
> equal t
On 2017/10/10 09:03AM, Santosh Sivaraj wrote:
> * Naveen N. Rao wrote (on 2017-10-09
> 10:39:18 +):
>
> > On 2017/10/09 08:09AM, Santosh Sivaraj wrote:
[snip]
> > > + add r3,r3,r0
> > > + ld r0,CFG_TB_UPDATE_COUNT(r3)
> > > + cmpld cr0,r0,r8 /* check if updated */
* Naveen N. Rao wrote (on 2017-10-09 10:39:18
+):
> On 2017/10/09 08:09AM, Santosh Sivaraj wrote:
> > Current vDSO64 implementation does not have support for coarse clocks
> > (CLOCK_MONOTONIC_COARSE, CLOCK_REALTIME_COARSE), for which it falls back
> > to system call, increasing the response
Anju T Sudhakar writes:
> Add a kernel command line parameter option to disable In-Memory Collection
> (IMC) counters and add documentation. This helps in debug.
I'd really rather we didn't. Do we *really* need this?
We don't have command line parameters to disable any of the other ~20
PMUs, wh
Ram Pai writes:
> "commit df3735c5 -- x86,mpx: make mpx depend on x86-64 to free up VMA flag"
> added the same vm highmem flag we had introduced for PKEY4. That broke
> some of the definitions in pkeys.h
>
> This patch fixes the issue.
>
> Signed-off-by: Ram Pai
> ---
> arch/powerpc/include/asm
Hi Vaibhav,
I think we can make it slightly cleaner by registering a different
callback for psl8 and psl9. The callback 'err_irq_dump_registers' is
already in place, it could just point to a different function in
psl8_ops and psl9_ops.
Fred
Le 09/10/2017 à 19:58, Vaibhav Jain a écrit :
Le 09/10/2017 à 19:56, Vaibhav Jain a écrit :
PSL9 doesn't have a FIR2 register as was the case with PSL8. However
currently the register definitions in 'cxl.h' have a definition for
PSL9_FIR2 that actually points to PSL9_FIR_MASK register in the P1
area at offset 0x308.
So this patch renames
For shared processor guests (e.g., KVM), add an idle polling mode rather
than immediately returning to the hypervisor when the guest CPU goes
idle.
Test setup is a 2 socket POWER9 with 4 guests running, each with vCPUs
equal to 1/2 of real of CPUs. Saturated each guest with tbench. Using
polling i
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