On Mon, 2017-08-28 at 11:55 +0530, Aneesh Kumar K.V wrote:
> We need to add memory barrier so that the page table walk doesn't happen
> before the cpumask is set and made visible to the other cpus. We need
> to use a sync here instead of lwsync because lwsync is not sufficient for
> store/load orde
On 28/08/17 16:25, Aneesh Kumar K.V wrote:
We need to add memory barrier so that the page table walk doesn't happen
before the cpumask is set and made visible to the other cpus. We need
to use a sync here instead of lwsync because lwsync is not sufficient for
store/load ordering.
We also need to
Alexey Kardashevskiy writes:
> The pci_dn struct caches a OF device node pointer in order to access
> the "ibm,loc-code" property when EEH is recovering.
>
> However, when this happens in eeh_dev_check_failure(), we also have
> a pci_dev pointer which should have a valid pointer to the device nod
Alexey Kardashevskiy writes:
> The eeh_dev struct hold a config space address of an associated node
> and the very same address is also stored in the pci_dn struct which
> is always present during the eeh_dev lifetime.
>
> This uses bus:devfn directly from pci_dn instead of cached and packed
> co
Hi Christoph,
On Sun, Aug 27, 2017 at 6:10 PM, Christoph Hellwig wrote:
> After we removed all the dead wood it turns out only two architectures
> actually implement dma_cache_sync as a no-op: mips and parisc. Add
s/no-op/real op/
> a cache_sync method to struct dma_map_ops and implement it fo
We need to add memory barrier so that the page table walk doesn't happen
before the cpumask is set and made visible to the other cpus. We need
to use a sync here instead of lwsync because lwsync is not sufficient for
store/load ordering.
We also need to add an if (mm) check so that we do the right
Alexey Kardashevskiy writes:
> The eeh_dev struct already holds a pointer to pci_dn which it does not
> exist without and pci_dn itself holds the very same pointer so just
> use it.
>
> Signed-off-by: Alexey Kardashevskiy
> ---
> arch/powerpc/include/asm/eeh.h | 1 -
> arch/power
On Mon, Aug 28, 2017 at 06:28:08AM +0100, Al Viro wrote:
> On Mon, Aug 28, 2017 at 02:38:37PM +1000, Paul Mackerras wrote:
> > On Sun, Aug 27, 2017 at 10:02:20PM +0100, Al Viro wrote:
> > > On Wed, Aug 23, 2017 at 04:06:24PM +1000, Paul Mackerras wrote:
> > >
> > > > It seems to me that it would b
clk_div_table are not supposed to change at runtime.
mpc512x_clk_divtable function working with const
clk_div_table. So mark the non-const structs as const.
Signed-off-by: Arvind Yadav
---
arch/powerpc/platforms/512x/clock-commonclk.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
di
Some Power9 boxes will have this adapter installed, so add it to the
defconfig so we can boot on those machines without an initrd.
Signed-off-by: Michael Ellerman
---
arch/powerpc/configs/powernv_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/powerpc/configs/powernv_defconfig
Paul Mackerras writes:
> diff --git a/arch/powerpc/lib/quad.S b/arch/powerpc/lib/quad.S
> new file mode 100644
> index 000..2cc77dc
> --- /dev/null
> +++ b/arch/powerpc/lib/quad.S
> @@ -0,0 +1,62 @@
> +/*
> + * Quadword loads and stores
> + * for use in instruction emulation.
> + *
> + * Copy
On 28/08/17 14:15, Vaibhav Jain wrote:
Some AFUs differentiate between multiple PE's based on their
PE-ids. Unfortunately presently cxl provides no way for external
users (libcxl/kernel-api) to control the id assigned to a specific
PE. The ids are currently assigned serially to PE's and are dolle
On Mon, Aug 28, 2017 at 02:38:37PM +1000, Paul Mackerras wrote:
> On Sun, Aug 27, 2017 at 10:02:20PM +0100, Al Viro wrote:
> > On Wed, Aug 23, 2017 at 04:06:24PM +1000, Paul Mackerras wrote:
> >
> > > It seems to me that it would be better to do the anon_inode_getfd()
> > > call before the kvm_get
Michael Ellerman [m...@ellerman.id.au] wrote:
> Hi Suka,
>
> A few more things ...
>
> Sukadev Bhattiprolu writes:
>
> > diff --git a/arch/powerpc/platforms/powernv/copy-paste.h
> > b/arch/powerpc/platforms/powernv/copy-paste.h
> > new file mode 100644
> > index 000..7783bb8
> > --- /dev/n
Michael Ellerman [m...@ellerman.id.au] wrote:
> Hi Suka,
>
> More comments :)
Thanks!
>
> Sukadev Bhattiprolu writes:
>
> > diff --git a/arch/powerpc/platforms/powernv/vas-window.c
> > b/arch/powerpc/platforms/powernv/vas-window.c
> > index 2dd4b63..24288dd 100644
> > --- a/arch/powerpc/plat
Michael Ellerman [m...@ellerman.id.au] wrote:
> Sukadev Bhattiprolu writes:
>
> > Define an interface to return a system-wide unique id for a given VAS
> > window.
> >
> > The vas_win_id() will be used in a follow-on patch to generate an unique
> > handle for a user space receive window. Applicat
Michael Ellerman [m...@ellerman.id.au] wrote:
> Sukadev Bhattiprolu writes:
> > diff --git a/arch/powerpc/platforms/powernv/vas-window.c
> > b/arch/powerpc/platforms/powernv/vas-window.c
> > + rc = ida_pre_get(ida, GFP_KERNEL);
> > + if (!rc)
> > + return -EAGAIN;
> > +
> > + spi
Michael Ellerman [m...@ellerman.id.au] wrote:
> Sukadev Bhattiprolu writes:
> > diff --git a/arch/powerpc/platforms/powernv/vas-window.c
> > b/arch/powerpc/platforms/powernv/vas-window.c
> > index a3a705a..3a50d6a 100644
> > --- a/arch/powerpc/platforms/powernv/vas-window.c
> > +++ b/arch/powerpc
On Sun, Aug 27, 2017 at 10:02:20PM +0100, Al Viro wrote:
> On Wed, Aug 23, 2017 at 04:06:24PM +1000, Paul Mackerras wrote:
>
> > It seems to me that it would be better to do the anon_inode_getfd()
> > call before the kvm_get_kvm() call, and go to the fail label if it
> > fails.
>
> And what happe
Al Viro pointed out that while one thread of a process is executing
in kvm_vm_ioctl_create_spapr_tce(), another thread could guess the
file descriptor returned by anon_inode_getfd() and close() it before
the first thread has added it to the kvm->arch.spapr_tce_tables list.
That highlights a more ge
Michael Ellerman [m...@ellerman.id.au] wrote:
> Hi Suka,
>
> Comments inline.
>
> Sukadev Bhattiprolu writes:
> > diff --git a/arch/powerpc/platforms/powernv/vas-window.c
> > b/arch/powerpc/platforms/powernv/vas-window.c
> > index 6156fbe..a3a705a 100644
> > --- a/arch/powerpc/platforms/powernv
This fixes a couple more bits of fallout from the new hard lockup watchdog
patch.
It restores the required hw_nmi_get_sample_period() function for the
perf watchdog, and removes some function declarations on 64e that are only
defined for 64s. This fixes the 64e build when the hardlockup detector i
On 28/08/17 14:15, Vaibhav Jain wrote:
Make sure to set the valid-bit in software-state field of the
populated PE. This was earlier missing for dedicated mode AFUs, hence
was causing a PSL freeze when the AFU was activated.
Signed-off-by: Vaibhav Jain
Acked-by: Andrew Donnellan
---
drive
Make sure to set the valid-bit in software-state field of the
populated PE. This was earlier missing for dedicated mode AFUs, hence
was causing a PSL freeze when the AFU was activated.
Signed-off-by: Vaibhav Jain
---
drivers/misc/cxl/native.c | 4
1 file changed, 4 insertions(+)
diff --git
Some AFUs differentiate between multiple PE's based on their
PE-ids. Unfortunately presently cxl provides no way for external
users (libcxl/kernel-api) to control the id assigned to a specific
PE. The ids are currently assigned serially to PE's and are dolled out
using an idr table.
With this patc
On Wed, Aug 23, 2017 at 04:06:24PM +1000, Paul Mackerras wrote:
> It seems to me that it would be better to do the anon_inode_getfd()
> call before the kvm_get_kvm() call, and go to the fail label if it
> fails.
And what happens if another thread does close() on the (guessed) fd?
From: Markus Elfring
Date: Sun, 27 Aug 2017 22:00:22 +0200
Omit an extra message for a memory allocation failure in this function.
This issue was detected by using the Coccinelle software.
Signed-off-by: Markus Elfring
---
drivers/leds/leds-powernv.c | 6 +-
1 file changed, 1 insertion(+)
After we removed all the dead wood it turns out only two architectures
actually implement dma_cache_sync as a no-op: mips and parisc. Add
a cache_sync method to struct dma_map_ops and implement it for the
mips defualt DMA ops, and the parisc pa11 ops.
Note that arm, arc and openrisc support DMA_A
sh does not implement DMA_ATTR_NON_CONSISTENT allocations, so it doesn't
make any sense to do any work in dma_cache_sync given that it
must be a no-op when dma_alloc_attrs returns coherent memory.
On the other hand sh uses dma_cache_sync internally in the dma_ops
implementation and for the maple b
xtensa does not implement DMA_ATTR_NON_CONSISTENT allocations, so it
doesn't make any sense to do any work in dma_cache_sync given that it
must be a no-op when dma_alloc_attrs returns coherent memory.
Signed-off-by: Christoph Hellwig
---
arch/xtensa/include/asm/dma-mapping.h | 6 --
arch/xt
unicore32 does not implement DMA_ATTR_NON_CONSISTENT allocations, so it
doesn't make any sense to do any work in dma_cache_sync given that it
must be a no-op when dma_alloc_attrs returns coherent memory.
Signed-off-by: Christoph Hellwig
---
arch/unicore32/include/asm/cacheflush.h | 9 -
powerpc does not implement DMA_ATTR_NON_CONSISTENT allocations, so it
doesn't make any sense to do any work in dma_cache_sync given that it
must be a no-op when dma_alloc_attrs returns coherent memory.
Signed-off-by: Christoph Hellwig
---
arch/powerpc/include/asm/dma-mapping.h | 2 --
1 file cha
mn10300 does not implement DMA_ATTR_NON_CONSISTENT allocations, so it
doesn't make any sense to do any work in dma_cache_sync given that it must
be a no-op when dma_alloc_attrs returns coherent memory.
Signed-off-by: Christoph Hellwig
---
arch/mn10300/include/asm/dma-mapping.h | 4
1 file c
microblaze does not implement DMA_ATTR_NON_CONSISTENT allocations, so it
doesn't make any sense to do any work in dma_cache_sync given that it
must be a no-op when dma_alloc_attrs returns coherent memory.
This also allows moving __dma_sync out of the microblaze asm/dma-mapping.h
and thus greatly r
ia64 does not implement DMA_ATTR_NON_CONSISTENT allocations, so it doesn't
make any sense to do any work in dma_cache_sync given that it must be a
no-op when dma_alloc_attrs returns coherent memory.
Signed-off-by: Christoph Hellwig
---
arch/ia64/include/asm/dma-mapping.h | 5 -
1 file change
The floppy drivers doesn't otherwise use the DMA API, so indirecting
through it just for cache flushing in MIPS-specific code just call
dma_cache_wback_inv directly.
Signed-off-by: Christoph Hellwig
---
arch/mips/include/asm/floppy.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
dif
Only mips defines this helper, so remove all the other arch definitions.
Signed-off-by: Christoph Hellwig
---
arch/alpha/include/asm/floppy.h| 2 --
arch/powerpc/include/asm/floppy.h | 2 --
arch/sparc/include/asm/floppy_32.h | 1 -
arch/sparc/include/asm/floppy_64.h | 1 -
drivers/block/fl
The dma_cache_sync routines is used to flush caches for memory returned
by dma_alloc_attrs with the DMA_ATTR_NON_CONSISTENT flag (or previously
from dma_alloc_noncoherent), but the requirements for it seems to be
frequently misunderstood. dma_cache_sync is documented to be a no-op for
allocations
frv does not implement DMA_ATTR_NON_CONSISTENT allocations, so it doesn't
make any sense to do any work in dma_cache_sync given that it must be a
no-op when dma_alloc_attrs returns coherent memory.
Signed-off-by: Christoph Hellwig
---
arch/frv/include/asm/dma-mapping.h | 1 -
1 file changed, 1 d
x86 does not implement DMA_ATTR_NON_CONSISTENT allocations, so it doesn't
make any sense to do any work in dma_cache_sync given that it must be a
no-op when dma_alloc_attrs returns coherent memory.
Signed-off-by: Christoph Hellwig
Signed-off-by: Madalin Bucur
---
drivers/net/ethernet/freescale/dpaa/dpaa_eth.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c
b/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c
index 73ca8d7..4225806 100644
--- a/drivers/net/ethernet/freescal
Signed-off-by: Madalin Bucur
---
Documentation/networking/dpaa.txt | 68 ++-
1 file changed, 67 insertions(+), 1 deletion(-)
diff --git a/Documentation/networking/dpaa.txt
b/Documentation/networking/dpaa.txt
index 76e016d..f88194f 100644
--- a/Documentation/n
Set the skb hash when then FMan Keygen hash result is available.
Signed-off-by: Madalin Bucur
---
drivers/net/ethernet/freescale/dpaa/dpaa_eth.c | 23 +++---
drivers/net/ethernet/freescale/dpaa/dpaa_eth.h | 1 +
drivers/net/ethernet/freescale/dpaa/dpaa_ethtool.c | 9 +++
Allow ethtool control of the Rx flow hashing. By default RSS is
enabled, this allows to turn it off by bypassing the FMan Keygen
block and sending all traffic on the default Rx frame queue.
Signed-off-by: Madalin Bucur
---
drivers/net/ethernet/freescale/dpaa/dpaa_ethtool.c | 113
From: Iordache Florinel-R70177
Add support for the FMan Keygen with a hardcoded scheme to spread
incoming traffic on a FQ range based on source and destination IPs
and ports.
Signed-off-by: Iordache Florinel
Signed-off-by: Madalin Bucur
---
drivers/net/ethernet/freescale/fman/Makefile |
Add a block of 128 Rx frame queues per port. The FMan hardware will
send traffic on one of these queues based on the FMan port Parse
Classify Distribute setup. The hash computed by the FMan Keygen
block will select the Rx FQ.
Signed-off-by: Madalin Bucur
---
drivers/net/ethernet/freescale/dpaa/d
Signed-off-by: Madalin Bucur
---
drivers/net/ethernet/freescale/fman/fman.c | 80 +
drivers/net/ethernet/freescale/fman/fman.h | 75 +++
drivers/net/ethernet/freescale/fman/fman_port.c | 8 +--
3 files changed, 82 insertions(+), 81 deletions(
This patch set introduces Receive Side Scaling for the DPAA Ethernet
driver. Documentation is updated with details related to the new
feature and limitations that apply.
Added also a small fix.
v2: removed a C++ style comment
v3: move struct fman to header file to avoid exporting a function
v4: ad
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