This adds code to the load and store emulation code to byte-swap
the data appropriately when the process being emulated is set to
the opposite endianness to that of the kernel.
This also enables the emulation for the multiple-register loads
and stores (lmw, stmw, lswi, stswi, lswx, stswx) to work
When a 64-bit processor is executing in 32-bit mode, the update forms
of load and store instructions are required by the architecture to
write the full 64-bit effective address into the RA register, though
only the bottom 32 bits are used to address memory. Currently,
the instruction emulation cod
This adds lfdp[x] and stfdp[x] to the set of instructions that
analyse_instr() and emulate_step() understand.
Signed-off-by: Paul Mackerras
---
arch/powerpc/lib/sstep.c | 76 ++--
1 file changed, 60 insertions(+), 16 deletions(-)
diff --git a/arch/pow
This adds code to analyse_instr() and emulate_step() to handle the
vector element loads and stores:
lvebx, lvehx, lvewx, stvebx, stvehx, stvewx.
Signed-off-by: Paul Mackerras
---
arch/powerpc/lib/sstep.c | 50 ++--
1 file changed, 48 insertions(+), 2
At present, the analyse_instr/emulate_step code checks for the
relevant MSR_FP/VEC/VSX bit being set when a FP/VMX/VSX load
or store is decoded, but doesn't recheck the bit before reading or
writing the relevant FP/VMX/VSX register in emulate_step().
Since we don't have preemption disabled, it is
At the moment, emulation of loads and stores of up to 8 bytes to
unaligned addresses on a little-endian system uses a sequence of
single-byte loads or stores to memory. This is rather inefficient,
and the code is hard to follow because it has many ifdefs.
In addition, the Power ISA has requirement
The addpcis instruction puts the sum of the next instruction address
plus a constant into a register. Since the result depends on the
address of the instruction, it will give an incorrect result if it
is single-stepped out of line, which is what the *probes subsystem
will currently do if a probe i
The case added for the isel instruction was added inside a switch
statement which uses the 10-bit minor opcode field in the 0x7fe
bits of the instruction word. However, for the isel instruction,
the minor opcode field is only the 0x3e bits, and the 0x7c0 bits
are used for the "BC" field, which ind
The analyse_instr function currently doesn't just work out what an
instruction does, it also executes those instructions whose effect
is only to update CPU registers that are stored in struct pt_regs.
This is undesirable because optprobes uses analyse_instr to work out
if an instruction could be su
This extends the instruction emulation infrastructure in sstep.c to
handle all the load and store instructions defined in the Power ISA
v3.0, except for the atomic memory operations, ldmx (which was never
implemented), lfdp/stfdp, and the vector element load/stores.
The instructions added are:
In
This patch series extends the code in arch/powerpc/lib/sstep.c so that
it handles almost all load and store instructions -- all except the
atomic memory operations (lwat, stwat, etc.). It also makes sure that
we use the largest possible aligned accesses to access memory and that
we don't access th
> -Original Message-
> From: David Miller [mailto:da...@davemloft.net]
> Subject: Re: [PATCH v3 0/7] Add RSS to DPAA 1.x Ethernet driver
>
> From: David Miller
> Date: Thu, 24 Aug 2017 09:42:20 -0700 (PDT)
>
> > From: Madalin Bucur
> > Date: Thu, 24 Aug 2017 10:28:21 +0300
> >
> >> This
Le 24/08/2017 à 20:47, Benjamin Herrenschmidt a écrit :
On Thu, 2017-08-24 at 18:40 +0200, Frederic Barrat wrote:
The decrementing part is giving me troubles, and I think it makes sense:
if I decrement the counter when detaching the context from the capi
card, then the next TLBIs for the memo
When stop is executed with EC=ESL=0, it appears to execute like a
normal instruction (resuming from NIP when woken by interrupt).
So all the save/restore handling can be avoided completely. In
particular NV GPRs do not have to be saved, and MSR does not have
to be switched back to kernel MSR.
So m
The hardware can execute stop in any context, and KVM does not
require real mode because siblings do not share MMU state. This
saves a switch to real-mode when going idle.
Acked-by: Gautham R. Shenoy
Signed-off-by: Nicholas Piggin
---
arch/powerpc/kernel/idle_book3s.S | 9 +
1 file chan
Reviewed-by: Gautham R. Shenoy
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/cpuidle.h | 16
arch/powerpc/kernel/idle_book3s.S | 26 --
2 files changed, 20 insertions(+), 22 deletions(-)
diff --git a/arch/powerpc/include/asm/cpuidle.h
b/a
POWER9 CPUs have independent MMU contexts per thread, so KVM does not
need to quiesce secondary threads, so the hwthread_req/hwthread_state
protocol does not have to be used. So patch it away on POWER9, and patch
away the branch from the Linux idle wakeup to kvm_start_guest that is
never used.
Add
These are rebased patches leftover from the unmerged bit of
the idle series.
Based on feedback, I dropped one of the KVM patches, and reworked
the code a bit so it is easier to restore the ability for KVM to
grab secondaries into real mode.
I did a bit more benchmarking, and all up these patches
Hi Suka,
Comments inline.
Sukadev Bhattiprolu writes:
> diff --git a/arch/powerpc/platforms/powernv/vas-window.c
> b/arch/powerpc/platforms/powernv/vas-window.c
> index 6156fbe..a3a705a 100644
> --- a/arch/powerpc/platforms/powernv/vas-window.c
> +++ b/arch/powerpc/platforms/powernv/vas-window.
On 24.08.2017 11:14, Paul Mackerras wrote:
> Nixiaoming pointed out that there is a memory leak in
> kvm_vm_ioctl_create_spapr_tce() if the call to anon_inode_getfd()
> fails; the memory allocated for the kvmppc_spapr_tce_table struct is
> not freed, and nor are the pages allocated for the iommu
Corentin Labbe writes:
> On Thu, Aug 17, 2017 at 10:52:11PM +1000, Michael Ellerman wrote:
>> Corentin Labbe writes:
>>
>> > When building a random powerpc kernel I hit this build error:
>> > CC arch/powerpc/platforms/powernv/opal-imc.o
>> > arch/powerpc/platforms/powernv/opal-imc.c: In
Christophe LEROY writes:
> Le 24/08/2017 à 12:51, Michael Ellerman a écrit :
>> Christophe Leroy writes:
>>
>>> memset() is patched after initialisation to activate the
>>> optimised part which uses cache instructions.
>>>
>>> Today we have a 'b 2f' to skip the optimised patch, which then gets
Rob Herring writes:
> On Tue, Aug 22, 2017 at 12:12 AM, Michael Ellerman
> wrote:
>> Rob Herring writes:
>>
>>> In preparation to remove the full path from device_node.full_name, use
>>> of_find_node_by_path instead of open coding with strcmp.
>>>
>>> Signed-off-by: Rob Herring
>>> Cc: Benjam
From: Michael Bringmann
To: linuxppc-dev@lists.ozlabs.org
To: linux-ker...@vger.kernel.org
Cc: Michael Ellerman
Cc: Michael Bringmann
Cc: John Allen
Cc: Nathan Fontenot
Subject: [PATCH V10 2/2] powerpc/nodes: Ensure enough nodes avail for operations
powerpc/nodes: On systems like PowerPC whic
powerpc/numa: Correct the currently broken capability to set the
topology for shared CPUs in LPARs. At boot time for shared CPU
lpars, the topology for each shared CPU is set to node zero, however,
this is now updated correctly using the Virtual Processor Home Node
(VPHN) capabilities information
From: m...@linux.vnet.ibm.com
To: linuxppc-dev@lists.ozlabs.org, linux-ker...@vger.kernel.org
Cc: nf...@linux.vnet.ibm.com
Cc: m...@linux.vnet.ibm.com
Subject: [PATCH V10 0/2] powerpc/dlpar: Correct display of hot-add/hot-remove
CPUs and memory
On Power systems with shared configurations of CPUs
Michael Ellerman [m...@ellerman.id.au] wrote:
> Hi Suka,
>
> Comments inline ...
>
> Sukadev Bhattiprolu writes:
> > diff --git a/Documentation/devicetree/bindings/powerpc/ibm,vas.txt
> > b/Documentation/devicetree/bindings/powerpc/ibm,vas.txt
> > new file mode 100644
> > index 000..0e3111d
From: Madalin Bucur
Signed-off-by: Madalin Bucur
Signed-off-by: Claudiu Manoil
[Stuart: changed to use ARCH_LAYERSCAPE]
Signed-off-by: Stuart Yoder
Signed-off-by: Roy Pledge
---
drivers/soc/fsl/qbman/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/soc/fsl/
From: Claudiu Manoil
Unlike PPC builds, ARM builds need following headers
explicitly:
+#include for ioread32be()
+#includefor udelay()
Signed-off-by: Claudiu Manoil
Signed-off-by: Roy Pledge
---
drivers/soc/fsl/qbman/dpaa_sys.h | 2 ++
1 file changed, 2 insertions(+)
From: Madalin Bucur
Signed-off-by: Madalin Bucur
Signed-off-by: Claudiu Manoil
Signed-off-by: Roy Pledge
---
drivers/soc/fsl/qbman/bman.c | 22 ++
drivers/soc/fsl/qbman/qman.c | 38 ++
2 files changed, 60 insertions(+)
diff --git a/driv
Rework portal mapping for PPC and ARM. The PPC devices require a
cacheable coherent mapping while ARM will work with a non-cachable/write
combine mapping. This also eliminates the need for manual cache
flushes on ARM
Signed-off-by: Roy Pledge
---
drivers/soc/fsl/qbman/bman.c| 6 +++---
From: Madalin Bucur
Add revision 3.2 of the QBMan block. This is the version
for LS1043A and LS1046A SoCs.
Signed-off-by: Madalin Bucur
Signed-off-by: Roy Pledge
---
drivers/soc/fsl/qbman/qman_ccsr.c | 2 ++
drivers/soc/fsl/qbman/qman_priv.h | 1 +
2 files changed, 3 insertions(+)
diff --gi
From: Valentin Rothberg
The Kconfig symbol for 32bit ARM is 'ARM', not 'ARM32'.
Signed-off-by: Valentin Rothberg
Signed-off-by: Claudiu Manoil
Signed-off-by: Roy Pledge
---
drivers/soc/fsl/qbman/dpaa_sys.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/soc/fsl/qb
From: Claudiu Manoil
Not relevant and arch dependent. Overkill for PPC.
Signed-off-by: Claudiu Manoil
Signed-off-by: Roy Pledge
---
drivers/soc/fsl/qbman/dpaa_sys.h | 4
1 file changed, 4 deletions(-)
diff --git a/drivers/soc/fsl/qbman/dpaa_sys.h b/drivers/soc/fsl/qbman/dpaa_sys.h
index
From: Madalin Bucur
Replace PPC specific set/clear_bits API with standard
bit twiddling so driver is portalable outside PPC.
Signed-off-by: Madalin Bucur
Signed-off-by: Claudiu Manoil
Signed-off-by: Roy Pledge
---
drivers/soc/fsl/qbman/bman.c | 2 +-
drivers/soc/fsl/qbman/qman.c | 8
Updates the QMan and BMan device tree bindings for reserved memory
nodes. This makes the reserved memory allocation compatible with
the shared-dma-pool usage.
Signed-off-by: Roy Pledge
---
Documentation/devicetree/bindings/soc/fsl/bman.txt | 12 +-
Documentation/devicetree/bindings/soc/f
Use the shared-memory-pool mechanism for frame queue descriptor and
packed frame descriptor record area allocations.
Signed-off-by: Roy Pledge
---
drivers/soc/fsl/qbman/qman_ccsr.c | 138 +-
drivers/soc/fsl/qbman/qman_priv.h | 4 +-
drivers/soc/fsl/qbman/qma
Use the shared-memory-pool mechanism for free buffer proxy record
area allocation.
Signed-off-by: Roy Pledge
---
drivers/soc/fsl/qbman/bman_ccsr.c | 35 ++-
drivers/soc/fsl/qbman/bman_priv.h | 3 +++
2 files changed, 37 insertions(+), 1 deletion(-)
diff --git a/
This patch series enables DPAA1 QBMan devices for ARM and
ARM64 architectures. This allows the LS1043A and LS1046A to use
QBMan functionality which allows access to ethernet and cyptographic
devices for example.
Changes since v3:
- Use memremap() instead of ioremap() for non iomem QBMan portal reg
On 8/23/2017 10:30 AM, Borislav Petkov wrote:
On Mon, Jul 24, 2017 at 02:07:54PM -0500, Brijesh Singh wrote:
From: Tom Lendacky
Early in the boot process, add checks to determine if the kernel is
running with Secure Encrypted Virtualization (SEV) active.
Checking for SEV requires checking tha
On Thu, 2017-08-24 at 18:40 +0200, Frederic Barrat wrote:
>
> The decrementing part is giving me troubles, and I think it makes sense:
> if I decrement the counter when detaching the context from the capi
> card, then the next TLBIs for the memory context may be back to local.
Yes, you need to
From: David Miller
Date: Thu, 24 Aug 2017 09:42:20 -0700 (PDT)
> From: Madalin Bucur
> Date: Thu, 24 Aug 2017 10:28:21 +0300
>
>> This patch set introduces Receive Side Scaling for the DPAA Ethernet
>> driver. Documentation is updated with details related to the new
>> feature and limitations t
On Tue, Aug 22, 2017 at 12:12 AM, Michael Ellerman wrote:
> Rob Herring writes:
>
>> In preparation to remove the full path from device_node.full_name, use
>> of_find_node_by_path instead of open coding with strcmp.
>>
>> Signed-off-by: Rob Herring
>> Cc: Benjamin Herrenschmidt
>> Cc: Paul Mack
On 24.08.2017 11:14, Paul Mackerras wrote:
> Nixiaoming pointed out that there is a memory leak in
> kvm_vm_ioctl_create_spapr_tce() if the call to anon_inode_getfd()
> fails; the memory allocated for the kvmppc_spapr_tce_table struct
> is not freed, and nor are the pages allocated for the iommu
>
From: Madalin Bucur
Date: Thu, 24 Aug 2017 10:28:21 +0300
> This patch set introduces Receive Side Scaling for the DPAA Ethernet
> driver. Documentation is updated with details related to the new
> feature and limitations that apply.
> Added also a small fix.
>
> v2: removed a C++ style comment
Le 21/08/2017 à 19:35, Benjamin Herrenschmidt a écrit :
On Mon, 2017-08-21 at 19:27 +0200, Frederic Barrat wrote:
Hi Ben,
Le 24/07/2017 à 06:28, Benjamin Herrenschmidt a écrit :
Instead of comparing the whole CPU mask every time, let's
keep a counter of how many bits are set in the mask. Thu
On 08/24/2017 05:33 AM, Michael Ellerman wrote:
> John Allen writes:
>
>> Check if an LMB is assigned before attempting to call dlpar_acquire_drc in
>> order to avoid any unnecessary rtas calls. This substantially reduces the
>> running time of memory hot add on lpars with large amounts of memory
Le 24/08/2017 à 12:51, Michael Ellerman a écrit :
Christophe Leroy writes:
memset() is patched after initialisation to activate the
optimised part which uses cache instructions.
Today we have a 'b 2f' to skip the optimised patch, which then gets
replaced by a NOP, implying a useless cycle c
On Thu, Aug 24, 2017 at 10:57:26AM +1000, Dave Airlie wrote:
> > Yeah, maybe it's time to disconnect the "default display device" idea
> > from the VGA arbiter. I have no idea what (if any) dependencies X has
> > on the legacy VGA resources. I assume X works fine on power, where it
> > sounds lik
Hello, Laurent.
On Thu, Aug 24, 2017 at 02:10:31PM +0200, Laurent Vivier wrote:
> > Yeah, it just needs to match up new cpus to the cpu ids assigned to
> > the right node.
>
> We are not able to assign the cpu ids to the right node before the CPU
> is present, because firmware doesn't provide CPU
* Michael Ellerman [2017-08-24 20:28:19]:
> Vaidyanathan Srinivasan writes:
>
> > On PowerNV platforms, firmware provides exit latency and
> > target residency for each of the idle states in nano
> > seconds. Cpuidle framework expects the values in micro
> > seconds. Round up to nearest micro
On Thu, 24 Aug 2017 20:27:35 +1000
Paul Mackerras wrote:
> On Sat, Aug 12, 2017 at 02:39:10AM +1000, Nicholas Piggin wrote:
> > Reviewed-by: Gautham R. Shenoy
> > Signed-off-by: Nicholas Piggin
> > ---
> > arch/powerpc/kvm/book3s_hv_rmhandlers.S | 24
> > 1 file change
On Thu, 24 Aug 2017 19:34:35 +1000
Paul Mackerras wrote:
> On Sat, Aug 12, 2017 at 02:39:08AM +1000, Nicholas Piggin wrote:
> > POWER9 CPUs have independent MMU contexts per thread, so KVM does not
> > need to quiesce secondary threads, so the hwthread_req/hwthread_state
> > protocol does not hav
On Wed, 2017-08-23 at 05:47:13 UTC, Michael Ellerman wrote:
> Currently in the vio.c code we use a comparision against the parent
> device node's full path to decide if the device is a PFO or VIO family
> device.
>
> Both the ibm,platform-facilities and vdevice nodes are defined by PAPR,
> and mus
On Tue, 2017-08-22 at 01:51:37 UTC, Michael Ellerman wrote:
> In __replay_interrupt() we take the address of a local label so we can
> return to it later. However the assembler turns the local label into a
> symbol with a name like ".L1^B42" - where "^B" is literally "\002".
> This does not make fo
On Mon, 2017-08-21 at 15:16:49 UTC, Rob Herring wrote:
> In preparation to stop storing the full node path in full_name, remove the
> dependency on full_name from dlpar_attach_node(). Callers of
> dlpar_attach_node() already have the parent device_node, so just pass the
> parent node into dlpar_att
On Mon, 2017-08-21 at 15:16:47 UTC, Rob Herring wrote:
> Now that we have a custom printf format specifier, convert users of
> full_name to use %pOF instead. This is preparation to remove storing
> of the full path string for each node.
>
> Signed-off-by: Rob Herring
> Cc: Benjamin Herrenschmidt
On Fri, 2017-08-11 at 16:38:59 UTC, Nicholas Piggin wrote:
> Interrupts which do not require EE to be cleared can all
> be tested with a single bitwise test.
>
> Signed-off-by: Nicholas Piggin
Patches 1-9 applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/e0c827c09c0d04d77616a450
On Mon, 2017-07-24 at 04:27:58 UTC, Benjamin Herrenschmidt wrote:
> Makes switch_mm_irqs_off() a bit more readable
>
> Signed-off-by: Benjamin Herrenschmidt
Patches 1-2, 4-6 applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/43ed84a891b70165a621a5c9219694
cheers
On Thu, Aug 24, 2017 at 07:14:47PM +1000, Paul Mackerras wrote:
> Nixiaoming pointed out that there is a memory leak in
> kvm_vm_ioctl_create_spapr_tce() if the call to anon_inode_getfd()
> fails; the memory allocated for the kvmppc_spapr_tce_table struct
> is not freed, and nor are the pages alloc
On Thu, 24 Aug 2017 21:04:51 +1000
Michael Ellerman wrote:
> Michal Suchanek writes:
>
> > The fadump parameter processing re-does the logic of next_arg quote
> > stripping to determine where the argument ends. Pass pointer to the
> > next argument instead to make this more robust.
> >
> > Sign
On Thu, 24 Aug 2017 21:02:47 +1000
Michael Ellerman wrote:
> Michal Suchanek writes:
>
> > Remove quotes from argument value only if there is qoute on both
> > sides.
> >
> > Signed-off-by: Michal Suchanek
> > ---
> > arch/powerpc/kernel/fadump.c | 6 ++
> > lib/cmdline.c|
Locking of config and doorbell operations should be done
only if the underlying hardware requires it.
This patch removes the global spinlocks from the rapidio
subsystem and moves them to the mport drivers (fsl_rio and tsi721),
only to the necessary places. For example, local config space
read and
On 23/08/2017 15:26, Tejun Heo wrote:
> Hello, Michael.
>
> On Wed, Aug 23, 2017 at 09:00:39PM +1000, Michael Ellerman wrote:
>>> I don't think that's true. The CPU id used in kernel doesn't have to
>>> match the physical one and arch code should be able to pre-map CPU IDs
>>> to nodes and use th
Hi Suka,
Comments inline ...
Sukadev Bhattiprolu writes:
> diff --git a/Documentation/devicetree/bindings/powerpc/ibm,vas.txt
> b/Documentation/devicetree/bindings/powerpc/ibm,vas.txt
> new file mode 100644
> index 000..0e3111d
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/power
Michal Suchanek writes:
> The fadump parameter processing re-does the logic of next_arg quote
> stripping to determine where the argument ends. Pass pointer to the
> next argument instead to make this more robust.
>
> Signed-off-by: Michal Suchanek
> ---
> arch/powerpc/kernel/fadump.c | 13 +++
Michal Suchanek writes:
> Remove quotes from argument value only if there is qoute on both sides.
>
> Signed-off-by: Michal Suchanek
> ---
> arch/powerpc/kernel/fadump.c | 6 ++
> lib/cmdline.c| 7 ++-
Can you split that into two patches?
cheers
> 2 files changed, 4 i
Nathan Fontenot writes:
> On 08/23/2017 06:41 AM, Michael Ellerman wrote:
>> Michael Bringmann writes:
>>
>>> powerpc/numa: Correct the currently broken capability to set the
>>> topology for shared CPUs in LPARs. At boot time for shared CPU
>>> lpars, the topology for each shared CPU is set t
Christophe Leroy writes:
> memset() is patched after initialisation to activate the
> optimised part which uses cache instructions.
>
> Today we have a 'b 2f' to skip the optimised patch, which then gets
> replaced by a NOP, implying a useless cycle consumption.
> As we have a 'bne 2f' just befor
Anton noticed that if we fault part way through emulating an unaligned
instruction, we don't update the DAR to reflect that.
The DAR value is eventually reported back to userspace as the address
in the SEGV signal, and if userspace is using that value to demand
fault then it can be confused by us
John Allen writes:
> Check if an LMB is assigned before attempting to call dlpar_acquire_drc in
> order to avoid any unnecessary rtas calls. This substantially reduces the
> running time of memory hot add on lpars with large amounts of memory.
>
> Signed-off-by: John Allen
I'll add:
Fixes: c
Vaidyanathan Srinivasan writes:
> On PowerNV platforms, firmware provides exit latency and
> target residency for each of the idle states in nano
> seconds. Cpuidle framework expects the values in micro
> seconds. Round up to nearest micro seconds to avoid errors
> in cases where the values are
On Sat, Aug 12, 2017 at 02:39:10AM +1000, Nicholas Piggin wrote:
> Reviewed-by: Gautham R. Shenoy
> Signed-off-by: Nicholas Piggin
> ---
> arch/powerpc/kvm/book3s_hv_rmhandlers.S | 24
> 1 file changed, 12 insertions(+), 12 deletions(-)
>
> diff --git a/arch/powerpc/kvm
On Sat, Aug 12, 2017 at 02:39:08AM +1000, Nicholas Piggin wrote:
> POWER9 CPUs have independent MMU contexts per thread, so KVM does not
> need to quiesce secondary threads, so the hwthread_req/hwthread_state
> protocol does not have to be used. So patch it away on POWER9, and patch
> away the bran
Hi Jiri,
On Thu, Aug 24, 2017 at 09:31:05AM +0200, Jiri Slaby wrote:
> There is code duplicated over all architecture's headers for
> futex_atomic_op_inuser. Namely op decoding, access_ok check for uaddr,
> and comparison of the result.
>
> Remove this duplication and leave up to the arches only
On 24 August 2017 at 01:57, Dave Airlie wrote:
>> Yeah, maybe it's time to disconnect the "default display device" idea
>> from the VGA arbiter. I have no idea what (if any) dependencies X has
>> on the legacy VGA resources. I assume X works fine on power, where it
>> sounds like those resources
On Thu, Aug 24, 2017 at 07:11:38PM +1000, Paul Mackerras wrote:
Ignore this. My apologies.
Paul.
Nixiaoming pointed out that there is a memory leak in
kvm_vm_ioctl_create_spapr_tce() if the call to anon_inode_getfd()
fails; the memory allocated for the kvmppc_spapr_tce_table struct
is not freed, and nor are the pages allocated for the iommu
tables. In addition, we have already incremented the
Nixiaoming pointed out that there is a memory leak in
kvm_vm_ioctl_create_spapr_tce() if the call to anon_inode_getfd()
fails; the memory allocated for the kvmppc_spapr_tce_table struct
is not freed, and nor are the pages allocated for the iommu
tables. In addition, we have already incremented the
On Thu, Aug 24, 2017 at 06:43:22AM +, Nixiaoming wrote:
> >From: Paul Mackerras [mailto:pau...@ozlabs.org] Thursday, August 24, 2017
> >11:40 AM
> >
> >Nixiaoming pointed out that there is a memory leak in
> >kvm_vm_ioctl_create_spapr_tce() if the call to anon_inode_getfd() fails; the
> >mem
On 08/24/2017 07:49 AM, Michael Ellerman wrote:
> Michael Ellerman writes:
>
>> Cédric Le Goater writes:
>>> When called from xive_irq_startup(), the size of the cpumask can be
>>> larger than nr_cpu_ids. Most of time, its value is NR_CPUS (2048).
> ...
>>
>> I guess this patch is a good fix, I'
There is code duplicated over all architecture's headers for
futex_atomic_op_inuser. Namely op decoding, access_ok check for uaddr,
and comparison of the result.
Remove this duplication and leave up to the arches only the needed
assembly which is now in arch_futex_atomic_op_inuser.
This effective
Signed-off-by: Madalin Bucur
---
drivers/net/ethernet/freescale/dpaa/dpaa_eth.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c
b/drivers/net/ethernet/freescale/dpaa/dpaa_eth.c
index 73ca8d7..4225806 100644
--- a/drivers/net/ethernet/freescal
Signed-off-by: Madalin Bucur
---
Documentation/networking/dpaa.txt | 68 ++-
1 file changed, 67 insertions(+), 1 deletion(-)
diff --git a/Documentation/networking/dpaa.txt
b/Documentation/networking/dpaa.txt
index 76e016d..f88194f 100644
--- a/Documentation/n
Set the skb hash when then FMan Keygen hash result is available.
Signed-off-by: Madalin Bucur
---
drivers/net/ethernet/freescale/dpaa/dpaa_eth.c | 23 +++---
drivers/net/ethernet/freescale/dpaa/dpaa_eth.h | 1 +
drivers/net/ethernet/freescale/dpaa/dpaa_ethtool.c | 9 +++
Allow ethtool control of the Rx flow hashing. By default RSS is
enabled, this allows to turn it off by bypassing the FMan Keygen
block and sending all traffic on the default Rx frame queue.
Signed-off-by: Madalin Bucur
---
drivers/net/ethernet/freescale/dpaa/dpaa_ethtool.c | 113
From: Iordache Florinel-R70177
Add support for the FMan Keygen with a hardcoded scheme to spread
incoming traffic on a FQ range based on source and destination IPs
and ports.
Signed-off-by: Iordache Florinel
Signed-off-by: Madalin Bucur
---
drivers/net/ethernet/freescale/fman/Makefile |
Add a block of 128 Rx frame queues per port. The FMan hardware will
send traffic on one of these queues based on the FMan port Parse
Classify Distribute setup. The hash computed by the FMan Keygen
block will select the Rx FQ.
Signed-off-by: Madalin Bucur
---
drivers/net/ethernet/freescale/dpaa/d
Signed-off-by: Madalin Bucur
---
drivers/net/ethernet/freescale/fman/fman.c | 74 --
drivers/net/ethernet/freescale/fman/fman.h | 73 +
2 files changed, 73 insertions(+), 74 deletions(-)
diff --git a/drivers/net/ethernet/freescale/fman/fman
This patch set introduces Receive Side Scaling for the DPAA Ethernet
driver. Documentation is updated with details related to the new
feature and limitations that apply.
Added also a small fix.
v2: removed a C++ style comment
v3: move struct fman to header file to avoid exporting a function
Iorda
Le 24/08/2017 à 07:24, Andrew Donnellan a écrit :
On 24/08/17 00:58, Christophe Lombard wrote:
The PSL initialization sequence has been updated to DD2.
This patch adapts to the changes, retaining compatibility with DD1.
Tests performed on some of the new hardware.
If we're retaining compatibi
Le 24/08/2017 à 09:09, Vaibhav Jain a écrit :
Hi Christophe,
Christophe Lombard writes:
+ /* For debugging with trace arrays */
+ /* Configure RX trace 0 segmented mode */
+ cxl_p1_write(adapter, CXL_PSL9_TRACECFG, 0x8200ULL);
+ /* Configure RX trace 1 segme
Hi Christophe,
Christophe Lombard writes:
> + /* For debugging with trace arrays */
> + /* Configure RX trace 0 segmented mode */
> + cxl_p1_write(adapter, CXL_PSL9_TRACECFG, 0x8200ULL);
> + /* Configure RX trace 1 segmented mode */
> + cxl_p1_write(adapter, CXL_PS
>From: Paul Mackerras [mailto:pau...@ozlabs.org] Thursday, August 24, 2017
>11:40 AM
>
>Nixiaoming pointed out that there is a memory leak in
>kvm_vm_ioctl_create_spapr_tce() if the call to anon_inode_getfd() fails; the
>memory allocated for the kvmppc_spapr_tce_table struct is not freed, and no
94 matches
Mail list logo
