On Mon, Jul 17, 2017 at 04:50:38PM -0700, Haren Myneni wrote:
>
> This patch adds P9 NX support for 842 compression engine. Virtual
> Accelerator Switchboard (VAS) is used to access 842 engine on P9.
>
> For each NX engine per chip, setup receive window using
> vas_rx_win_open() which configures
On Mon, 17 Jul 2017 16:43:19 -0700
Haren Myneni wrote:
> [PATCH V2 0/6] Enable NX 842 compression engine on Power9
>
> P9 introduces Virtual Accelerator Switchboard (VAS) to communicate
> with NX 842 engine. icswx function is used to access NX before.
> On powerNV systems, NX-842 driver invokes
A previous optimisation incorrectly assumed the PAPR hcall does
not use r12, and clobbers it upon entry. In fact it is used as
an input. This can result in KVM guests crashing (observed with
PR KVM).
Instead of using r12 to save r13, tihs patch saves r13 in ctr.
This is more costly, but not as slo
Cyril Bur writes:
> OPAL can only manage one flash access at a time and will return an
> OPAL_BUSY error for each concurrent access to the flash. The simplest
> way to prevent this from happening is with a mutex.
>
> Signed-off-by: Cyril Bur
> ---
> This is to address https://github.com/open-powe
Cyril Bur writes:
> On Mon, 2017-07-17 at 21:30 +1000, Balbir Singh wrote:
>> On Wed, 2017-07-12 at 14:23 +1000, Cyril Bur wrote:
>> > static int __opal_async_get_token(void)
>> > {
>> >unsigned long flags;
>> >int token;
>> >
>> > - spin_lock_irqsave(&opal_async_comp_lock, flags);
>>
Cyril Bur writes:
> On Mon, 2017-07-17 at 19:29 +1000, Balbir Singh wrote:
>> On Mon, 2017-07-17 at 17:55 +1000, Cyril Bur wrote:
>> > On Mon, 2017-07-17 at 17:34 +1000, Balbir Singh wrote:
>> > > On Wed, 2017-07-12 at 14:22 +1000, Cyril Bur wrote:
>> > > > OPAL can only manage one flash access a
On Mon, 2017-07-17 at 19:29 +1000, Balbir Singh wrote:
> On Mon, 2017-07-17 at 17:55 +1000, Cyril Bur wrote:
> > On Mon, 2017-07-17 at 17:34 +1000, Balbir Singh wrote:
> > > On Wed, 2017-07-12 at 14:22 +1000, Cyril Bur wrote:
> > > > OPAL can only manage one flash access at a time and will return a
On Fri, Jul 14, 2017 at 4:51 PM, Michael Ellerman wrote:
> Move the core logic into a helper, so we can use it for changing other
> permissions.
>
> We also change the logic to align start down, and end up. This means
> calling the function with a range will expand that range to be at
> least 1 mm
On Fri, Jul 14, 2017 at 4:51 PM, Michael Ellerman wrote:
> Move the core logic into a helper, so we can use it for changing permissions
> other than _PAGE_WRITE.
>
> Signed-off-by: Michael Ellerman
> ---
> arch/powerpc/mm/pgtable-radix.c | 20 +++-
> 1 file changed, 15 insertions
On Mon, 2017-07-17 at 18:50 +1000, Balbir Singh wrote:
> On Wed, 2017-07-12 at 14:22 +1000, Cyril Bur wrote:
> > While this driver expects to interact asynchronously, OPAL is well
> > within its rights to return OPAL_SUCCESS to indicate that the operation
> > completed without the need for a callba
On Mon, 2017-07-17 at 21:30 +1000, Balbir Singh wrote:
> On Wed, 2017-07-12 at 14:23 +1000, Cyril Bur wrote:
> > Future work will add an opal_async_wait_response_interruptible()
> > which will call wait_event_interruptible(). This work requires extra
> > token state to be tracked as wait_event_inte
On Mon, 2017-07-17 at 13:33 +0200, Frans Klaver wrote:
> On Wed, Jul 12, 2017 at 6:22 AM, Cyril Bur wrote:
> > BUG_ON() should be reserved in situations where we can not longer
> > guarantee the integrity of the system. In the case where
> > powernv_flash_async_op() receives an impossible op, we c
P9 has support for PCI peer-to-peer, enabling a device to write in the
mmio space of another device directly, without interrupting the CPU.
This patch adds support for it on powernv, by adding a new API to be
called by drivers. The pnv_pci_set_p2p(...) call configures an
'initiator', i.e the devic
This patch adds P9 NX support for 842 compression engine. Virtual
Accelerator Switchboard (VAS) is used to access 842 engine on P9.
For each NX engine per chip, setup receive window using
vas_rx_win_open() which configures RxFIFo with FIFO address, lpid,
pid and tid values. This unique (lpid, pid
This patch adds changes for checking P9 specific 842 engine
error codes. These errros are reported in coprocessor status
block (CSB) for failures.
Signed-off-by: Haren Myneni
---
arch/powerpc/include/asm/icswx.h | 3 +++
drivers/crypto/nx/nx-842-powernv.c | 18 ++
drivers/cry
Updating coprocessor list is moved to nx842_add_coprocs_list().
This function will be used for both icswx and VAS functions.
Signed-off-by: Haren Myneni
---
drivers/crypto/nx/nx-842-powernv.c | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/drivers/crypto/nx/nx-8
Move deleting coprocessors info upon exit or failure to
nx842_delete_coprocs().
Signed-off-by: Haren Myneni
---
drivers/crypto/nx/nx-842-powernv.c | 25 -
1 file changed, 12 insertions(+), 13 deletions(-)
diff --git a/drivers/crypto/nx/nx-842-powernv.c
b/drivers/crypt
Configure CRB is moved to nx842_configure_crb() so that it can
be used for icswx and VAS exec functions. VAS function will be
added later with P9 support.
Signed-off-by: Haren Myneni
---
drivers/crypto/nx/nx-842-powernv.c | 57 +-
1 file changed, 38 insertion
Rename nx842_powernv_function to nx842_powernv_exec.
nx842_powernv_exec points to nx842_exec_icswx and
will be point to VAS exec function which will be added later
for P9 NX support.
Signed-off-by: Haren Myneni
---
drivers/crypto/nx/nx-842-powernv.c | 20 +---
1 file changed, 13
[PATCH V2 0/6] Enable NX 842 compression engine on Power9
P9 introduces Virtual Accelerator Switchboard (VAS) to communicate
with NX 842 engine. icswx function is used to access NX before.
On powerNV systems, NX-842 driver invokes VAS functions for
configuring RxFIFO (receive window) per each NX
On Monday, July 17, 2017 7:18 AM, Joao Pinto wrote:
>
> Hi Bjorn Andersson,
>
> Às 7:39 AM de 7/16/2017, Bjorn Andersson escreveu:
> > In several dwc based drivers host_init can fail, so make sure to
> > propagate and handle this to avoid continuing operation of a driver or
> > hardware in an inv
The patch
ASoC: fsl_spdif: constify snd_soc_dai_ops structure
has been applied to the asoc tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sen
The patch
ASoC: fsl_esai: constify snd_soc_dai_ops structure
has been applied to the asoc tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent
The patch
ASoC: fsl_asrc: constify snd_soc_dai_ops structure
has been applied to the asoc tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent
Hi Michael,
On 17/07/17 11:17, Michael Ellerman wrote:
> James Morse writes:
>> compat_ptrace_request() lacks handlers for PTRACE_{G,S}ETSIGMASK,
>> instead using those in ptrace_request(). The compat variant should
>> read a compat_sigset_t from userspace instead of ptrace_request()s
>> sigset_t
On Mon, Jul 17, 2017 at 04:29:46PM +0300, Gleb Fotengauer-Malinovskiy wrote:
> This ioctl does nothing to justify an _IOC_READ or _IOC_WRITE flag
> because it doesn't copy anything from/to userspace to access the
> argument.
>
> Fixes: 54ebbfb16034 ("tty: add TIOCGPTPEER ioctl")
> Signed-off-by: G
This ioctl does nothing to justify an _IOC_READ or _IOC_WRITE flag
because it doesn't copy anything from/to userspace to access the
argument.
Fixes: 54ebbfb16034 ("tty: add TIOCGPTPEER ioctl")
Signed-off-by: Gleb Fotengauer-Malinovskiy
Acked-by: Aleksa Sarai
Acked-by: Arnd Bergmann
---
arch/al
From: Laurentiu Tudor
This allows building powerpc with the GENERIC_MSI_IRQ_DOMAIN
Kconfig by enabling the asm-generic msi.h in Kbuild. Without
this, there's a compilation error [1] because powerpc, as most
arches, doesn't provide an asm/msi.h.
[1] In file included from ./include/linux/kvm_host.
No sure if in reply-to took correct effect, so I'm posting the thread ref
explicit:
https://lists.ozlabs.org/pipermail/linuxppc-dev/2016-November/151672.html
On 17-07-2017 09:57, Gustavo Romero wrote:
> Hi,
>
> On bissecting kernel on Debian (gcc version 6.3.0 20170516) I've got the same
> error
Hi,
On bissecting kernel on Debian (gcc version 6.3.0 20170516) I've got the same
error on linking kernels <= v4.9 as reported previously in this thread:
ld: arch/powerpc/boot/zImage.pseries: Not enough room for program headers, try
linking with -N
ld: final link failed: Bad value
arch/powerpc/b
Hi Benjamin,
[auto build test ERROR on powerpc/next]
[also build test ERROR on v4.13-rc1 next-20170717]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Benjamin-Herrenschmidt/powerpc-mm-radix
On Fri, 2017-07-14 at 18:31 +1000, Benjamin Herrenschmidt wrote:
> There are a number of conditions in the DSISR that represent
> conditions for which there is no point looking for a VMA or
> trying to update a PTE. In fact, POWER9 adds a few with bad
> AMOs, bad "paste" instruction etc...
>
> Thi
On Mon, 2017-07-17 at 21:31 +1000, Michael Ellerman wrote:
> In commit 1c0eaf0f56d6 ("powerpc/powernv: Tell OPAL about our MMU mode
> on POWER9"), we added additional flags to the OPAL call to configure
> CPUs at boot.
>
> These flags only work on Power9 firmwares, and worse can cause boot
> failu
On Wed, Jul 12, 2017 at 6:22 AM, Cyril Bur wrote:
> BUG_ON() should be reserved in situations where we can not longer
> guarantee the integrity of the system. In the case where
> powernv_flash_async_op() receives an impossible op, we can still
> guarantee the integrity of the system.
>
> Signed-of
On Wed, 2017-07-12 at 14:23 +1000, Cyril Bur wrote:
> Future work will add an opal_async_wait_response_interruptible()
> which will call wait_event_interruptible(). This work requires extra
> token state to be tracked as wait_event_interruptible() can return and
> the caller could release the token
In commit 1c0eaf0f56d6 ("powerpc/powernv: Tell OPAL about our MMU mode
on POWER9"), we added additional flags to the OPAL call to configure
CPUs at boot.
These flags only work on Power9 firmwares, and worse can cause boot
failures on Power8 machines, so we check for CPU_FTR_ARCH_300 (aka POWER9)
b
Hi Bjorn Andersson,
Às 7:39 AM de 7/16/2017, Bjorn Andersson escreveu:
> In several dwc based drivers host_init can fail, so make sure to
> propagate and handle this to avoid continuing operation of a driver or
> hardware in an invalid state.
>
> Signed-off-by: Bjorn Andersson
> ---
> drivers/
James Morse writes:
> compat_ptrace_request() lacks handlers for PTRACE_{G,S}ETSIGMASK,
> instead using those in ptrace_request(). The compat variant should
> read a compat_sigset_t from userspace instead of ptrace_request()s
> sigset_t.
>
> While compat_sigset_t is the same size as sigset_t, it
On Mon, 2017-07-17 at 17:55 +1000, Cyril Bur wrote:
> On Mon, 2017-07-17 at 17:34 +1000, Balbir Singh wrote:
> > On Wed, 2017-07-12 at 14:22 +1000, Cyril Bur wrote:
> > > OPAL can only manage one flash access at a time and will return an
> > > OPAL_BUSY error for each concurrent access to the flash
On Wed, 2017-07-12 at 14:22 +1000, Cyril Bur wrote:
> While this driver expects to interact asynchronously, OPAL is well
> within its rights to return OPAL_SUCCESS to indicate that the operation
> completed without the need for a callback. We shouldn't treat
> OPAL_SUCCESS as an error rather we sho
On Mon, 2017-07-17 at 17:34 +1000, Balbir Singh wrote:
> On Wed, 2017-07-12 at 14:22 +1000, Cyril Bur wrote:
> > OPAL can only manage one flash access at a time and will return an
> > OPAL_BUSY error for each concurrent access to the flash. The simplest
> > way to prevent this from happening is wit
On Wed, 2017-07-12 at 14:22 +1000, Cyril Bur wrote:
> OPAL can only manage one flash access at a time and will return an
> OPAL_BUSY error for each concurrent access to the flash. The simplest
> way to prevent this from happening is with a mutex.
>
> Signed-off-by: Cyril Bur
> ---
Should the mut
42 matches
Mail list logo
