Hi maintainers,
Is this patch series OK or anything I should update?
Thanks
Jin Yao
On 6/2/2017 4:02 PM, Jin, Yao wrote:
Hi maintainers,
Is this patch series (v6) OK for merging?
Thanks
Jin Yao
On 4/20/2017 5:36 PM, Jiri Olsa wrote:
On Thu, Apr 20, 2017 at 08:07:48PM +0800, Jin Yao wro
Balbir Singh writes:
> With text moving to read-only migrate optprobes to using
> the patch_instruction infrastructure. Without this optprobes
> will fail and complain.
>
> Signed-off-by: Balbir Singh
> ---
> arch/powerpc/kernel/optprobes.c | 58
> ++---
> 1
Balbir Singh writes:
> Today our patching happens via direct copy and
> patch_instruction. The patching code is well
> contained in the sense that copying bits are limited.
>
> While considering implementation of CONFIG_STRICT_RWX,
> the first requirement is to a create another mapping
> that wil
In P9, OCC (On-Chip-Controller) supports shared memory based
commad-response interface. Within the shared memory there is an OPAL
command buffer and OCC response buffer that can be used to send
inband commands to OCC. This patch adds a platform driver to support
the command/response interface betwe
Balbir Singh writes:
> On Wed, 2017-06-07 at 00:35 +0530, Naveen N. Rao wrote:
>> Hi Balbir,
>>
>> On 2017/06/06 02:29PM, Balbir Singh wrote:
>> > arch_arm/disarm_probe use direct assignment for copying
>> > instructions, replace them with patch_instruction
>> >
>> > Signed-off-by: Balbir Singh
On Mon, 2017-06-26 at 09:03 +1000, Balbir Singh wrote:
> On Wed, 2017-06-21 at 18:39 -0700, Ram Pai wrote:
> > Introduce set_hidx_slot() which sets the (H_PAGE_F_SECOND|H_PAGE_F_GIX)
> > bits at the appropriate location in the PTE of 4K PTE. In the
> > case of 64K PTE, it sets the bits in
You may need some kind of temporary unused annotation to shut the
compiler/kbuild robot up but the patch itself looks fine.
Reviewed-by: Alistair Popple
On Wed, 21 Jun 2017 05:18:03 PM Russell Currey wrote:
> Add a helper that determines if all the devices contained in a given PE
> are all from
On Sat, Jun 3, 2017 at 11:27 PM, Pavel Machek wrote:
> On Sat 2017-06-03 20:52:32, Balbir Singh wrote:
>> Kbuild reported a build failure when CONFIG_STRICT_KERNEL_RWX was
>> enabled on powerpc. We don't yet have ARCH_HAS_SET_MEMORY and ppc32
>> saw a build failure.
>>
>> fixes(50327dd kernel/powe
Paolo Abeni writes:
> Thank you!
>
> I'll submit formally the patch after some more testing.
Thanks.
> I noticed this version has entered the ppc patchwork, but I think that
> the formal submission should go towards the net-next tree.
Yeah it picks up all patches sent to the list. That's fine I
victora writes:
> Em 2017-06-22 00:59, Michael Ellerman escreveu:
>>
>> We merged a patch from Aneesh to filter it out in 4.12-rc1:
>>
>> a525108cf1cc ("powerpc/mm/hugetlb: Filter out hugepage size not
>> supported by page table layout")
>>
>> I guess we should probably send that patch to sta
On Fri, 23 Jun 2017 18:31:18 +1000
Oliver O'Halloran wrote:
> Removes an indentation level and shuffles some code around to make the
> following patch cleaner. No functional changes.
>
> Signed-off-by: Oliver O'Halloran
> ---
> v1 -> v2: Remove broken initialiser
> ---
> arch/powerpc/mm/init_6
On Wed, 2017-06-21 at 18:39 -0700, Ram Pai wrote:
> Introduce set_hidx_slot() which sets the (H_PAGE_F_SECOND|H_PAGE_F_GIX)
> bits at the appropriate location in the PTE of 4K PTE. In the
> case of 64K PTE, it sets the bits in the second part of the PTE. Though
> the implementation for th
On Sun, Jun 25, 2017 at 04:44:09PM -0500, Segher Boessenkool wrote:
> Do you have a short stand-alone testcase? 4.6 is ancient, of course, but
> the actual problem may still exist in more recent compilers (if it _is_
> a compiler problem; if it's not, you *really* want to know :-) )
Enjoy. At l
>Do you mean "sufficient" here rather than "efficient"? It's far less
>inefficient than what the code was previously doing, but still...
Yes, I'm gonna send a new fix for the comment patch and
change the subject of the previous patch soc/qman
Thanks,
Karim
On 25 June 2017 at 04:49, Scott Wood
On Sun, Jun 25, 2017 at 09:53:24PM +0100, Al Viro wrote:
> Confirmed. It manages to bugger the loop immediately after the (successful)
> copying of iovec array in rw_copy_check_uvector(); both with and without
> INLINE_COPY_FROM_USER it has (just before the call of copy_from_user()) r27
> set to n
On Sun, Jun 25, 2017 at 12:14:04PM +0100, Al Viro wrote:
> On Sun, Jun 25, 2017 at 10:53:58AM +0100, Al Viro wrote:
> > On Sat, Jun 24, 2017 at 12:29:23PM -0500, Larry Finger wrote:
> >
> > > I made a break through. If I turn off inline copy to/from users for 32-bit
> > > ppc with the following pa
From: Michael Neuling
On P9 (Nimbus) DD2 and later, in radix mode, the move to the PID
register will implicitly invalidate the user space ERAT entries
and leave the kernel ones alone. Thus the only thing needed is
an isync() to synchronize this with subsequent uaccess's
Signed-off-by: Michael N
That will allow OPAL to configure the CPU in an optimal way.
Signed-off-by: Benjamin Herrenschmidt
---
The matching OPAL change has been sent to the skiboot list.
Setting those bits in the reinit() call with an older OPAL
will result in the call returning an error which Linux ignores
but it wil
Monitor Mode Control Register 2 (MMCR2) is a 64-bit
register that contains 9-bit control fields for
controlling the operation of PMC1 - PMC6. Patch
to expose the MMCR2 spr in sysfs.
Signed-off-by: Madhavan Srinivasan
---
arch/powerpc/kernel/sysfs.c | 8
1 file changed, 8 insertions(+)
Correct "branch" event code of Power9 is "r4d05e".
Replace the current "branch" event code with "r4d05e"
and add a hack to use "r10012" as event code for
power9 dd1.
Fixes: d89f473ff6f8 ("powerpc/perf: Fix PM_BRU_CMPL event code for power9")
Reported-by: Anton Blanchard
Signed-off-by: Madhavan Sr
Change the comment for an entry check inside function
drain_mr_fqrni() with sleep for sufficient period
of time instead of long time proccessor cycles.
Signed-off-by: Karim Eshapa
---
drivers/soc/fsl/qbman/qman.c | 25 +
1 file changed, 13 insertions(+), 12 deletions(-)
Use msleep() instead of stucking with
long delay will be more efficient.
Signed-off-by: Karim Eshapa
---
drivers/soc/fsl/qbman/qman.c | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/drivers/soc/fsl/qbman/qman.c b/drivers/soc/fsl/qbman/qman.c
index 3d891db..18d391e 100644
On Sun, Jun 25, 2017 at 10:53:58AM +0100, Al Viro wrote:
> On Sat, Jun 24, 2017 at 12:29:23PM -0500, Larry Finger wrote:
>
> > I made a break through. If I turn off inline copy to/from users for 32-bit
> > ppc with the following patch, then the system boots:
>
> OK... So it's 4.6.3 miscompiling
On Sat, Jun 24, 2017 at 12:29:23PM -0500, Larry Finger wrote:
> I made a break through. If I turn off inline copy to/from users for 32-bit
> ppc with the following patch, then the system boots:
OK... So it's 4.6.3 miscompiling something - it is hardware-independent,
reproduced in qemu. I'd like
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